From f17d6f9c5c894303b1f0cba17f66b4dfbecb582942c679bc90dd3f85915e43f0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Adrian=20Schr=C3=B6ter?= Date: Fri, 3 May 2024 11:18:53 +0200 Subject: [PATCH] Sync from SUSE:SLFO:Main binutils revision 471b681ebcc57f12ec28433a9700d977 --- .gitattributes | 23 + _constraints | 19 + _multibuild | 26 + aarch64-common-pagesize.patch | 56 + add-ulp-section.diff | 207 ++ baselibs.conf | 4 + binutils-2.41-branch.diff.gz | 3 + binutils-2.41.tar.bz2 | 3 + binutils-2.41.tar.bz2.sig | 16 + binutils-bfd_h.patch | 16 + binutils-build-as-needed.diff | 13 + binutils-compat-old-behaviour.diff | 63 + binutils-fix-abierrormsg.diff | 43 + binutils-fix-invalid-op-errata.diff | 25 + binutils-fix-relax.diff | 20 + binutils-old-makeinfo.diff | 176 + binutils-pr22868.diff | 20 + binutils-revert-hlasm-insns.diff | 437 +++ binutils-revert-nm-symversion.diff | 34 + binutils-revert-plt32-in-branches.diff | 578 +++ binutils-revert-rela.diff | 375 ++ binutils-skip-rpaths.patch | 127 + binutils-use-less-memory.diff | 131 + binutils-znow.patch | 15 + binutils.changes | 4508 ++++++++++++++++++++++++ binutils.keyring | 70 + binutils.spec | 752 ++++ cross-avr-nesc-as.patch | 40 + cross-avr-omit_section_dynsym.patch | 18 + cross-avr-size.patch | 445 +++ enable-targets-gold.diff | 14 + ld-relro.diff | 63 + riscv-relro.patch | 57 + s390-biarch.diff | 23 + s390-pic-dso.diff | 32 + testsuite.diff | 26 + unit-at-a-time.patch | 15 + x86-64-biarch.patch | 15 + 38 files changed, 8508 insertions(+) create mode 100644 .gitattributes create mode 100644 _constraints create mode 100644 _multibuild create mode 100644 aarch64-common-pagesize.patch create mode 100644 add-ulp-section.diff create mode 100644 baselibs.conf create mode 100644 binutils-2.41-branch.diff.gz create mode 100644 binutils-2.41.tar.bz2 create mode 100644 binutils-2.41.tar.bz2.sig create mode 100644 binutils-bfd_h.patch create mode 100644 binutils-build-as-needed.diff create mode 100644 binutils-compat-old-behaviour.diff create mode 100644 binutils-fix-abierrormsg.diff create mode 100644 binutils-fix-invalid-op-errata.diff create mode 100644 binutils-fix-relax.diff create mode 100644 binutils-old-makeinfo.diff create mode 100644 binutils-pr22868.diff create mode 100644 binutils-revert-hlasm-insns.diff create mode 100644 binutils-revert-nm-symversion.diff create mode 100644 binutils-revert-plt32-in-branches.diff create mode 100644 binutils-revert-rela.diff create mode 100644 binutils-skip-rpaths.patch create mode 100644 binutils-use-less-memory.diff create mode 100644 binutils-znow.patch create mode 100644 binutils.changes create mode 100644 binutils.keyring create mode 100644 binutils.spec create mode 100644 cross-avr-nesc-as.patch create mode 100644 cross-avr-omit_section_dynsym.patch create mode 100644 cross-avr-size.patch create mode 100644 enable-targets-gold.diff create mode 100644 ld-relro.diff create mode 100644 riscv-relro.patch create mode 100644 s390-biarch.diff create mode 100644 s390-pic-dso.diff create mode 100644 testsuite.diff create mode 100644 unit-at-a-time.patch create mode 100644 x86-64-biarch.patch diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 0000000..9b03811 --- /dev/null +++ b/.gitattributes @@ -0,0 +1,23 @@ +## Default LFS +*.7z filter=lfs diff=lfs merge=lfs -text +*.bsp filter=lfs diff=lfs merge=lfs -text +*.bz2 filter=lfs diff=lfs merge=lfs -text +*.gem filter=lfs diff=lfs merge=lfs -text +*.gz filter=lfs diff=lfs merge=lfs -text +*.jar filter=lfs diff=lfs merge=lfs -text +*.lz filter=lfs diff=lfs merge=lfs -text +*.lzma filter=lfs diff=lfs merge=lfs -text +*.obscpio filter=lfs diff=lfs merge=lfs -text +*.oxt filter=lfs diff=lfs merge=lfs -text +*.pdf filter=lfs diff=lfs merge=lfs -text +*.png filter=lfs diff=lfs merge=lfs -text +*.rpm filter=lfs diff=lfs merge=lfs -text +*.tbz filter=lfs diff=lfs merge=lfs -text +*.tbz2 filter=lfs diff=lfs merge=lfs -text +*.tgz filter=lfs diff=lfs merge=lfs -text +*.ttf filter=lfs diff=lfs merge=lfs -text +*.txz filter=lfs diff=lfs merge=lfs -text +*.whl filter=lfs diff=lfs merge=lfs -text +*.xz filter=lfs diff=lfs merge=lfs -text +*.zip filter=lfs diff=lfs merge=lfs -text +*.zst filter=lfs diff=lfs merge=lfs -text diff --git a/_constraints b/_constraints new file mode 100644 index 0000000..7ffdce1 --- /dev/null +++ b/_constraints @@ -0,0 +1,19 @@ + + + + 6 + + + + + ppc + ppc64 + ppc64le + + + + 4 + + + + diff --git a/_multibuild b/_multibuild new file mode 100644 index 0000000..b9ee536 --- /dev/null +++ b/_multibuild @@ -0,0 +1,26 @@ + + aarch64 + hppa + hppa64 + arm + i386 + x86_64 + s390 + s390x + ppc + ppc64 + ppc64le + ia64 + sparc + sparc64 + spu + avr + pru + mips + m68k + epiphany + rx + riscv64 + xtensa + bpf + diff --git a/aarch64-common-pagesize.patch b/aarch64-common-pagesize.patch new file mode 100644 index 0000000..e6bea47 --- /dev/null +++ b/aarch64-common-pagesize.patch @@ -0,0 +1,56 @@ +Change default common-page-size to 64K on aarch64. This enables the use +of RELRO since we are using 64K pages. + +Index: binutils-2.41/bfd/elfnn-aarch64.c +=================================================================== +--- binutils-2.41.orig/bfd/elfnn-aarch64.c 2023-07-03 01:00:00.000000000 +0200 ++++ binutils-2.41/bfd/elfnn-aarch64.c 2023-08-16 16:31:51.238779641 +0200 +@@ -10251,7 +10251,7 @@ const struct elf_size_info elfNN_aarch64 + #define ELF_ARCH bfd_arch_aarch64 + #define ELF_MACHINE_CODE EM_AARCH64 + #define ELF_MAXPAGESIZE 0x10000 +-#define ELF_COMMONPAGESIZE 0x1000 ++#define ELF_COMMONPAGESIZE 0x10000 + + #define bfd_elfNN_bfd_free_cached_info \ + elfNN_aarch64_bfd_free_cached_info +Index: binutils-2.41/gold/aarch64.cc +=================================================================== +--- binutils-2.41.orig/gold/aarch64.cc 2023-07-03 01:00:00.000000000 +0200 ++++ binutils-2.41/gold/aarch64.cc 2023-08-16 16:28:35.959450565 +0200 +@@ -3555,7 +3555,7 @@ const Target::Target_info Target_aarch64 + "/lib/ld.so.1", // program interpreter + 0x400000, // default_text_segment_address + 0x10000, // abi_pagesize (overridable by -z max-page-size) +- 0x1000, // common_pagesize (overridable by -z common-page-size) ++ 0x10000, // common_pagesize (overridable by -z common-page-size) + false, // isolate_execinstr + 0, // rosegment_gap + elfcpp::SHN_UNDEF, // small_common_shndx +@@ -3584,7 +3584,7 @@ const Target::Target_info Target_aarch64 + "/lib/ld.so.1", // program interpreter + 0x400000, // default_text_segment_address + 0x10000, // abi_pagesize (overridable by -z max-page-size) +- 0x1000, // common_pagesize (overridable by -z common-page-size) ++ 0x10000, // common_pagesize (overridable by -z common-page-size) + false, // isolate_execinstr + 0, // rosegment_gap + elfcpp::SHN_UNDEF, // small_common_shndx +@@ -3613,7 +3613,7 @@ const Target::Target_info Target_aarch64 + "/lib/ld.so.1", // program interpreter + 0x400000, // default_text_segment_address + 0x10000, // abi_pagesize (overridable by -z max-page-size) +- 0x1000, // common_pagesize (overridable by -z common-page-size) ++ 0x10000, // common_pagesize (overridable by -z common-page-size) + false, // isolate_execinstr + 0, // rosegment_gap + elfcpp::SHN_UNDEF, // small_common_shndx +@@ -3642,7 +3642,7 @@ const Target::Target_info Target_aarch64 + "/lib/ld.so.1", // program interpreter + 0x400000, // default_text_segment_address + 0x10000, // abi_pagesize (overridable by -z max-page-size) +- 0x1000, // common_pagesize (overridable by -z common-page-size) ++ 0x10000, // common_pagesize (overridable by -z common-page-size) + false, // isolate_execinstr + 0, // rosegment_gap + elfcpp::SHN_UNDEF, // small_common_shndx diff --git a/add-ulp-section.diff b/add-ulp-section.diff new file mode 100644 index 0000000..71ae369 --- /dev/null +++ b/add-ulp-section.diff @@ -0,0 +1,207 @@ +This is for userspace live patching, adding some space into +shared libs or executable (in the .ulp section) when one of the +input files contains a section named .ulp.track. + +diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h +index 101c2fdf50d..f5d9e201fdb 100644 +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -1487,6 +1487,10 @@ struct elf_backend_data + (const bfd *ibfd, bfd *obfd, const Elf_Internal_Shdr *isection, + Elf_Internal_Shdr *osection); + ++ bool (*elf_backend_is_ulp_enabled) (bfd *abfd); ++ ++ bool (*elf_backend_setup_ulp) (struct bfd_link_info *); ++ + /* Used to handle bad SHF_LINK_ORDER input. */ + void (*link_order_error_handler) (const char *, ...); + +diff --git a/bfd/elflink.c b/bfd/elflink.c +index ce1407fa2dc..5c70bcf6c07 100644 +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -7260,6 +7260,13 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, + s = bfd_get_linker_section (dynobj, ".gnu.version"); + s->flags |= SEC_EXCLUDE; + } ++ ++ if (bed->elf_backend_is_ulp_enabled != NULL ++ && bed->elf_backend_setup_ulp != NULL ++ && (*bed->elf_backend_is_ulp_enabled) (info->input_bfds)) ++ { ++ (*bed->elf_backend_setup_ulp)(info); ++ } + } + return true; + } +diff --git a/bfd/elfxx-target.h b/bfd/elfxx-target.h +index 4c6b1f20340..1f54509cd08 100644 +--- a/bfd/elfxx-target.h ++++ b/bfd/elfxx-target.h +@@ -771,6 +771,14 @@ + #define elf_backend_copy_special_section_fields _bfd_elf_copy_special_section_fields + #endif + ++#ifndef elf_backend_is_ulp_enabled ++#define elf_backend_is_ulp_enabled NULL ++#endif ++ ++#ifndef elf_backend_setup_ulp ++#define elf_backend_setup_ulp NULL ++#endif ++ + #ifndef elf_backend_compact_eh_encoding + #define elf_backend_compact_eh_encoding NULL + #endif +@@ -904,6 +912,8 @@ static const struct elf_backend_data elfNN_bed = + elf_backend_maybe_function_sym, + elf_backend_get_reloc_section, + elf_backend_copy_special_section_fields, ++ elf_backend_is_ulp_enabled, ++ elf_backend_setup_ulp, + elf_backend_link_order_error_handler, + elf_backend_relplt_name, + ELF_MACHINE_ALT1, +diff --git a/bfd/elfxx-x86.c b/bfd/elfxx-x86.c +index 62d516aab8d..c0fb718d85c 100644 +--- a/bfd/elfxx-x86.c ++++ b/bfd/elfxx-x86.c +@@ -29,6 +29,8 @@ + #define ELF64_DYNAMIC_INTERPRETER "/lib/ld64.so.1" + #define ELFX32_DYNAMIC_INTERPRETER "/lib/ldx32.so.1" + ++#define ULP_ENTRY_LEN 16 ++ + bool + _bfd_x86_elf_mkobject (bfd *abfd) + { +@@ -984,6 +986,64 @@ _bfd_elf_x86_valid_reloc_p (asection *input_section, + return valid_p; + } + ++/* Check if input bfds are ulp-enabled by containing .ulp.track section */ ++ ++bool ++_bfd_x86_elf_is_ulp_enabled (struct bfd *input_bfd) ++{ ++ while (input_bfd != NULL) ++ for (; input_bfd != NULL; input_bfd = input_bfd->link.next) ++ { ++ if (input_bfd->section_count == 0) continue; ++ if (bfd_get_section_by_name (input_bfd, ".ulp.track")) return true; ++ } ++ return false; ++} ++ ++/* To be used by elf_link_hash_traverse when computing the ulp length */ ++ ++static bool ++bfd_x86_elf_link_compute_ulp (struct elf_link_hash_entry *h, void *data) ++{ ++ unsigned long *ulp_length = (unsigned long *) data; ++ ++ if (h->dynindx != -1 && h->type == STT_FUNC && !h->def_dynamic) ++ { ++ ++(*ulp_length); ++ } ++ return true; ++} ++ ++/* Fill the user-space live patching section */ ++ ++bool ++_bfd_x86_elf_setup_ulp (struct bfd_link_info *info) ++{ ++ struct elf_x86_link_hash_table *htab; ++ asection *ulp; ++ unsigned int ulp_length = 0; ++ ++ htab = elf_x86_hash_table (info, X86_64_ELF_DATA); ++ ++ elf_link_hash_traverse (elf_hash_table (info), ++ bfd_x86_elf_link_compute_ulp, ++ &ulp_length); ++ ++ ulp = htab->ulp; ++ ++ ulp->size = ulp_length * ULP_ENTRY_LEN; ++ ++ ulp->contents = (bfd_byte *) bfd_malloc (ulp->size); ++ if (ulp->contents == NULL) ++ return false; ++ ++ if (!ulp->contents) ++ return false; ++ ++ memset(ulp->contents, 0x00, ulp->size); ++ return true; ++} ++ + /* Set the sizes of the dynamic sections. */ + + bool +@@ -3030,7 +3090,26 @@ _bfd_x86_elf_link_setup_gnu_properties + + htab->plt_second = sec; + } +- } ++ ++ /* create sections to support user-space live patching */ ++ if (_bfd_x86_elf_is_ulp_enabled(info->input_bfds)) ++ { ++ flagword flags = (bed->dynamic_sec_flags ++ | SEC_ALLOC ++ | SEC_CODE ++ | SEC_LOAD ++ | SEC_READONLY); ++ ++ sec = bfd_make_section_anyway_with_flags (dynobj, ".ulp", flags); ++ if (sec == NULL) ++ info->callbacks->einfo (_("%F%P: failed to create ULP section\n")); ++ ++ if (!bfd_set_section_alignment (sec, plt_alignment)) ++ goto error_alignment; ++ ++ htab->ulp = sec; ++ } ++ } + + if (!info->no_ld_generated_unwind_info) + { +diff --git a/bfd/elfxx-x86.h b/bfd/elfxx-x86.h +index db11327e96f..89f51382216 100644 +--- a/bfd/elfxx-x86.h ++++ b/bfd/elfxx-x86.h +@@ -607,6 +607,7 @@ struct elf_x86_link_hash_table + asection *plt_second_eh_frame; + asection *plt_got; + asection *plt_got_eh_frame; ++ asection *ulp; + + sframe_encoder_ctx *plt_cfe_ctx; + asection *plt_sframe; +@@ -694,6 +695,12 @@ extern void _bfd_x86_elf_link_report_relative_reloc + (struct bfd_link_info *, asection *, struct elf_link_hash_entry *, + Elf_Internal_Sym *, const char *, const void *); + ++extern bool _bfd_x86_elf_is_ulp_enabled ++ (struct bfd *); ++ ++extern bool _bfd_x86_elf_setup_ulp ++ (struct bfd_link_info *); ++ + #define bfd_elf64_mkobject \ + _bfd_x86_elf_mkobject + #define bfd_elf32_mkobject \ +@@ -907,6 +914,10 @@ extern void _bfd_x86_elf_link_report_relative_reloc + _bfd_elf_x86_size_relative_relocs + #define elf_backend_finish_relative_relocs \ + _bfd_elf_x86_finish_relative_relocs ++#define elf_backend_is_ulp_enabled \ ++ _bfd_x86_elf_is_ulp_enabled ++#define elf_backend_setup_ulp \ ++ _bfd_x86_elf_setup_ulp + + #define ELF_P_ALIGN ELF_MINPAGESIZE + diff --git a/baselibs.conf b/baselibs.conf new file mode 100644 index 0000000..b3aa728 --- /dev/null +++ b/baselibs.conf @@ -0,0 +1,4 @@ +binutils-devel + requires -binutils- + obsoletes "binutils- < " + diff --git a/binutils-2.41-branch.diff.gz b/binutils-2.41-branch.diff.gz new file mode 100644 index 0000000..bbb7608 --- /dev/null +++ b/binutils-2.41-branch.diff.gz @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:562743882b1f8b096af610c5064debae354cb6406d4f35fecd7aba9301745c2d +size 82856 diff --git a/binutils-2.41.tar.bz2 b/binutils-2.41.tar.bz2 new file mode 100644 index 0000000..551d4ab --- /dev/null +++ b/binutils-2.41.tar.bz2 @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:a4c4bec052f7b8370024e60389e194377f3f48b56618418ea51067f67aaab30b +size 37132937 diff --git a/binutils-2.41.tar.bz2.sig b/binutils-2.41.tar.bz2.sig new file mode 100644 index 0000000..7e4fd14 --- /dev/null +++ b/binutils-2.41.tar.bz2.sig @@ -0,0 +1,16 @@ +-----BEGIN PGP SIGNATURE----- + +iQIzBAABCAAdFiEEOiS8Ho+0CfqfFDcYE/zvid2ePE8FAmTGcUQACgkQE/zvid2e +PE94TRAAsAGH/rarx1cyAxa8x0yKjcQxERag3KE3NXN+OnRvw2bCOfVx62UA68Dt +nTCsJ46MTSECdMnMj+b6wGNXr4JDv57r4lkJxJN8TjAS+gWrouqbjvaTPOkros3L +1uElw3JLBznDktYvv2aJxBTLSPRXxaD2gMSjVYSZ5X43/ITbNx8mSToevZf2erXB +ev+FY5ROyjPwFZyXTEYqqbbdJ4A6+Fkp1UO9UiQv3leZde29ZSiBbNZUU4u5FH3x +qNq9zTd4Wlk72X1IEK/HFIVAcFbV2bV38V/r64tw5WRndYReXejtEQMm4kvzFZP4 +tcgzlTNViTN8FmVNI3P3pByFxC4VmNEbnNCGTDzltuC/RxypqMHWdkBIFU2Zpk4p +oAuRMx+7MJ0MqbZjV+VklZAqbl71oDAtUEi7gwKL/UFsRnmUbjRV00YQrXv1kmm8 +FAuK3UJbfX95MkMV9RSB4kwAdGTLv9CpWix+NGIQs17bnYXyuZPQ0OFuYM6xBDlo +IXTS3kvAgKLRni7EQ0xAh3CqQaE5vsLHf7WwTYvi4rWdt0B1hVpFJtpkAhWRrF/N +5Hey/pJgOaS2CqEpbijkfG6mGh/xNYK0T8HnHse1pKjl1U1QEgOtluVI3UF2C/H/ +FkrlClxbExTt9+UmuF/wdvttVj7hDooI7Hh11uvOVBabtlUc66E= +=6jCW +-----END PGP SIGNATURE----- diff --git a/binutils-bfd_h.patch b/binutils-bfd_h.patch new file mode 100644 index 0000000..de13c26 --- /dev/null +++ b/binutils-bfd_h.patch @@ -0,0 +1,16 @@ +Remove the #error to avoid issues with legacy not dealing with this + +--- bfd/bfd-in.h.orig 2012-11-30 13:44:35.715871571 +0100 ++++ bfd/bfd-in.h 2012-11-30 13:44:43.428871298 +0100 +@@ -25,11 +25,6 @@ + #ifndef __BFD_H_SEEN__ + #define __BFD_H_SEEN__ + +-/* PR 14072: Ensure that config.h is included first. */ +-#if !defined PACKAGE && !defined PACKAGE_VERSION +-#error config.h must be included before this header +-#endif +- + #ifdef __cplusplus + extern "C" { + #endif diff --git a/binutils-build-as-needed.diff b/binutils-build-as-needed.diff new file mode 100644 index 0000000..9ea57b1 --- /dev/null +++ b/binutils-build-as-needed.diff @@ -0,0 +1,13 @@ +Index: ld/ldmain.c +=================================================================== +--- ld/ldmain.c.orig 2017-07-26 10:07:31.862559913 +0200 ++++ ld/ldmain.c 2017-07-26 10:07:31.886560303 +0200 +@@ -309,6 +309,8 @@ main (int argc, char **argv) + yydebug = 1; + } + #endif ++ if (getenv ("SUSE_ASNEEDED") && atoi(getenv ("SUSE_ASNEEDED")) > 0) ++ input_flags.add_DT_NEEDED_for_regular = true; + + config.build_constructors = true; + config.rpath_separator = ':'; diff --git a/binutils-compat-old-behaviour.diff b/binutils-compat-old-behaviour.diff new file mode 100644 index 0000000..7ae2916 --- /dev/null +++ b/binutils-compat-old-behaviour.diff @@ -0,0 +1,63 @@ +This adjusts some testcases that expect new behaviour: +* that relaxable relocations are generated +* that separate-code is default + - this also implies that default max-page-size is 0x1000, instead of the + old 0x200000, so some testcases need to encode that as well +diff --git a/ld/testsuite/ld-elf/linux-x86.exp b/ld/testsuite/ld-elf/linux-x86.exp +index 2e0cbd37f17..fcd3dd920e4 100644 +--- a/ld/testsuite/ld-elf/linux-x86.exp ++++ b/ld/testsuite/ld-elf/linux-x86.exp +@@ -275,7 +275,7 @@ proc check_pr25749a {testname srcfilea srcfileb cflags ldflags lderror} { + } + + # Suppress warning for unsupported attribute from older GCC. +- append cflags " -w" ++ append cflags " -w -Wa,-mrelax-relocations=yes" + + exec cp $srcdir/$subdir/$srcfilea $srcfilea + exec chmod +w $srcfilea +@@ -396,7 +396,7 @@ proc check_pr25749b {testname srcfilea srcfileb cflags ldflags dsoldflags args} + [list \ + "Build lib${testname}.so ($dsoldflags)" \ + "-shared $dsoldflags tmpdir/pr25749-bin.o -z noexecstack" \ +- "-fPIC -I../bfd" \ ++ "-fPIC -I../bfd -Wa,-mrelax-relocations=yes" \ + [list $srcfileb] \ + {{readelf {-Wr} pr25749.rd}} \ + "lib${testname}.so" \ +diff --git a/ld/testsuite/ld-i386/report-reloc-1.d b/ld/testsuite/ld-i386/report-reloc-1.d +index 162161592a1..ee96047043d 100644 +--- a/ld/testsuite/ld-i386/report-reloc-1.d ++++ b/ld/testsuite/ld-i386/report-reloc-1.d +@@ -1,6 +1,6 @@ + #source: report-reloc-1.s + #as: --32 +-#ld: -pie -melf_i386 -z report-relative-reloc $NO_DT_RELR_LDFLAGS ++#ld: -pie -melf_i386 -z report-relative-reloc -z separate-code $NO_DT_RELR_LDFLAGS + #warning_output: report-reloc-1.l + #readelf: -r --wide + +diff --git a/ld/testsuite/ld-x86-64/report-reloc-1-x32.d b/ld/testsuite/ld-x86-64/report-reloc-1-x32.d +index 63fe7b1bb8a..29a94ff8762 100644 +--- a/ld/testsuite/ld-x86-64/report-reloc-1-x32.d ++++ b/ld/testsuite/ld-x86-64/report-reloc-1-x32.d +@@ -1,6 +1,6 @@ + #source: report-reloc-1.s + #as: --x32 +-#ld: -pie -melf32_x86_64 -z report-relative-reloc $NO_DT_RELR_LDFLAGS ++#ld: -pie -melf32_x86_64 -z report-relative-reloc -z separate-code -z max-page-size=4096 $NO_DT_RELR_LDFLAGS + #warning_output: report-reloc-1.l + #readelf: -r --wide + +diff --git a/ld/testsuite/ld-x86-64/report-reloc-1.d b/ld/testsuite/ld-x86-64/report-reloc-1.d +index 69f164c9434..63079acc98a 100644 +--- a/ld/testsuite/ld-x86-64/report-reloc-1.d ++++ b/ld/testsuite/ld-x86-64/report-reloc-1.d +@@ -1,6 +1,6 @@ + #source: report-reloc-1.s + #as: --64 +-#ld: -pie -melf_x86_64 -z report-relative-reloc $NO_DT_RELR_LDFLAGS ++#ld: -pie -melf_x86_64 -z report-relative-reloc -z separate-code -z max-page-size=4096 $NO_DT_RELR_LDFLAGS + #warning_output: report-reloc-1.l + #readelf: -r --wide + diff --git a/binutils-fix-abierrormsg.diff b/binutils-fix-abierrormsg.diff new file mode 100644 index 0000000..ee69e66 --- /dev/null +++ b/binutils-fix-abierrormsg.diff @@ -0,0 +1,43 @@ +This fixes an error message given too eagerly on ppc64le, +when no input files are used and as-needed is in effect. E.g.: + +% ld-new --as-needed -o /dev/null -lc + +gives an error message about input and output ABI versions being +incompatible. This is because the ABI setting of "unknown" (0) +to "from-input" is done in ppc64_elf_before_check_relocs, which +isn't called for as-needed libraries (via check_directives callback). +merge_private_bfd_data is called for as-needed and not-as-needed inputs +(via notice_as_needed), so copy that code there. + +This construct is used in some packages to check for availability +of libraries (e.g. in nvme-cli to check for -luuid). Redircting error +output makes this siletently fail. + +Index: binutils-2.35/bfd/elf64-ppc.c +=================================================================== +--- binutils-2.35.orig/bfd/elf64-ppc.c 2020-07-24 11:12:19.000000000 +0200 ++++ binutils-2.35/bfd/elf64-ppc.c 2020-08-10 17:25:00.205219071 +0200 +@@ -5310,11 +5310,17 @@ ppc64_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) + + if (iflags & ~EF_PPC64_ABI) + { +- _bfd_error_handler +- /* xgettext:c-format */ +- (_("%pB uses unknown e_flags 0x%lx"), ibfd, iflags); +- bfd_set_error (bfd_error_bad_value); +- return false; ++ if (abiversion (info->output_bfd) == 0) ++ set_abiversion (info->output_bfd, abiversion (ibfd)); ++ else ++ { ++ _bfd_error_handler ++ /* xgettext:c-format */ ++ (_("%pB: ABI version %ld is not compatible with ABI version %ld output"), ++ ibfd, iflags, oflags); ++ bfd_set_error (bfd_error_bad_value); ++ return false; ++ } + } + else if (iflags != oflags && iflags != 0) + { diff --git a/binutils-fix-invalid-op-errata.diff b/binutils-fix-invalid-op-errata.diff new file mode 100644 index 0000000..84bbc62 --- /dev/null +++ b/binutils-fix-invalid-op-errata.diff @@ -0,0 +1,25 @@ +Also reported as PR25210. There's a problem when using the two +linker options '--fix-cortex-a53-835769 --fix-cortex-a53-843419' +together. This is the default in our distro, but not upstream so +it went unnoticed. + +Leads to an error while linking any code that sports one of the +sequences that triggers the errata fixup (gcc being one of those), +namely: +ld: can not size stub section: invalid operation +ld: warning: cannot find entry symbol _start; defaulting to 0000000000400078 +ld: linker stubs: file class ELFCLASSNONE incompatible with ELFCLASS64 +ld: final link failed: file in wrong format + +--- bfd/elfnn-aarch64.c.mm 2019-09-09 13:19:43.000000000 +0000 ++++ bfd/elfnn-aarch64.c 2019-11-20 11:44:00.000000000 +0000 +@@ -4312,7 +4312,8 @@ elfNN_aarch64_size_stubs (bfd *output_bfd, + || (input_bfd->flags & BFD_LINKER_CREATED) != 0) + continue; + +- if (!_bfd_aarch64_erratum_835769_scan (input_bfd, info, ++ if (input_bfd != stub_bfd ++ && !_bfd_aarch64_erratum_835769_scan (input_bfd, info, + &num_erratum_835769_fixes)) + return false; + } diff --git a/binutils-fix-relax.diff b/binutils-fix-relax.diff new file mode 100644 index 0000000..73dd3df --- /dev/null +++ b/binutils-fix-relax.diff @@ -0,0 +1,20 @@ +Fix for bsc#1179341 + +the movload->movconst relaxation can be done only with REX +rewriting, and hence needs a GOTPCRELX relocation. With old object +files we might still see GOTPCREL relocs, even with REX bytes available. +We still can't do such rewriting and hence need to stay with the old +rewriting into a lea. +diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c +index 549a8be6a6..b89b0023db 100644 +--- a/bfd/elf64-x86-64.c ++++ b/bfd/elf64-x86-64.c +@@ -1731,7 +1731,7 @@ elf_x86_64_convert_load_reloc (bfd *abfd, + + if (opcode == 0x8b) + { +- if (abs_symbol && local_ref && relocx) ++ if (abs_symbol && local_ref && relocx && rex) + to_reloc_pc32 = false; + + if (to_reloc_pc32) diff --git a/binutils-old-makeinfo.diff b/binutils-old-makeinfo.diff new file mode 100644 index 0000000..26d760d --- /dev/null +++ b/binutils-old-makeinfo.diff @@ -0,0 +1,176 @@ +This reverts 8bb23cdbb498ff645bb0937bc8c0cb89e9e5ebd8 which +requires newer makeinfo that we don't have in SLE12. + +diff --git a/bfd/doc/bfd.texi b/bfd/doc/bfd.texi +index d8cc1ecca48..f348710845f 100644 +--- a/bfd/doc/bfd.texi ++++ b/bfd/doc/bfd.texi +@@ -75,7 +75,7 @@ Copyright @copyright{} 1991-2023 Free Software Foundation, Inc. + @end iftex + @contents + +-@node Top ++@node Top, Overview, (dir), (dir) + @ifinfo + This file documents the binary file descriptor library libbfd. + @end ifinfo +@@ -88,7 +88,7 @@ This file documents the binary file descriptor library libbfd. + * BFD Index:: BFD Index + @end menu + +-@node Overview ++@node Overview, BFD front end, Top, Top + @chapter Introduction + @cindex BFD + @cindex what is it? +@@ -114,7 +114,7 @@ their own use, for greater efficiency. + * What BFD Version 2 Can Do:: What BFD Version 2 Can Do + @end menu + +-@node History ++@node History, How It Works, Overview, Overview + @section History + + One spur behind BFD was the desire, on the part of the GNU 960 team at +@@ -137,7 +137,7 @@ and David Henkel-Wallace (@code{gumby@@cygnus.com}). + + + +-@node How It Works ++@node How It Works, What BFD Version 2 Can Do, History, Overview + @section How To Use BFD + + To use the library, include @file{bfd.h} and link with @file{libbfd.a}. +@@ -188,11 +188,11 @@ and contain subordinate BFDs. This approach is fine for a.out and coff, + but loses efficiency when applied to formats such as S-records and + IEEE-695. + +-@node What BFD Version 2 Can Do ++@node What BFD Version 2 Can Do, , How It Works, Overview + @section What BFD Version 2 Can Do + @include bfdsumm.texi + +-@node BFD front end ++@node BFD front end, BFD back ends, Overview, Top + @chapter BFD Front End + + @menu +@@ -219,7 +219,7 @@ IEEE-695. + @include bfdt.texi + @include bfdio.texi + +-@node Memory Usage ++@node Memory Usage, Sections, Miscellaneous, BFD front end + @section Memory Usage + BFD keeps all of its internal structures in obstacks. There is one obstack + per open BFD file, into which the current state is stored. When a BFD is +@@ -242,46 +242,46 @@ select the greediest open BFD, close it to reclaim the memory, perform + some operation and reopen the BFD again, to get a fresh copy of the data + structures. + +-@node Sections ++@node Sections, Symbols, Memory Usage, BFD front end + @include section.texi + +-@node Symbols ++@node Symbols, Archives, Sections, BFD front end + @include syms.texi + +-@node Archives ++@node Archives, Formats, Symbols, BFD front end + @include archive.texi + +-@node Formats ++@node Formats, Relocations, Archives, BFD front end + @include format.texi + +-@node Relocations ++@node Relocations, Core Files, Formats, BFD front end + @include reloc.texi + +-@node Core Files ++@node Core Files, Targets, Relocations, BFD front end + @include corefile.texi + +-@node Targets ++@node Targets, Architectures, Core Files, BFD front end + @include targets.texi + +-@node Architectures ++@node Architectures, Opening and Closing, Targets, BFD front end + @include archures.texi + +-@node Opening and Closing ++@node Opening and Closing, Internal, Architectures, BFD front end + @include opncls.texi + +-@node Internal ++@node Internal, File Caching, Opening and Closing, BFD front end + @include libbfd.texi + +-@node File Caching ++@node File Caching, Linker Functions, Internal, BFD front end + @include cache.texi + +-@node Linker Functions ++@node Linker Functions, Hash Tables, File Caching, BFD front end + @include linker.texi + +-@node Hash Tables ++@node Hash Tables, , Linker Functions, BFD front end + @include hash.texi + +-@node BFD back ends ++@node BFD back ends, GNU Free Documentation License, BFD front end, Top + @chapter BFD back ends + @menu + * What to Put Where:: +@@ -293,28 +293,28 @@ structures. + * srecord :: s-record backend + @end ignore + @end menu +-@node What to Put Where ++@node What to Put Where, aout, BFD back ends, BFD back ends + @section What to Put Where + All of BFD lives in one directory. + +-@node aout ++@node aout, coff, What to Put Where, BFD back ends + @include aoutx.texi + +-@node coff ++@node coff, elf, aout, BFD back ends + @include coffcode.texi + +-@node elf ++@node elf, mmo, coff, BFD back ends + @include elf.texi + @c Leave this out until the file has some actual contents... + @c @include elfcode.texi + +-@node mmo ++@node mmo, , elf, BFD back ends + @include mmo.texi + +-@node GNU Free Documentation License ++@node GNU Free Documentation License, BFD Index, BFD back ends, Top + @include fdl.texi + +-@node BFD Index ++@node BFD Index, , GNU Free Documentation License, Top + @unnumbered BFD Index + @printindex cp + +diff --git a/bfd/doc/webassembly.texi b/bfd/doc/webassembly.texi +index 5a05199d5f7..ad650943a1a 100644 +--- a/bfd/doc/webassembly.texi ++++ b/bfd/doc/webassembly.texi +@@ -27,7 +27,7 @@ in some malformed WebAssembly modules being treated as valid. + * File layout:: + @end menu + +-@node File layout ++@node File layout, WebAssembly + @subsection File layout + For a description of the WebAssembly file format, see + @url{https://github.com/WebAssembly/design/blob/master/BinaryEncoding.md}. diff --git a/binutils-pr22868.diff b/binutils-pr22868.diff new file mode 100644 index 0000000..8d68379 --- /dev/null +++ b/binutils-pr22868.diff @@ -0,0 +1,20 @@ +Fixes two testsuite fails in the gold plugin tests of LLVM. +Aka binutils/PR22868 +Index: binutils-2.30/gold/resolve.cc +=================================================================== +--- binutils-2.30.orig/gold/resolve.cc 2018-01-13 14:31:16.000000000 +0100 ++++ binutils-2.30/gold/resolve.cc 2018-03-06 16:58:42.000000000 +0100 +@@ -265,10 +265,13 @@ Symbol_table::resolve(Sized_symbol + return; + + // Likewise for an absolute symbol defined twice with the same value. ++ // plugin-symbols are always absolute with same value here, so ignore those + if (!is_ordinary + && st_shndx == elfcpp::SHN_ABS + && !to_is_ordinary + && to_shndx == elfcpp::SHN_ABS ++ && object->pluginobj() == NULL ++ && to->object()->pluginobj() == NULL + && to->value() == sym.get_st_value()) + return; + diff --git a/binutils-revert-hlasm-insns.diff b/binutils-revert-hlasm-insns.diff new file mode 100644 index 0000000..a1088d9 --- /dev/null +++ b/binutils-revert-hlasm-insns.diff @@ -0,0 +1,437 @@ +This reverts commit b10b530a4566, because generating 'jgnop' +from 'bcrl' confuses some parsing tools (in particular kernels +recordmcount.pl tool) on s390x. + +Due to the way the assembler and disassembler are implemented we need +to disable both, the assembly and disassembly of the problematic +mnemonic (that's only a problem for jgnop vs brcl, but still). +So, just revert the whole commit. + +v2: this adjusts the reversion of above commit to care for commit +0cfd6cffde32726ca69cde6ed3cc1ece21b9cf7c that changes the touched +testcases so that it applies again, so it's not a simple revert of +above commit anymore. + +(We leave out the patch to ChangeLog in the reversion) + +Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.d +=================================================================== +--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-g5.d 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.d 2022-05-13 17:56:06.000000000 +0200 +@@ -78,14 +78,10 @@ Disassembly of section .text: + .*: 07 29 [ ]*bhr %r9 + .*: 07 f9 [ ]*br %r9 + .*: a7 95 00 00 [ ]*bras %r9,e2 +-.*: a7 65 00 00 [ ]*bras %r6,e6 +-.*: a7 64 00 00 [ ]*jlh ea +-.*: a7 66 00 00 [ ]*brct %r6,ee +-.*: a7 66 00 00 [ ]*brct %r6,f2 +-.*: 84 69 00 00 [ ]*brxh %r6,%r9,f6 +-.*: 84 69 00 00 [ ]*brxh %r6,%r9,fa +-.*: 85 69 00 00 [ ]*brxle %r6,%r9,fe +-.*: 85 69 00 00 [ ]*brxle %r6,%r9,102 ++.*: a7 64 00 00 [ ]*jlh e6 ++.*: a7 66 00 00 [ ]*brct %r6,ea ++.*: 84 69 00 00 [ ]*brxh %r6,%r9,ee ++.*: 85 69 00 00 [ ]*brxle %r6,%r9,f2 + .*: b2 5a 00 69 [ ]*bsa %r6,%r9 + .*: b2 58 00 69 [ ]*bsg %r6,%r9 + .*: 0b 69 [ ]*bsm %r6,%r9 +@@ -184,49 +180,27 @@ Disassembly of section .text: + .*: b2 21 00 69 [ ]*ipte %r6,%r9 + .*: b2 29 00 69 [ ]*iske %r6,%r9 + .*: b2 23 00 69 [ ]*ivsk %r6,%r9 +-.*: a7 f4 00 00 [ ]*j 288 +-.*: a7 84 00 00 [ ]*je 28c +-.*: a7 24 00 00 [ ]*jh 290 +-.*: a7 a4 00 00 [ ]*jhe 294 +-.*: a7 44 00 00 [ ]*jl 298 +-.*: a7 c4 00 00 [ ]*jle 29c +-.*: a7 64 00 00 [ ]*jlh 2a0 +-.*: a7 44 00 00 [ ]*jl 2a4 +-.*: a7 74 00 00 [ ]*jne 2a8 +-.*: a7 d4 00 00 [ ]*jnh 2ac +-.*: a7 54 00 00 [ ]*jnhe 2b0 +-.*: a7 b4 00 00 [ ]*jnl 2b4 +-.*: a7 34 00 00 [ ]*jnle 2b8 +-.*: a7 94 00 00 [ ]*jnlh 2bc +-.*: a7 b4 00 00 [ ]*jnl 2c0 +-.*: a7 e4 00 00 [ ]*jno 2c4 +-.*: a7 d4 00 00 [ ]*jnh 2c8 +-.*: a7 74 00 00 [ ]*jne 2cc +-.*: a7 14 00 00 [ ]*jo 2d0 +-.*: a7 24 00 00 [ ]*jh 2d4 +-.*: a7 84 00 00 [ ]*je 2d8 +-.*: a7 04 00 00 [ ]*jnop 2dc +-.*: a7 14 00 00 [ ]*jo 2e0 +-.*: a7 24 00 00 [ ]*jh 2e4 +-.*: a7 24 00 00 [ ]*jh 2e8 +-.*: a7 34 00 00 [ ]*jnle 2ec +-.*: a7 44 00 00 [ ]*jl 2f0 +-.*: a7 44 00 00 [ ]*jl 2f4 +-.*: a7 54 00 00 [ ]*jnhe 2f8 +-.*: a7 64 00 00 [ ]*jlh 2fc +-.*: a7 74 00 00 [ ]*jne 300 +-.*: a7 74 00 00 [ ]*jne 304 +-.*: a7 84 00 00 [ ]*je 308 +-.*: a7 84 00 00 [ ]*je 30c +-.*: a7 94 00 00 [ ]*jnlh 310 +-.*: a7 a4 00 00 [ ]*jhe 314 +-.*: a7 b4 00 00 [ ]*jnl 318 +-.*: a7 b4 00 00 [ ]*jnl 31c +-.*: a7 c4 00 00 [ ]*jle 320 +-.*: a7 d4 00 00 [ ]*jnh 324 +-.*: a7 d4 00 00 [ ]*jnh 328 +-.*: a7 e4 00 00 [ ]*jno 32c +-.*: a7 f4 00 00 [ ]*j 330 ++.*: a7 f4 00 00 [ ]*j 278 ++.*: a7 84 00 00 [ ]*je 27c ++.*: a7 24 00 00 [ ]*jh 280 ++.*: a7 a4 00 00 [ ]*jhe 284 ++.*: a7 44 00 00 [ ]*jl 288 ++.*: a7 c4 00 00 [ ]*jle 28c ++.*: a7 64 00 00 [ ]*jlh 290 ++.*: a7 44 00 00 [ ]*jl 294 ++.*: a7 74 00 00 [ ]*jne 298 ++.*: a7 d4 00 00 [ ]*jnh 29c ++.*: a7 54 00 00 [ ]*jnhe 2a0 ++.*: a7 b4 00 00 [ ]*jnl 2a4 ++.*: a7 34 00 00 [ ]*jnle 2a8 ++.*: a7 94 00 00 [ ]*jnlh 2ac ++.*: a7 b4 00 00 [ ]*jnl 2b0 ++.*: a7 e4 00 00 [ ]*jno 2b4 ++.*: a7 d4 00 00 [ ]*jnh 2b8 ++.*: a7 74 00 00 [ ]*jne 2bc ++.*: a7 14 00 00 [ ]*jo 2c0 ++.*: a7 24 00 00 [ ]*jh 2c4 ++.*: a7 84 00 00 [ ]*je 2c8 + .*: ed 65 af ff 00 18 [ ]*kdb %f6,4095\(%r5,%r10\) + .*: b3 18 00 69 [ ]*kdbr %f6,%f9 + .*: ed 65 af ff 00 08 [ ]*keb %f6,4095\(%r5,%r10\) +@@ -509,4 +483,4 @@ Disassembly of section .text: + .*: f8 58 5f ff af ff [ ]*zap 4095\(6,%r5\),4095\(9,%r10\) + .*: b2 21 b0 69 [ ]*ipte %r6,%r9,%r11 + .*: b2 21 bd 69 [ ]*ipte %r6,%r9,%r11,13 +-.*: 07 07 [ ]*nopr %r7 ++.*: 07 07 [ ]*nopr %r7 +Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.s +=================================================================== +--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-g5.s 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.s 2022-05-13 17:56:06.000000000 +0200 +@@ -72,14 +72,10 @@ foo: + bpr %r9 + br %r9 + bras %r9,. +- jas %r6,. + brc 6,. + brct 6,. +- jct %r6,. + brxh %r6,%r9,. +- jxh %r6,%r9,. + brxle %r6,%r9,. +- jxle %r6,%r9,. + bsa %r6,%r9 + bsg %r6,%r9 + bsm %r6,%r9 +@@ -199,28 +195,6 @@ foo: + jo . + jp . + jz . +- jnop . +- bro . +- brh . +- brp . +- brnle . +- brl . +- brm . +- brnhe . +- brlh . +- brne . +- brnz . +- bre . +- brz . +- brnlh . +- brhe . +- brnl . +- brnm . +- brle . +- brnh . +- brnp . +- brno . +- bru . + kdb %f6,4095(%r5,%r10) + kdbr %f6,%f9 + keb %f6,4095(%r5,%r10) +Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.d +=================================================================== +--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-z900.d 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.d 2022-05-13 18:07:33.000000000 +0200 +@@ -6,56 +6,31 @@ + Disassembly of section .text: + + .* : +-.*: c0 f4 00 00 00 00 [ ]*jg 0 +-.*: c0 04 00 00 00 00 [ ]*jgnop 6 +-.*: c0 14 00 00 00 00 [ ]*jgo c +-.*: c0 24 00 00 00 00 [ ]*jgh 12 +-.*: c0 24 00 00 00 00 [ ]*jgh 18 +-.*: c0 34 00 00 00 00 [ ]*jgnle 1e +-.*: c0 44 00 00 00 00 [ ]*jgl 24 +-.*: c0 44 00 00 00 00 [ ]*jgl 2a +-.*: c0 54 00 00 00 00 [ ]*jgnhe 30 +-.*: c0 64 00 00 00 00 [ ]*jglh 36 +-.*: c0 74 00 00 00 00 [ ]*jgne 3c +-.*: c0 74 00 00 00 00 [ ]*jgne 42 +-.*: c0 84 00 00 00 00 [ ]*jge 48 +-.*: c0 84 00 00 00 00 [ ]*jge 4e +-.*: c0 94 00 00 00 00 [ ]*jgnlh 54 +-.*: c0 a4 00 00 00 00 [ ]*jghe 5a +-.*: c0 b4 00 00 00 00 [ ]*jgnl 60 +-.*: c0 b4 00 00 00 00 [ ]*jgnl 66 +-.*: c0 c4 00 00 00 00 [ ]*jgle 6c +-.*: c0 d4 00 00 00 00 [ ]*jgnh 72 +-.*: c0 d4 00 00 00 00 [ ]*jgnh 78 +-.*: c0 e4 00 00 00 00 [ ]*jgno 7e +-.*: c0 f4 00 00 00 00 [ ]*jg 84 +-.*: c0 14 00 00 00 00 [ ]*jgo 8a +-.*: c0 24 00 00 00 00 [ ]*jgh 90 +-.*: c0 24 00 00 00 00 [ ]*jgh 96 +-.*: c0 34 00 00 00 00 [ ]*jgnle 9c +-.*: c0 44 00 00 00 00 [ ]*jgl a2 +-.*: c0 44 00 00 00 00 [ ]*jgl a8 +-.*: c0 54 00 00 00 00 [ ]*jgnhe ae +-.*: c0 64 00 00 00 00 [ ]*jglh b4 +-.*: c0 74 00 00 00 00 [ ]*jgne ba +-.*: c0 74 00 00 00 00 [ ]*jgne c0 +-.*: c0 84 00 00 00 00 [ ]*jge c6 +-.*: c0 84 00 00 00 00 [ ]*jge cc +-.*: c0 94 00 00 00 00 [ ]*jgnlh d2 +-.*: c0 a4 00 00 00 00 [ ]*jghe d8 +-.*: c0 b4 00 00 00 00 [ ]*jgnl de +-.*: c0 b4 00 00 00 00 [ ]*jgnl e4 +-.*: c0 c4 00 00 00 00 [ ]*jgle ea +-.*: c0 d4 00 00 00 00 [ ]*jgnh f0 +-.*: c0 d4 00 00 00 00 [ ]*jgnh f6 +-.*: c0 e4 00 00 00 00 [ ]*jgno fc +-.*: c0 f4 00 00 00 00 [ ]*jg 102 +-.*: c0 65 00 00 00 00 [ ]*brasl %r6,108 +-.*: c0 65 00 00 00 00 [ ]*brasl %r6,10e +-.*: c0 65 80 00 00 00 [ ]*brasl %r6,114 +-.*: c0 65 80 00 00 00 [ ]*brasl %r6,11a +-.*: c0 65 7f ff ff ff [ ]*brasl %r6,11e +-.*: c0 65 7f ff ff ff [ ]*brasl %r6,124 ++.*: c0 f4 00 00 00 00 [ ]*jg 0 \ ++.*: c0 14 00 00 00 00 [ ]*jgo 6 \ ++.*: c0 24 00 00 00 00 [ ]*jgh c \ ++.*: c0 24 00 00 00 00 [ ]*jgh 12 \ ++.*: c0 34 00 00 00 00 [ ]*jgnle 18 \ ++.*: c0 44 00 00 00 00 [ ]*jgl 1e \ ++.*: c0 44 00 00 00 00 [ ]*jgl 24 \ ++.*: c0 54 00 00 00 00 [ ]*jgnhe 2a \ ++.*: c0 64 00 00 00 00 [ ]*jglh 30 \ ++.*: c0 74 00 00 00 00 [ ]*jgne 36 \ ++.*: c0 74 00 00 00 00 [ ]*jgne 3c \ ++.*: c0 84 00 00 00 00 [ ]*jge 42 \ ++.*: c0 84 00 00 00 00 [ ]*jge 48 \ ++.*: c0 94 00 00 00 00 [ ]*jgnlh 4e \ ++.*: c0 a4 00 00 00 00 [ ]*jghe 54 \ ++.*: c0 b4 00 00 00 00 [ ]*jgnl 5a \ ++.*: c0 b4 00 00 00 00 [ ]*jgnl 60 \ ++.*: c0 c4 00 00 00 00 [ ]*jgle 66 \ ++.*: c0 d4 00 00 00 00 [ ]*jgnh 6c \ ++.*: c0 d4 00 00 00 00 [ ]*jgnh 72 \ ++.*: c0 e4 00 00 00 00 [ ]*jgno 78 \ ++.*: c0 f4 00 00 00 00 [ ]*jg 7e \ ++.*: c0 65 00 00 00 00 [ ]*brasl %r6,84 \ ++.*: c0 65 80 00 00 00 [ ]*brasl %r6,8a ++.*: c0 65 7f ff ff ff [ ]*brasl %r6,8e + .*: 01 0b [ ]*tam + .*: 01 0c [ ]*sam24 + .*: 01 0d [ ]*sam31 +@@ -66,7 +41,7 @@ Disassembly of section .text: + .*: b9 97 00 69 [ ]*dlr %r6,%r9 + .*: b9 98 00 69 [ ]*alcr %r6,%r9 + .*: b9 99 00 69 [ ]*slbr %r6,%r9 +-.*: c0 60 00 00 00 00 [ ]*larl %r6,14e ++.*: c0 60 00 00 00 00 [ ]*larl %r6,b8 + .*: e3 65 af ff 00 1e [ ]*lrv %r6,4095\(%r5,%r10\) + .*: e3 65 af ff 00 1f [ ]*lrvh %r6,4095\(%r5,%r10\) + .*: e3 65 af ff 00 3e [ ]*strv %r6,4095\(%r5,%r10\) +@@ -76,4 +51,3 @@ Disassembly of section .text: + .*: e3 65 af ff 00 98 [ ]*alc %r6,4095\(%r5,%r10\) + .*: e3 65 af ff 00 99 [ ]*slb %r6,4095\(%r5,%r10\) + .*: eb 69 5f ff 00 1d [ ]*rll %r6,%r9,4095\(%r5\) +-.*: 07 07 [ ]*nopr %r7 +Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.s +=================================================================== +--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-z900.s 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.s 2022-05-13 17:57:59.000000000 +0200 +@@ -1,7 +1,6 @@ + .text + foo: + brcl 15,. +- jgnop . + jgo . + jgh . + jgp . +@@ -23,33 +22,9 @@ foo: + jgnp . + jgno . + jg . +- brol . +- brhl . +- brpl . +- brnlel . +- brll . +- brml . +- brnhel . +- brlhl . +- brnel . +- brnzl . +- brel . +- brzl . +- brnlhl . +- brhel . +- brnll . +- brnml . +- brlel . +- brnhl . +- brnpl . +- brnol . +- brul . + brasl %r6,. +- jasl %r6,. + brasl %r6,.-0x100000000 +- jasl %r6,.-0x100000000 + brasl %r6,.+0xfffffffe +- jasl %r6,.+0xfffffffe + tam + sam24 + sam31 +Index: binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.d +=================================================================== +--- binutils-2.38.50.orig/gas/testsuite/gas/s390/zarch-z900.d 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.d 2022-05-13 17:56:06.000000000 +0200 +@@ -20,11 +20,8 @@ Disassembly of section .text: + .*: e3 95 af ff 00 46 [ ]*bctg %r9,4095\(%r5,%r10\) + .*: b9 46 00 96 [ ]*bctgr %r9,%r6 + .*: a7 97 00 00 [ ]*brctg %r9,40 \ +-.*: a7 67 00 00 [ ]*brctg %r6,44 +-.*: ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,48 +-.*: ec 69 00 00 00 44 [ ]*brxhg %r6,%r9,4e +-.*: ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,54 +-.*: ec 69 00 00 00 45 [ ]*brxlg %r6,%r9,5a ++.*: ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,44 ++.*: ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,4a + .*: eb 96 5f ff 00 44 [ ]*bxhg %r9,%r6,4095\(%r5\) + .*: eb 96 5f ff 00 45 [ ]*bxleg %r9,%r6,4095\(%r5\) + .*: b3 a5 00 96 [ ]*cdgbr %f9,%r6 +Index: binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.s +=================================================================== +--- binutils-2.38.50.orig/gas/testsuite/gas/s390/zarch-z900.s 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.s 2022-05-13 17:56:06.000000000 +0200 +@@ -14,11 +14,8 @@ foo: + bctg %r9,4095(%r5,%r10) + bctgr %r9,%r6 + brctg %r9,. +- jctg %r6,. + brxhg %r9,%r6,. +- jxhg %r6,%r9,. + brxlg %r9,%r6,. +- jxleg %r6,%r9,. + bxhg %r9,%r6,4095(%r5) + bxleg %r9,%r6,4095(%r5) + cdgbr %f9,%r6 +Index: binutils-2.38.50/ld/testsuite/ld-s390/tlsbin_64.dd +=================================================================== +--- binutils-2.38.50.orig/ld/testsuite/ld-s390/tlsbin_64.dd 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/ld/testsuite/ld-s390/tlsbin_64.dd 2022-05-13 17:56:06.000000000 +0200 +@@ -87,26 +87,26 @@ Disassembly of section .text: + +[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\) + # GD -> LE with global variable defined in executable + +[0-9a-f]+: e3 20 d0 10 00 04 lg %r2,16\(%r13\) +- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ ++ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ + +[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\) + # GD -> LE with local variable defined in executable + +[0-9a-f]+: e3 20 d0 18 00 04 lg %r2,24\(%r13\) +- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ ++ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ + +[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\) + # GD -> LE with hidden variable defined in executable + +[0-9a-f]+: e3 20 d0 20 00 04 lg %r2,32\(%r13\) +- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ ++ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ + +[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\) + # LD -> LE + +[0-9a-f]+: e3 20 d0 28 00 04 lg %r2,40\(%r13\) +- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ ++ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ + +[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\) + +[0-9a-f]+: e3 40 d0 30 00 04 lg %r4,48\(%r13\) + +[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\) + +[0-9a-f]+: e3 40 d0 38 00 04 lg %r4,56\(%r13\) + +[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\) + +[0-9a-f]+: e3 20 d0 40 00 04 lg %r2,64\(%r13\) +- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ ++ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ + +[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\) + +[0-9a-f]+: e3 40 d0 48 00 04 lg %r4,72\(%r13\) + +[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\) +Index: binutils-2.38.50/opcodes/s390-opc.txt +=================================================================== +--- binutils-2.38.50.orig/opcodes/s390-opc.txt 2022-05-13 17:56:05.000000000 +0200 ++++ binutils-2.38.50/opcodes/s390-opc.txt 2022-05-13 17:56:06.000000000 +0200 +@@ -246,14 +246,10 @@ d7 xc SS_L0RDRD "exclusive OR" g5 esa,za + f8 zap SS_LLRDRD "zero and add" g5 esa,zarch + a70a ahi RI_RI "add halfword immediate" g5 esa,zarch + 84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch +-84 jxh RSI_RRP "branch relative on index high" g5 esa,zarch + 85 brxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch +-85 jxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch + a705 bras RI_RP "branch relative and save" g5 esa,zarch +-a705 jas RI_RP "branch relative and save" g5 esa,zarch + a704 brc RI_UP "branch relative on condition" g5 esa,zarch + a706 brct RI_RP "branch relative on count" g5 esa,zarch +-a706 jct RI_RP "branch relative on count" g5 esa,zarch + b241 cksm RRE_RR "checksum" g5 esa,zarch + a70e chi RI_RI "compare halfword immediate" g5 esa,zarch + a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch +@@ -272,11 +268,8 @@ a701 tml RI_RU "test under mask low" g5 + 4700 nop RX_0RRD "no operation" g5 esa,zarch optparm + 4700 b*8 RX_0RRD "conditional branch" g5 esa,zarch + 47f0 b RX_0RRD "unconditional branch" g5 esa,zarch +-a704 jnop RI_0P "nop jump" g5 esa,zarch + a704 j*8 RI_0P "conditional jump" g5 esa,zarch +-a704 br*8 RI_0P "conditional jump" g5 esa,zarch + a7f4 j RI_0P "unconditional jump" g5 esa,zarch +-a7f4 bru RI_0P "unconditional jump" g5 esa,zarch + b34a axbr RRE_FEFE "add extended bfp" g5 esa,zarch + b31a adbr RRE_FF "add long bfp" g5 esa,zarch + ed000000001a adb RXE_FRRD "add long bfp" g5 esa,zarch +@@ -444,9 +437,7 @@ e3000000001b slgf RXE_RRRD "subtract log + e3000000000c msg RXE_RRRD "multiply single 64" z900 zarch + e3000000001c msgf RXE_RRRD "multiply single 64<32" z900 zarch + ec0000000044 brxhg RIE_RRP "branch relative on index high 64" z900 zarch +-ec0000000044 jxhg RIE_RRP "branch relative on index high 64" z900 zarch + ec0000000045 brxlg RIE_RRP "branch relative on index low or equal 64" z900 zarch +-ec0000000045 jxleg RIE_RRP "branch relative on index low or equal 64" z900 zarch + eb0000000044 bxhg RSE_RRRD "branch on index high 64" z900 zarch + eb0000000045 bxleg RSE_RRRD "branch on index low or equal 64" z900 zarch + eb000000000c srlg RSE_RRRD "shift right single logical 64" z900 zarch +@@ -471,15 +462,10 @@ eb0000000080 icmh RSE_RURD "insert chara + a702 tmhh RI_RU "test under mask high high" z900 zarch + a703 tmhl RI_RU "test under mask high low" z900 zarch + c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch +-c004 jgnop RIL_0P "nop jump long" z900 esa,zarch + c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch +-c004 br*8l RIL_0P "conditional jump long" z900 esa,zarch + c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch +-c0f4 brul RIL_0P "unconditional jump long" z900 esa,zarch + c005 brasl RIL_RP "branch relative and save long" z900 esa,zarch +-c005 jasl RIL_RP "branch relative and save long" z900 esa,zarch + a707 brctg RI_RP "branch relative on count 64" z900 zarch +-a707 jctg RI_RP "branch relative on count 64" z900 zarch + a709 lghi RI_RI "load halfword immediate 64" z900 zarch + a70b aghi RI_RI "add halfword immediate 64" z900 zarch + a70d mghi RI_RI "multiply halfword immediate 64" z900 zarch diff --git a/binutils-revert-nm-symversion.diff b/binutils-revert-nm-symversion.diff new file mode 100644 index 0000000..5e656c3 --- /dev/null +++ b/binutils-revert-nm-symversion.diff @@ -0,0 +1,34 @@ +Some packages of ours rely on the output of nm to not contain +symversions. E.g. perf uses 'nm -D' to construct a linker input +file with symbol names. ld errors on the '@' characters. Until +those packages are fixed we use this patch. We have to carry it +for old code streams forever. + +diff --git a/binutils/nm.c b/binutils/nm.c +index 2637756c647..253714ef179 100644 +--- a/binutils/nm.c ++++ b/binutils/nm.c +@@ -666,7 +666,7 @@ print_symname (const char *form, struct extended_symbol_info *info, + name = convert_utf8 (name); + } + +- if (info != NULL && info->elfinfo && with_symbol_versions) ++ if (info != NULL && info->elfinfo && with_symbol_versions && 0) + { + const char *version_string; + bool hidden; +diff --git a/ld/testsuite/ld-elf/pr25708.d b/ld/testsuite/ld-elf/pr25708.d +index 60b8e31807a..1b62e25347e 100644 +--- a/ld/testsuite/ld-elf/pr25708.d ++++ b/ld/testsuite/ld-elf/pr25708.d +@@ -2,8 +2,9 @@ + #ld: -shared -version-script pr13195.t + #nm: -D --with-symbol-versions + #target: *-*-linux* *-*-gnu* arm*-*-uclinuxfdpiceabi +-#xfail: hppa64-*-* ![check_shared_lib_support] ++#xfail: *-*-* ![check_shared_lib_support] + # h8300 doesn't support -shared, and hppa64 creates .foo ++# our binutils revert the printing of symversions with nm -D + + #.. + 0+ A VERS_2.0 diff --git a/binutils-revert-plt32-in-branches.diff b/binutils-revert-plt32-in-branches.diff new file mode 100644 index 0000000..9848bf0 --- /dev/null +++ b/binutils-revert-plt32-in-branches.diff @@ -0,0 +1,578 @@ +This reverts the below commit to not generate PLT32 relocs +on branches by default. Used for old distros to not have to +update several packages/tools that can't handle them. I.e. +a compatibility patch. + +The patch isn't exactly the reverse of commit bd7ab16b +because commit 83924b38 later moved the checking code +around somewhat. + +The changes in nop-[345].d and pr22842b.S are followups to +not break the testsuite because of this revert. +As are the changes to x86-64-branch-2.d and x86-64-branch-3.d. + +commit bd7ab16b4537788ad53521c45469a1bdae84ad4a +Author: H.J. Lu +Date: Tue Feb 13 07:34:22 2018 -0800 + + x86-64: Generate branch with PLT32 relocation + + Since there is no need to prepare for PLT branch on x86-64, generate + R_X86_64_PLT32, instead of R_X86_64_PC32, if possible, which can be + used as a marker for 32-bit PC-relative branches. + + To compile Linux kernel, this patch: + + From: "H.J. Lu" + Subject: [PATCH] x86: Treat R_X86_64_PLT32 as R_X86_64_PC32 + + On i386, there are 2 types of PLTs, PIC and non-PIC. PIE and shared + objects must use PIC PLT. To use PIC PLT, you need to load + _GLOBAL_OFFSET_TABLE_ into EBX first. There is no need for that on + x86-64 since x86-64 uses PC-relative PLT. + + On x86-64, for 32-bit PC-relative branches, we can generate PLT32 + relocation, instead of PC32 relocation, which can also be used as + a marker for 32-bit PC-relative branches. Linker can always reduce + PLT32 relocation to PC32 if function is defined locally. Local + functions should use PC32 relocation. As far as Linux kernel is + concerned, R_X86_64_PLT32 can be treated the same as R_X86_64_PC32 + since Linux kernel doesn't use PLT. + + is needed. It is available on hjl/plt32/master branch at + + https://github.com/hjl-tools/linux + + bfd/ + + PR gas/22791 + * elf64-x86-64.c (is_32bit_relative_branch): Removed. + (elf_x86_64_relocate_section): Check PIC relocations in PIE. + Remove is_32bit_relative_branch usage. Disallow PC32 reloc + against protected function in shared object. + + gas/ + + PR gas/22791 + * config/tc-i386.c (need_plt32_p): New function. + (output_jump): Generate BFD_RELOC_X86_64_PLT32 if possible. + (md_estimate_size_before_relax): Likewise. + * testsuite/gas/i386/reloc64.d: Updated. + * testsuite/gas/i386/x86-64-jump.d: Likewise. + * testsuite/gas/i386/x86-64-mpx-branch-1.d: Likewise. + * testsuite/gas/i386/x86-64-mpx-branch-2.d: Likewise. + * testsuite/gas/i386/x86-64-relax-2.d: Likewise. + * testsuite/gas/i386/x86-64-relax-3.d: Likewise. + * testsuite/gas/i386/ilp32/reloc64.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise. + + ld/ + + PR gas/22791 + * testsuite/ld-x86-64/mpx1c.rd: Updated. + * testsuite/ld-x86-64/pr22791-1.err: New file. + * testsuite/ld-x86-64/pr22791-1a.c: Likewise. + * testsuite/ld-x86-64/pr22791-1b.s: Likewise. + * testsuite/ld-x86-64/pr22791-2.rd: Likewise. + * testsuite/ld-x86-64/pr22791-2a.s: Likewise. + * testsuite/ld-x86-64/pr22791-2b.c: Likewise. + * testsuite/ld-x86-64/pr22791-2c.s: Likewise. + * testsuite/ld-x86-64/x86-64.exp: Run PR ld/22791 tests. + +diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c +index dc416a7f..b9f96729 100644 +--- a/bfd/elf64-x86-64.c ++++ b/bfd/elf64-x86-64.c +@@ -1817,6 +1817,24 @@ elf_x86_64_convert_load_reloc (bfd *abfd, + return true; + } + ++/* Is the instruction before OFFSET in CONTENTS a 32bit relative ++ branch? */ ++ ++static bool ++is_32bit_relative_branch (bfd_byte *contents, bfd_vma offset) ++{ ++ /* Opcode Instruction ++ 0xe8 call ++ 0xe9 jump ++ 0x0f 0x8x conditional jump */ ++ return ((offset > 0 ++ && (contents [offset - 1] == 0xe8 ++ || contents [offset - 1] == 0xe9)) ++ || (offset > 1 ++ && contents [offset - 2] == 0x0f ++ && (contents [offset - 1] & 0xf0) == 0x80)); ++} ++ + /* Look through the relocs for a section during the first phase, and + calculate needed space in the global offset table, and procedure + linkage table. */ +@@ -3159,9 +3177,6 @@ elf_x86_64_relocate_section (bfd *output_bfd, + && (eh == NULL + || !UNDEFINED_WEAK_RESOLVED_TO_ZERO (info, + eh))) +- || (bfd_link_pie (info) +- && !SYMBOL_DEFINED_NON_SHARED_P (h) +- && h->def_dynamic) + || (no_copyreloc_p + && h->def_dynamic + && !(h->root.u.def.section->flags & SEC_CODE)))) +@@ -3170,20 +3185,25 @@ elf_x86_64_relocate_section (bfd *output_bfd, + || bfd_link_dll (info))) + { + bool fail = false; ++ bool branch ++ = ((r_type == R_X86_64_PC32 ++ || r_type == R_X86_64_PC32_BND) ++ && is_32bit_relative_branch (contents, rel->r_offset)); ++ + if (SYMBOL_REFERENCES_LOCAL_P (info, h)) + { + /* Symbol is referenced locally. Make sure it is +- defined locally. */ +- fail = !SYMBOL_DEFINED_NON_SHARED_P (h); ++ defined locally or for a branch. */ ++ fail = !SYMBOL_DEFINED_NON_SHARED_P (h) && !branch; + } + else if (bfd_link_pie (info)) + { + /* We can only use PC-relative relocations in PIE +- from non-code sections. */ ++ from non-code sections or branches. */ + if (h->root.type == bfd_link_hash_undefweak + || (h->type == STT_FUNC + && (sec->flags & SEC_CODE) != 0)) +- fail = true; ++ fail = !branch; + } + else if (no_copyreloc_p || bfd_link_dll (info)) + { +@@ -3192,9 +3212,10 @@ elf_x86_64_relocate_section (bfd *output_bfd, + relocations against default and protected + symbols since address of protected function + and location of protected data may not be in +- the shared object. */ ++ the shared object. We do allow branch to symbol ++ with non-default visibility. */ + fail = (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT +- || ELF_ST_VISIBILITY (h->other) == STV_PROTECTED); ++ || !branch); + } + + if (fail) +diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c +index d3441988e34..8f8fb086cd8 100644 +--- a/gas/config/tc-i386.c ++++ b/gas/config/tc-i386.c +@@ -8793,55 +8793,12 @@ output_branch (void) + frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p); + } + +-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) +-/* Return TRUE iff PLT32 relocation should be used for branching to +- symbol S. */ +- +-static bool +-need_plt32_p (symbolS *s) +-{ +- /* PLT32 relocation is ELF only. */ +- if (!IS_ELF) +- return false; +- +-#ifdef TE_SOLARIS +- /* Don't emit PLT32 relocation on Solaris: neither native linker nor +- krtld support it. */ +- return false; +-#endif +- +- /* Since there is no need to prepare for PLT branch on x86-64, we +- can generate R_X86_64_PLT32, instead of R_X86_64_PC32, which can +- be used as a marker for 32-bit PC-relative branches. */ +- if (!object_64bit) +- return false; +- +- if (s == NULL) +- return false; +- +- /* Weak or undefined symbol need PLT32 relocation. */ +- if (S_IS_WEAK (s) || !S_IS_DEFINED (s)) +- return true; +- +- /* Non-global symbol doesn't need PLT32 relocation. */ +- if (! S_IS_EXTERNAL (s)) +- return false; +- +- /* Other global symbols need PLT32 relocation. NB: Symbol with +- non-default visibilities are treated as normal global symbol +- so that PLT32 relocation can be used as a marker for 32-bit +- PC-relative branches. It is useful for linker relaxation. */ +- return true; +-} +-#endif +- + static void + output_jump (void) + { + char *p; + int size; + fixS *fixP; +- bfd_reloc_code_real_type jump_reloc = i.reloc[0]; + + if (i.tm.opcode_modifier.jump == JUMP_BYTE) + { +@@ -8990,17 +8947,8 @@ output_jump (void) + abort (); + } + +-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) +- if (flag_code == CODE_64BIT && size == 4 +- && jump_reloc == NO_RELOC && i.op[0].disps->X_add_number == 0 +- && need_plt32_p (i.op[0].disps->X_add_symbol)) +- jump_reloc = BFD_RELOC_X86_64_PLT32; +-#endif +- +- jump_reloc = reloc (size, 1, 1, jump_reloc); +- + fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size, +- i.op[0].disps, 1, jump_reloc); ++ i.op[0].disps, 1, reloc (size, 1, 1, i.reloc[0])); + + /* All jumps handled here are signed, but don't unconditionally use a + signed limit check for 32 and 16 bit jumps as we want to allow wrap +@@ -12299,11 +12247,6 @@ md_estimate_size_before_relax (fragS *fragP, segT segment) + reloc_type = (enum bfd_reloc_code_real) fragP->fr_var; + else if (size == 2) + reloc_type = BFD_RELOC_16_PCREL; +-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) +- else if (fragP->tc_frag_data.code64 && fragP->fr_offset == 0 +- && need_plt32_p (fragP->fr_symbol)) +- reloc_type = BFD_RELOC_X86_64_PLT32; +-#endif + else + reloc_type = BFD_RELOC_32_PCREL; + +diff --git a/gas/testsuite/gas/i386/ilp32/reloc64.d b/gas/testsuite/gas/i386/ilp32/reloc64.d +index 78ca3fd9e38..a961679754a 100644 +--- a/gas/testsuite/gas/i386/ilp32/reloc64.d ++++ b/gas/testsuite/gas/i386/ilp32/reloc64.d +@@ -17,7 +17,7 @@ Disassembly of section \.text: + .*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1 + .*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4 + .*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4 +-.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4 ++.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4 + .*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1 + .*[ ]+R_X86_64_GOT32[ ]+xtrn + .*[ ]+R_X86_64_GOT32[ ]+xtrn +diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-branch.d b/gas/testsuite/gas/i386/ilp32/x86-64-branch.d +index acf8c42ca97..57845fdc208 100644 +--- a/gas/testsuite/gas/i386/ilp32/x86-64-branch.d ++++ b/gas/testsuite/gas/i386/ilp32/x86-64-branch.d +@@ -20,9 +20,9 @@ Disassembly of section .text: + [ ]*[a-f0-9]+: 66 ff 20 data16 jmp \*\(%rax\) + [ ]*[a-f0-9]+: e8 00 00 00 00 call (0x)?1f <.*> 1b: R_X86_64_PC32 \*ABS\*\+0x10003c + [ ]*[a-f0-9]+: e9 00 00 00 00 jmp (0x)?24 <.*> 20: R_X86_64_PC32 \*ABS\*\+0x10003c +-[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 call (0x)?2a <.*> 26: R_X86_64_PLT32 foo-0x4 +-[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmp (0x)?30 <.*> 2c: R_X86_64_PLT32 foo-0x4 +-[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb (0x)?37 <.*> 33: R_X86_64_PLT32 foo-0x4 ++[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 call (0x)?2a <.*> 26: R_X86_64_PC32 foo-0x4 ++[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmp (0x)?30 <.*> 2c: R_X86_64_PC32 foo-0x4 ++[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb (0x)?37 <.*> 33: R_X86_64_PC32 foo-0x4 + [ ]*[a-f0-9]+: 66 c3 data16 ret + [ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8 + [ ]*[a-f0-9]+: 3e 74 03[ ]+je,pt +[0-9a-fx]+ <.*> +diff --git a/gas/testsuite/gas/i386/reloc64.d b/gas/testsuite/gas/i386/reloc64.d +index 540a9b77d35..ea16c68de4b 100644 +--- a/gas/testsuite/gas/i386/reloc64.d ++++ b/gas/testsuite/gas/i386/reloc64.d +@@ -20,7 +20,7 @@ Disassembly of section \.text: + .*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1 + .*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4 + .*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4 +-.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4 ++.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4 + .*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1 + .*[ ]+R_X86_64_GOT64[ ]+xtrn + .*[ ]+R_X86_64_GOT32[ ]+xtrn +diff --git a/gas/testsuite/gas/i386/x86-64-branch-2.d b/gas/testsuite/gas/i386/x86-64-branch-2.d +index fab75a6394c..e025de90b68 100644 +--- a/gas/testsuite/gas/i386/x86-64-branch-2.d ++++ b/gas/testsuite/gas/i386/x86-64-branch-2.d +@@ -9,12 +9,12 @@ Disassembly of section .text: + + 0+ : + [ ]*[a-f0-9]+: 66 e9 00 00 jmpw 4 2: R_X86_64_PC16 foo-0x2 +-[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp b 7: R_X86_64_PLT32 foo-0x4 ++[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp b 7: R_X86_64_PC32 foo-0x4 + + 0+b : + [ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx + [ ]*[a-f0-9]+: 66 e8 00 00 callw 11 f: R_X86_64_PC16 foo-0x2 +-[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 14: R_X86_64_PLT32 foo-0x4 ++[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 14: R_X86_64_PC32 foo-0x4 + [ ]*[a-f0-9]+: 66 c3 retw + [ ]*[a-f0-9]+: 66 c2 08 00 retw \$0x8 + #pass +diff --git a/gas/testsuite/gas/i386/x86-64-jump.d b/gas/testsuite/gas/i386/x86-64-jump.d +index 7d2c994ce26..58ad424badb 100644 +--- a/gas/testsuite/gas/i386/x86-64-jump.d ++++ b/gas/testsuite/gas/i386/x86-64-jump.d +@@ -9,7 +9,7 @@ Disassembly of section .text: + + 0+ <.text>: + [ ]*[a-f0-9]+: eb fe jmp (0x0|0 <.text>) +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 0x7 3: R_X86_64_PLT32 xxx-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 0x7 3: R_X86_64_PC32 xxx-0x4 + [ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmp \*0x0 a: R_X86_64_32S xxx + [ ]*[a-f0-9]+: ff e7 jmp \*%rdi + [ ]*[a-f0-9]+: ff 27 jmp \*\(%rdi\) +@@ -18,7 +18,7 @@ Disassembly of section .text: + [ ]*[a-f0-9]+: ff 2c 25 00 00 00 00 ljmp \*0x0 24: R_X86_64_32S xxx + [ ]*[a-f0-9]+: 66 ff 2c 25 00 00 00 00 ljmpw \*0x0 2c: R_X86_64_32S xxx + [ ]*[a-f0-9]+: e8 cb ff ff ff call 0x0 +-[ ]*[a-f0-9]+: e8 00 00 00 00 call 0x3a 36: R_X86_64_PLT32 xxx-0x4 ++[ ]*[a-f0-9]+: e8 00 00 00 00 call 0x3a 36: R_X86_64_PC32 xxx-0x4 + [ ]*[a-f0-9]+: ff 14 25 00 00 00 00 call \*0x0 3d: R_X86_64_32S xxx + [ ]*[a-f0-9]+: ff d7 call \*%rdi + [ ]*[a-f0-9]+: ff 17 call \*\(%rdi\) +diff --git a/gas/testsuite/gas/i386/x86-64-nop-3.d b/gas/testsuite/gas/i386/x86-64-nop-3.d +index 1975481cc59..436487b5a99 100644 +--- a/gas/testsuite/gas/i386/x86-64-nop-3.d ++++ b/gas/testsuite/gas/i386/x86-64-nop-3.d +@@ -18,5 +18,5 @@ Disassembly of section .text: + Disassembly of section .altinstr_replacement: + + 0+ <.altinstr_replacement>: +- +[a-f0-9]+: e9 00 00 00 00 jmp 5 <_start\+0x5> 1: R_X86_64_PLT32 foo-0x4 ++ +[a-f0-9]+: e9 00 00 00 00 jmp 5 <_start\+0x5> 1: R_X86_64_PC32 foo-0x4 + #pass +diff --git a/gas/testsuite/gas/i386/x86-64-nop-4.d b/gas/testsuite/gas/i386/x86-64-nop-4.d +index 2da858db994..e390628b335 100644 +--- a/gas/testsuite/gas/i386/x86-64-nop-4.d ++++ b/gas/testsuite/gas/i386/x86-64-nop-4.d +@@ -21,5 +21,5 @@ Disassembly of section .altinstr_replacement: + +[a-f0-9]+: 89 c0 mov %eax,%eax + +[a-f0-9]+: 89 c0 mov %eax,%eax + +[a-f0-9]+: 89 c0 mov %eax,%eax +- +[a-f0-9]+: e9 00 00 00 00 jmp b <_start\+0xb> 7: R_X86_64_PLT32 foo-0x4 ++ +[a-f0-9]+: e9 00 00 00 00 jmp b <_start\+0xb> 7: R_X86_64_PC32 foo-0x4 + #pass +diff --git a/gas/testsuite/gas/i386/x86-64-nop-5.d b/gas/testsuite/gas/i386/x86-64-nop-5.d +index d5c84c1edf8..69820d54de8 100644 +--- a/gas/testsuite/gas/i386/x86-64-nop-5.d ++++ b/gas/testsuite/gas/i386/x86-64-nop-5.d +@@ -24,5 +24,5 @@ Disassembly of section .altinstr_replacement: + +[a-f0-9]+: 89 c0 mov %eax,%eax + +[a-f0-9]+: 89 c0 mov %eax,%eax + +[a-f0-9]+: 89 c0 mov %eax,%eax +- +[a-f0-9]+: e9 00 00 00 00 jmp d <_start\+0xd> 9: R_X86_64_PLT32 foo-0x4 ++ +[a-f0-9]+: e9 00 00 00 00 jmp d <_start\+0xd> 9: R_X86_64_PC32 foo-0x4 + #pass +diff --git a/gas/testsuite/gas/i386/x86-64-relax-2.d b/gas/testsuite/gas/i386/x86-64-relax-2.d +index fba47c14850..0949ab23907 100644 +--- a/gas/testsuite/gas/i386/x86-64-relax-2.d ++++ b/gas/testsuite/gas/i386/x86-64-relax-2.d +@@ -11,12 +11,12 @@ Disassembly of section .text: + 0+ : + [ ]*[a-f0-9]+: eb 24 jmp 26 + [ ]*[a-f0-9]+: eb 1e jmp 22 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 9 5: R_X86_64_PLT32 global_def-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 9 5: R_X86_64_PC32 global_def-0x4 + [ ]*[a-f0-9]+: e9 00 00 00 00 jmp e a: R_X86_64_PLT32 global_def-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 13 f: R_X86_64_PLT32 weak_def-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 18 14: R_X86_64_PLT32 weak_hidden_undef-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1d 19: R_X86_64_PLT32 weak_hidden_def-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 22 1e: R_X86_64_PLT32 hidden_undef-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 13 f: R_X86_64_PC32 weak_def-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 18 14: R_X86_64_PC32 weak_hidden_undef-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1d 19: R_X86_64_PC32 weak_hidden_def-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 22 1e: R_X86_64_PC32 hidden_undef-0x4 + + 0+22 : + [ ]*[a-f0-9]+: c3 ret +diff --git a/gas/testsuite/gas/i386/x86-64-relax-3.d b/gas/testsuite/gas/i386/x86-64-relax-3.d +index 01df9ef340e..d16e6a55395 100644 +--- a/gas/testsuite/gas/i386/x86-64-relax-3.d ++++ b/gas/testsuite/gas/i386/x86-64-relax-3.d +@@ -12,10 +12,10 @@ Disassembly of section .text: + [ ]*[a-f0-9]+: eb 1b jmp 1f + [ ]*[a-f0-9]+: eb 1b jmp 21 + [ ]*[a-f0-9]+: e9 00 00 00 00 jmp b 7: R_X86_64_PLT32 global_def-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 10 c: R_X86_64_PLT32 weak_def-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 15 11: R_X86_64_PLT32 weak_hidden_undef-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1a 16: R_X86_64_PLT32 weak_hidden_def-0x4 +-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1f 1b: R_X86_64_PLT32 hidden_undef-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 10 c: R_X86_64_PC32 weak_def-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 15 11: R_X86_64_PC32 weak_hidden_undef-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1a 16: R_X86_64_PC32 weak_hidden_def-0x4 ++[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1f 1b: R_X86_64_PC32 hidden_undef-0x4 + + 0+1f : + [ ]*[a-f0-9]+: c3 ret +diff --git a/ld/testsuite/ld-x86-64/pr22791-1.err b/ld/testsuite/ld-x86-64/pr22791-1.err +deleted file mode 100644 +index 8c5565992e7..00000000000 +--- a/ld/testsuite/ld-x86-64/pr22791-1.err ++++ /dev/null +@@ -1,2 +0,0 @@ +-.*relocation R_X86_64_PC32 against symbol `foo' can not be used when making a PIE object; recompile with -fPIE +-#... +diff --git a/ld/testsuite/ld-x86-64/pr22791-1a.c b/ld/testsuite/ld-x86-64/pr22791-1a.c +deleted file mode 100644 +index cd0130cacdf..00000000000 +--- a/ld/testsuite/ld-x86-64/pr22791-1a.c ++++ /dev/null +@@ -1,4 +0,0 @@ +-void +-foo (void) +-{ +-} +diff --git a/ld/testsuite/ld-x86-64/pr22791-1b.s b/ld/testsuite/ld-x86-64/pr22791-1b.s +deleted file mode 100644 +index 9751db49aa5..00000000000 +--- a/ld/testsuite/ld-x86-64/pr22791-1b.s ++++ /dev/null +@@ -1,7 +0,0 @@ +- .text +- .globl main +- .type main, @function +-main: +- movl foo(%rip), %eax +- .size main, .-main +- .section .note.GNU-stack +diff --git a/ld/testsuite/ld-x86-64/pr22791-2.rd b/ld/testsuite/ld-x86-64/pr22791-2.rd +deleted file mode 100644 +index 70deb30d84d..00000000000 +--- a/ld/testsuite/ld-x86-64/pr22791-2.rd ++++ /dev/null +@@ -1,6 +0,0 @@ +-#failif +-#... +-.*\(TEXTREL\).* +-#... +-[0-9a-f ]+R_X86_64_NONE.* +-#... +diff --git a/ld/testsuite/ld-x86-64/pr22791-2a.s b/ld/testsuite/ld-x86-64/pr22791-2a.s +deleted file mode 100644 +index 0a855024d74..00000000000 +--- a/ld/testsuite/ld-x86-64/pr22791-2a.s ++++ /dev/null +@@ -1,8 +0,0 @@ +- .text +- .p2align 4,,15 +- .globl foo +- .type foo, @function +-foo: +- jmp bar +- .size foo, .-foo +- .section .note.GNU-stack,"",@progbits +diff --git a/ld/testsuite/ld-x86-64/pr22791-2b.c b/ld/testsuite/ld-x86-64/pr22791-2b.c +deleted file mode 100644 +index 79ef27c0857..00000000000 +--- a/ld/testsuite/ld-x86-64/pr22791-2b.c ++++ /dev/null +@@ -1,7 +0,0 @@ +-#include +- +-void +-bar (void) +-{ +- puts ("PASS"); +-} +diff --git a/ld/testsuite/ld-x86-64/pr22791-2c.s b/ld/testsuite/ld-x86-64/pr22791-2c.s +deleted file mode 100644 +index 1460d1b8288..00000000000 +--- a/ld/testsuite/ld-x86-64/pr22791-2c.s ++++ /dev/null +@@ -1,12 +0,0 @@ +- .text +- .p2align 4,,15 +- .globl main +- .type main, @function +-main: +- subq $8, %rsp +- call foo +- xorl %eax, %eax +- addq $8, %rsp +- ret +- .size main, .-main +- .section .note.GNU-stack,"",@progbits +diff --git a/ld/testsuite/ld-x86-64/pr22842b.S b/ld/testsuite/ld-x86-64/pr22842b.S +index f0659cd901e..b9dd81345b7 100644 +--- a/ld/testsuite/ld-x86-64/pr22842b.S ++++ b/ld/testsuite/ld-x86-64/pr22842b.S +@@ -7,7 +7,7 @@ main: + leaq bar(%rip), %rdi + addq %rax, %rdi + +- callq foo ++ callq foo@PLT + xorl %eax, %eax + popq %rcx + retq +diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp +index 17fd10ee121..b4ae52ab376 100644 +--- a/ld/testsuite/ld-x86-64/x86-64.exp ++++ b/ld/testsuite/ld-x86-64/x86-64.exp +@@ -1264,44 +1264,6 @@ if { [isnative] && [check_compiler_available] } { + {readelf -lW pr22393-3b.rd}} \ + "pr22393-3-static" \ + ] \ +- [list \ +- "Build pr22791-1.so" \ +- "-shared" \ +- "-fPIC -Wa,-mx86-used-note=yes" \ +- { pr22791-1a.c } \ +- {} \ +- "pr22791-1.so" \ +- ] \ +- [list \ +- "Build pr22791-1" \ +- "-pie -Wl,--no-as-needed,-z,notext tmpdir/pr22791-1.so" \ +- "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \ +- { pr22791-1b.s } \ +- {{error_output "pr22791-1.err"}} \ +- "pr22791-1" \ +- ] \ +- [list \ +- "Build pr22791-2a.o" \ +- "" \ +- "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \ +- { pr22791-2a.s } \ +- ] \ +- [list \ +- "Build pr22791-2.so" \ +- "-shared tmpdir/pr22791-2a.o" \ +- "-fPIC -Wa,-mx86-used-note=yes" \ +- { pr22791-2b.c } \ +- {{readelf -drW pr22791-2.rd}} \ +- "pr22791-2.so" \ +- ] \ +- [list \ +- "Build pr22791-2" \ +- "-pie -Wl,--no-as-needed tmpdir/pr22791-2.so" \ +- "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \ +- { pr22791-2c.s } \ +- {{readelf -drW pr22791-2.rd}} \ +- "pr22791-2" \ +- ] \ + [list \ + "Build pr22842.so" \ + "-shared" \ +@@ -1703,15 +1665,6 @@ if { [isnative] && [check_compiler_available] } { + "pr22393-3-static" \ + "pass.out" \ + ] \ +- [list \ +- "Run pr22791-2" \ +- "-pie -Wl,--no-as-needed tmpdir/pr22791-2.so" \ +- "-Wa,-mx86-used-note=yes" \ +- { pr22791-2c.s } \ +- "pr22791-2" \ +- "pass.out" \ +- "$NOPIE_CFLAGS" \ +- ] \ + [list \ + "Run pr22842" \ + "-pie -Wl,--no-as-needed tmpdir/pr22842.so" \ diff --git a/binutils-revert-rela.diff b/binutils-revert-rela.diff new file mode 100644 index 0000000..5ac3ab8 --- /dev/null +++ b/binutils-revert-rela.diff @@ -0,0 +1,375 @@ +This is for bsc#1198422 + +This essentially reverts commit 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8 +to return back to old behaviour regarding RELA relocs: old binutils +used the relocated field as additional addend, relying on it being +zero for normal RELA behaviour. This isn't correct according to the +psABI, but some old tools (e.g. older ICC) emit object files where +the in-field "addend" is to be used (and record the zero in the A field +of the RELA reloc). This change was included starting with binutils 2.37, +but for older codestreams we want to be compatible with the old (buggy) +behaviour. We revert the change for all relocs and not just those for +which it arguably made some sense or where we had a report about (PLT32). + +On x86-64 this reversion interacts with the linker support for DT_RELR, +i.e. packed relative relocs. To calculate the info for that the linker +goes through the input relocation multiple times and the obvious result +with the above reversion happens: the addends are added multiple times +resulting in those packed relative relocs to all have an addend twice +as large as wanted. As old codestreams don't have the necessary support +for DT_RELR anyway (in the dynamic linker) we disable it whole-sale as +well. Only x86-64 and ppc64(le) have packed relative relocs +and while ppc64le DT_RELR support would work there's still the problem +of missing support in ld.so. + +(This also disables the few explicit dt-relr tests that don't use the +proper predicate to guard themself) + + +Index: binutils-2.41/bfd/elf64-x86-64.c +=================================================================== +--- binutils-2.41.orig/bfd/elf64-x86-64.c 2023-08-16 17:34:14.991069097 +0200 ++++ binutils-2.41/bfd/elf64-x86-64.c 2023-08-16 17:34:48.295651473 +0200 +@@ -48,127 +48,127 @@ static reloc_howto_type x86_64_elf_howto + bfd_elf_generic_reloc, "R_X86_64_NONE", false, 0, 0x00000000, + false), + HOWTO(R_X86_64_64, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_PC32, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_PC32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_PC32", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_GOT32, 0, 4, 32, false, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOT32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_GOT32", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_PLT32, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_PLT32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_PLT32", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_COPY, 0, 4, 32, false, 0, complain_overflow_bitfield, +- bfd_elf_generic_reloc, "R_X86_64_COPY", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_COPY", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_GLOB_DAT, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_GLOB_DAT", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_GLOB_DAT", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_JUMP_SLOT, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_JUMP_SLOT", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_JUMP_SLOT", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_RELATIVE, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_RELATIVE", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_RELATIVE", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_GOTPCREL, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOTPCREL", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_GOTPCREL", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_32, 0, 4, 32, false, 0, complain_overflow_unsigned, +- bfd_elf_generic_reloc, "R_X86_64_32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_32", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_32S, 0, 4, 32, false, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_32S", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_32S", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_16, 0, 2, 16, false, 0, complain_overflow_bitfield, +- bfd_elf_generic_reloc, "R_X86_64_16", false, 0, 0xffff, false), ++ bfd_elf_generic_reloc, "R_X86_64_16", false, 0xffff, 0xffff, false), + HOWTO(R_X86_64_PC16, 0, 2, 16, true, 0, complain_overflow_bitfield, +- bfd_elf_generic_reloc, "R_X86_64_PC16", false, 0, 0xffff, true), ++ bfd_elf_generic_reloc, "R_X86_64_PC16", false, 0xffff, 0xffff, true), + HOWTO(R_X86_64_8, 0, 1, 8, false, 0, complain_overflow_bitfield, +- bfd_elf_generic_reloc, "R_X86_64_8", false, 0, 0xff, false), ++ bfd_elf_generic_reloc, "R_X86_64_8", false, 0xff, 0xff, false), + HOWTO(R_X86_64_PC8, 0, 1, 8, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_PC8", false, 0, 0xff, true), ++ bfd_elf_generic_reloc, "R_X86_64_PC8", false, 0xff, 0xff, true), + HOWTO(R_X86_64_DTPMOD64, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_DTPMOD64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_DTPMOD64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_DTPOFF64, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_DTPOFF64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_DTPOFF64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_TPOFF64, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_TPOFF64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_TPOFF64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_TLSGD, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_TLSGD", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_TLSGD", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_TLSLD, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_TLSLD", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_TLSLD", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_DTPOFF32, 0, 4, 32, false, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_DTPOFF32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_DTPOFF32", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_GOTTPOFF, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOTTPOFF", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_GOTTPOFF", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_TPOFF32, 0, 4, 32, false, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_TPOFF32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_TPOFF32", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_PC64, 0, 8, 64, true, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_PC64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_PC64", false, MINUS_ONE, MINUS_ONE, + true), + HOWTO(R_X86_64_GOTOFF64, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_GOTOFF64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_GOTOFF64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_GOTPC32, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOTPC32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_GOTPC32", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_GOT64, 0, 8, 64, false, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOT64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_GOT64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_GOTPCREL64, 0, 8, 64, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOTPCREL64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_GOTPCREL64", false, MINUS_ONE, MINUS_ONE, + true), + HOWTO(R_X86_64_GOTPC64, 0, 8, 64, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOTPC64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_GOTPC64", false, MINUS_ONE, MINUS_ONE, + true), + HOWTO(R_X86_64_GOTPLT64, 0, 8, 64, false, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOTPLT64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_GOTPLT64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_PLTOFF64, 0, 8, 64, false, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_PLTOFF64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_PLTOFF64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_SIZE32, 0, 4, 32, false, 0, complain_overflow_unsigned, +- bfd_elf_generic_reloc, "R_X86_64_SIZE32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_SIZE32", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_SIZE64, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_SIZE64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_SIZE64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_GOTPC32_TLSDESC, 0, 4, 32, true, 0, + complain_overflow_bitfield, bfd_elf_generic_reloc, +- "R_X86_64_GOTPC32_TLSDESC", false, 0, 0xffffffff, true), ++ "R_X86_64_GOTPC32_TLSDESC", false, 0xffffffff, 0xffffffff, true), + HOWTO(R_X86_64_TLSDESC_CALL, 0, 0, 0, false, 0, + complain_overflow_dont, bfd_elf_generic_reloc, + "R_X86_64_TLSDESC_CALL", + false, 0, 0, false), + HOWTO(R_X86_64_TLSDESC, 0, 8, 64, false, 0, + complain_overflow_dont, bfd_elf_generic_reloc, +- "R_X86_64_TLSDESC", false, 0, MINUS_ONE, false), ++ "R_X86_64_TLSDESC", false, MINUS_ONE, MINUS_ONE, false), + HOWTO(R_X86_64_IRELATIVE, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_IRELATIVE", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_IRELATIVE", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_RELATIVE64, 0, 8, 64, false, 0, complain_overflow_dont, +- bfd_elf_generic_reloc, "R_X86_64_RELATIVE64", false, 0, MINUS_ONE, ++ bfd_elf_generic_reloc, "R_X86_64_RELATIVE64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_PC32_BND, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_PC32_BND", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_PC32_BND", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_PLT32_BND, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_PLT32_BND", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_PLT32_BND", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_GOTPCRELX, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_GOTPCRELX", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_GOTPCRELX", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_REX_GOTPCRELX, 0, 4, 32, true, 0, complain_overflow_signed, +- bfd_elf_generic_reloc, "R_X86_64_REX_GOTPCRELX", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_REX_GOTPCRELX", false, 0xffffffff, 0xffffffff, + true), + + /* We have a gap in the reloc numbers here. +@@ -189,7 +189,7 @@ static reloc_howto_type x86_64_elf_howto + + /* Use complain_overflow_bitfield on R_X86_64_32 for x32. */ + HOWTO(R_X86_64_32, 0, 4, 32, false, 0, complain_overflow_bitfield, +- bfd_elf_generic_reloc, "R_X86_64_32", false, 0, 0xffffffff, ++ bfd_elf_generic_reloc, "R_X86_64_32", false, 0xffffffff, 0xffffffff, + false) + }; + +Index: binutils-2.41/gas/testsuite/gas/i386/rela.d +=================================================================== +--- binutils-2.41.orig/gas/testsuite/gas/i386/rela.d 2023-07-03 01:00:00.000000000 +0200 ++++ /dev/null 1970-01-01 00:00:00.000000000 +0000 +@@ -1,13 +0,0 @@ +-#name: x86-64 rela relocs w/ non-zero relocated fields +-#objdump: -rsj .data +- +-.*: +file format .* +- +-RELOCATION RECORDS FOR \[\.data\]: +- +-OFFSET +TYPE +VALUE +-0*0 R_X86_64_64 *q +-0*8 R_X86_64_32 *l +- +-Contents of section .data: +- 0+0 11 ?11 ?11 ?11 22 ?22 ?22 ?22 33 ?33 ?33 ?33 44 ?44 ?44 ?44 .* +Index: binutils-2.41/gas/testsuite/gas/i386/rela.s +=================================================================== +--- binutils-2.41.orig/gas/testsuite/gas/i386/rela.s 2023-07-03 01:00:00.000000000 +0200 ++++ /dev/null 1970-01-01 00:00:00.000000000 +0000 +@@ -1,14 +0,0 @@ +-# Note: This file is also used by an ld test case. +- +- .text +- .global _start +-_start: +- ret +- +- .data +- .p2align 4 +-l: .long 0x11111111, 0x22222222 +-q: .quad 0x4444444433333333 +- +- .reloc l, BFD_RELOC_64, q +- .reloc q, BFD_RELOC_32, l +Index: binutils-2.41/ld/testsuite/ld-x86-64/rela.d +=================================================================== +--- binutils-2.41.orig/ld/testsuite/ld-x86-64/rela.d 2023-07-03 01:00:00.000000000 +0200 ++++ /dev/null 1970-01-01 00:00:00.000000000 +0000 +@@ -1,10 +0,0 @@ +-#name: x86-64 rela relocs w/ non-zero relocated fields +-#as: --64 +-#source: ${srcdir}/../../../gas/testsuite/gas/i386/rela.s +-#ld: -melf_x86_64 +-#objdump: -sj .data +- +-.*: +file format .* +- +-Contents of section .data: +- *[0-9a-f]*0 .8 ?.. ?.. ?.. 00 ?00 ?00 ?00 .0 ?.. ?.. ?.. 44 ?44 ?44 ?44 .* +Index: binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp +=================================================================== +--- binutils-2.41.orig/ld/testsuite/ld-x86-64/x86-64.exp 2023-08-16 17:34:14.967068677 +0200 ++++ binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp 2023-08-16 17:34:48.295651473 +0200 +@@ -286,7 +286,6 @@ run_dump_test "apic" + run_dump_test "pcrel8" + run_dump_test "pcrel16" + run_dump_test "pcrel16-2" +-run_dump_test "rela" + run_dump_test "tlsgd2" + run_dump_test "tlsgd3" + run_dump_test "tlsgd12" +@@ -501,10 +500,10 @@ run_dump_test "pr27491-1c" + run_dump_test "pr27491-2" + run_dump_test "pr27491-3" + run_dump_test "pr27491-4" +-run_dump_test "dt-relr-1a" +-run_dump_test "dt-relr-1a-x32" +-run_dump_test "dt-relr-1b" +-run_dump_test "dt-relr-1b-x32" ++#run_dump_test "dt-relr-1a" ++#run_dump_test "dt-relr-1a-x32" ++#run_dump_test "dt-relr-1b" ++#run_dump_test "dt-relr-1b-x32" + + if { ![skip_sframe_tests] } { + run_dump_test "sframe-simple-1" +Index: binutils-2.41/binutils/testsuite/lib/binutils-common.exp +=================================================================== +--- binutils-2.41.orig/binutils/testsuite/lib/binutils-common.exp 2023-07-03 01:00:00.000000000 +0200 ++++ binutils-2.41/binutils/testsuite/lib/binutils-common.exp 2023-08-16 17:34:48.295651473 +0200 +@@ -442,6 +442,8 @@ proc supports_persistent_section {} { + + # Whether a target support DT_RELR sections. + proc supports_dt_relr {} { ++ # on old codestreams we don't support DT_RELR anywhere ++ return 0 + if { ([istarget x86_64-*-*] + || [istarget i?86-*-*] + || [istarget powerpc64*-*-*]) +Index: binutils-2.41/ld/emulparams/dt-relr.sh +=================================================================== +--- binutils-2.41.orig/ld/emulparams/dt-relr.sh 2023-07-03 01:00:00.000000000 +0200 ++++ binutils-2.41/ld/emulparams/dt-relr.sh 2023-08-16 17:34:48.295651473 +0200 +@@ -1,3 +1,8 @@ ++if false; then ++ # on old codestreams we don't have the DT_RELR support in the dynamic ++ # linker, and additionally DT_RELR support will generate bad relocs ++ # when binutils-revert-rela.diff is active (as addends will be ++ # applied multiple times). Just disable all DT_RELR support. + HAVE_DT_RELR=yes + PARSE_AND_LIST_OPTIONS_PACK_RELATIVE_RELOCS=' + fprintf (file, _("\ +@@ -16,3 +21,5 @@ PARSE_AND_LIST_ARGS_CASE_Z_PACK_RELATIVE + + PARSE_AND_LIST_OPTIONS="$PARSE_AND_LIST_OPTIONS $PARSE_AND_LIST_OPTIONS_PACK_RELATIVE_RELOCS" + PARSE_AND_LIST_ARGS_CASE_Z="$PARSE_AND_LIST_ARGS_CASE_Z $PARSE_AND_LIST_ARGS_CASE_Z_PACK_RELATIVE_RELOCS" ++ ++fi +Index: binutils-2.41/ld/testsuite/ld-i386/i386.exp +=================================================================== +--- binutils-2.41.orig/ld/testsuite/ld-i386/i386.exp 2023-07-03 01:00:00.000000000 +0200 ++++ binutils-2.41/ld/testsuite/ld-i386/i386.exp 2023-08-16 17:34:48.299651544 +0200 +@@ -507,8 +507,8 @@ run_dump_test "pr27491-1c" + run_dump_test "pr27491-2" + run_dump_test "pr27491-3" + run_dump_test "pr27491-4" +-run_dump_test "dt-relr-1a" +-run_dump_test "dt-relr-1b" ++#run_dump_test "dt-relr-1a" ++#run_dump_test "dt-relr-1b" + run_dump_test "pr28870" + run_dump_test "pr28894" + +Index: binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp +=================================================================== +--- binutils-2.41.orig/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-16 17:34:14.895067416 +0200 ++++ binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-16 17:34:48.299651544 +0200 +@@ -378,14 +378,14 @@ set ppc64elftests { + "-a64" {abs-reloc.s} + {{objdump {-sdr} abs-shared.d} + {readelf {-rW} abs-shared.r}} "abs-shared"} +- {"abs-pie-relr" "-melf64ppc -pie --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" +- "-a64" {abs-reloc.s} +- {{objdump {-sdr} abs-pie-relr.d} +- {readelf {-rW} abs-pie-relr.r}} "abs-pie-relr"} +- {"abs-shared-relr" "-melf64ppc -shared --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" +- "-a64" {abs-reloc.s} +- {{objdump {-sdr} abs-shared-relr.d} +- {readelf {-rW} abs-shared-relr.r}} "abs-shared-relr"} ++# {"abs-pie-relr" "-melf64ppc -pie --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" ++# "-a64" {abs-reloc.s} ++# {{objdump {-sdr} abs-pie-relr.d} ++# {readelf {-rW} abs-pie-relr.r}} "abs-pie-relr"} ++# {"abs-shared-relr" "-melf64ppc -shared --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" ++# "-a64" {abs-reloc.s} ++# {{objdump {-sdr} abs-shared-relr.d} ++# {readelf {-rW} abs-shared-relr.r}} "abs-shared-relr"} + } + + set ppceabitests { +Index: binutils-2.41/gas/testsuite/gas/i386/x86-64.exp +=================================================================== +--- binutils-2.41.orig/gas/testsuite/gas/i386/x86-64.exp 2023-07-03 01:00:00.000000000 +0200 ++++ binutils-2.41/gas/testsuite/gas/i386/x86-64.exp 2023-08-16 17:38:35.023605534 +0200 +@@ -588,7 +588,6 @@ if [is_elf_format] then { + run_list_test "reloc64" "--defsym _bad_=1" + run_list_test "x86-64-inval-tls" + run_dump_test "mixed-mode-reloc64" +- run_dump_test "rela" + run_dump_test "x86-64-ifunc" + if { [gas_32_check] } then { + run_dump_test "x86-64-opcode-inval" diff --git a/binutils-skip-rpaths.patch b/binutils-skip-rpaths.patch new file mode 100644 index 0000000..2da9ab0 --- /dev/null +++ b/binutils-skip-rpaths.patch @@ -0,0 +1,127 @@ +diff --git a/ld/emultempl/elf.em b/ld/emultempl/elf.em +index 42c552b36e..dd0a6b1e60 100644 +--- a/ld/emultempl/elf.em ++++ b/ld/emultempl/elf.em +@@ -135,6 +135,8 @@ if test x"$LDEMUL_BEFORE_ALLOCATION" != xgld"$EMULATION_NAME"_before_allocation; + if test x"${ELF_INTERPRETER_NAME}" = x; then + ELF_INTERPRETER_NAME=NULL + fi ++ ++ libpath_nl=`echo ${NATIVE_LIB_DIRS// /\\\n}` + fragment < rpath) ++ cw[-1] = 0; ++ ++ *cw = 0; ++ } ++ else ++ { ++ while (*cr && *cr != ':') ++ cr++; ++ if (*cr == ':') ++ cr++; ++ } ++ } ++ if (*rpath == '\0') ++ { ++ free (rpath); ++ rpath = NULL; ++ } ++ } ++ } + + for (abfd = link_info.input_bfds; abfd; abfd = abfd->link.next) + if (bfd_get_flavour (abfd) == bfd_target_elf_flavour) diff --git a/binutils-use-less-memory.diff b/binutils-use-less-memory.diff new file mode 100644 index 0000000..c17daff --- /dev/null +++ b/binutils-use-less-memory.diff @@ -0,0 +1,131 @@ +We need this for libQt5WebEngine on i586. (bsc#1216908) + +From 836654b1177ab305c36fe7319f08f0ad5d4fac1b Mon Sep 17 00:00:00 2001 +From: Michael Matz +Date: Tue, 7 Nov 2023 16:54:44 +0100 +Subject: ld: Avoid overflows in string merging +To: binutils@sourceware.org + +as the bug report shows we had an overflow in the test if +hash table resizing is needed. Reorder the expression to avoid +that. There's still a bug somewhere in gracefully handling +failure in resizing (e.g. out of memory), but this pushes the +boundary for that occurring somewhen into the future and +immediately helps the reporter. + + bfd/ + + PR ld/31009 + * merge.c (NEEDS_RESIZE): New macro avoiding overflow. + (sec_merge_maybe_resize): Use it. + (sec_merge_hash_insert): Ditto. +--- + bfd/merge.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +diff --git a/bfd/merge.c b/bfd/merge.c +index 722e6659486..61ffab4d706 100644 +--- a/bfd/merge.c ++++ b/bfd/merge.c +@@ -94,6 +94,10 @@ struct sec_merge_hash + struct sec_merge_hash_entry **values; + }; + ++/* True when given NEWCOUNT and NBUCKETS indicate that the hash table needs ++ resizing. */ ++#define NEEDS_RESIZE(newcount, nbuckets) ((newcount) > (nbuckets) / 3 * 2) ++ + struct sec_merge_sec_info; + + /* Information per merged blob. This is the unit of merging and is +@@ -167,7 +171,7 @@ static bool + sec_merge_maybe_resize (struct sec_merge_hash *table, unsigned added) + { + struct bfd_hash_table *bfdtab = &table->table; +- if (bfdtab->count + added > table->nbuckets * 2 / 3) ++ if (NEEDS_RESIZE (bfdtab->count + added, table->nbuckets)) + { + unsigned i; + unsigned long newnb = table->nbuckets * 2; +@@ -175,7 +179,7 @@ sec_merge_maybe_resize (struct sec_merge_hash *table, unsigned added) + uint64_t *newl; + unsigned long alloc; + +- while (bfdtab->count + added > newnb * 2 / 3) ++ while (NEEDS_RESIZE (bfdtab->count + added, newnb)) + { + newnb *= 2; + if (!newnb) +@@ -239,8 +243,8 @@ sec_merge_hash_insert (struct sec_merge_hash *table, + hashp->alignment = 0; + hashp->u.suffix = NULL; + hashp->next = NULL; +- // We must not need resizing, otherwise _index is wrong +- BFD_ASSERT (bfdtab->count + 1 <= table->nbuckets * 2 / 3); ++ // We must not need resizing, otherwise the estimation was wrong ++ BFD_ASSERT (!NEEDS_RESIZE (bfdtab->count + 1, table->nbuckets)); + bfdtab->count++; + table->key_lens[_index] = (hash << 32) | (uint32_t)len; + table->values[_index] = hashp; +-- +2.42.0 + + +From 21160d8a18dc21aafb8ab1026e13e5c524954a46 Mon Sep 17 00:00:00 2001 +From: Michael Matz +Date: Tue, 7 Nov 2023 17:12:46 +0100 +Subject: bfd: use less memory in string merging +To: binutils@sourceware.org + +the offset-to-entry mappings are allocated in blocks, which may +become a bit wasteful in case there are extremely many small +input files or sections. This made it so that a large project +(Qt5WebEngine) didn't build anymore on x86 32bit due to address +space limits. It barely fit into address space before the new +string merging, and then got pushed over the limit by this. + +So instead of leaving the waste reallocate the maps to their final +size once known. Now the link barely fits again. + +bfd/ + * merge.c (record_section): Reallocate offset maps to their + final size. +--- + bfd/merge.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/bfd/merge.c b/bfd/merge.c +index 61ffab4d706..eeaa1a01fe3 100644 +--- a/bfd/merge.c ++++ b/bfd/merge.c +@@ -711,6 +711,7 @@ record_section (struct sec_merge_info *sinfo, + unsigned int align; + bfd_size_type amt; + bfd_byte *contents; ++ void *tmpptr; + + amt = sec->size; + if (sec->flags & SEC_STRINGS) +@@ -771,6 +772,19 @@ record_section (struct sec_merge_info *sinfo, + + free (contents); + contents = NULL; ++ ++ /* We allocate the ofsmap arrays in blocks of 2048 elements. ++ In case we have very many small input files/sections, ++ this might waste large amounts of memory, so reallocate these ++ arrays here to their true size. */ ++ amt = secinfo->noffsetmap + 1; ++ tmpptr = bfd_realloc (secinfo->map, amt * sizeof(secinfo->map[0])); ++ if (tmpptr) ++ secinfo->map = tmpptr; ++ tmpptr = bfd_realloc (secinfo->map_ofs, amt * sizeof(secinfo->map_ofs[0])); ++ if (tmpptr) ++ secinfo->map_ofs = tmpptr; ++ + /*printf ("ZZZ %s:%s %u entries\n", sec->owner->filename, sec->name, + (unsigned)secinfo->noffsetmap);*/ + +-- +2.42.0 + diff --git a/binutils-znow.patch b/binutils-znow.patch new file mode 100644 index 0000000..332c0f5 --- /dev/null +++ b/binutils-znow.patch @@ -0,0 +1,15 @@ +Index: binutils-2.38/ld/ldmain.c +=================================================================== +--- ld/ldmain.c ++++ ld/ldmain.c +@@ -309,6 +309,10 @@ main (int argc, char **argv) + #endif + if (getenv ("SUSE_ASNEEDED") && atoi(getenv ("SUSE_ASNEEDED")) > 0) + input_flags.add_DT_NEEDED_for_regular = true; ++ if (getenv ("SUSE_ZNOW") && atoi(getenv ("SUSE_ZNOW")) > 0) { ++ link_info.flags |= (bfd_vma) DF_BIND_NOW; ++ link_info.flags_1 |= (bfd_vma) DF_1_NOW; ++ } + + config.build_constructors = true; + config.rpath_separator = ':'; diff --git a/binutils.changes b/binutils.changes new file mode 100644 index 0000000..5a6ee99 --- /dev/null +++ b/binutils.changes @@ -0,0 +1,4508 @@ +------------------------------------------------------------------- +Thu Nov 9 16:51:13 UTC 2023 - Michael Matz + +- Add binutils-use-less-memory.diff to be a little nicer to 32bit + userspace and huge links. [bsc#1216908] + +------------------------------------------------------------------- +Mon Sep 25 11:12:43 UTC 2023 - Andreas Schwab + +- riscv-relro.patch: RISC-V: Protect .got with relro + +------------------------------------------------------------------- +Thu Sep 14 12:27:48 UTC 2023 - Michael Matz + +- Add libzstd-devel to Requires of binutils-devel. (bsc#1215341) + +------------------------------------------------------------------- +Wed Aug 16 14:36:57 UTC 2023 - Michael Matz + +- Update to version 2.41 [PED-5778]: +* The MIPS port now supports the Sony Interactive Entertainment Allegrex + processor, used with the PlayStation Portable, which implements the MIPS + II ISA along with a single-precision FPU and a few implementation-specific + integer instructions. +* Objdump's --private option can now be used on PE format files to display the + fields in the file header and section headers. +* New versioned release of libsframe: libsframe.so.1. This release introduces + versioned symbols with version node name LIBSFRAME_1.0. This release also + updates the ABI in an incompatible way: this includes removal of + sframe_get_funcdesc_with_addr API, change in the behavior of + sframe_fre_get_ra_offset and sframe_fre_get_fp_offset APIs. +* SFrame Version 2 is now the default (and only) format version supported by + gas, ld, readelf and objdump. +* Add command-line option, --strip-section-headers, to objcopy and strip to + remove ELF section header from ELF file. +* The RISC-V port now supports the following new standard extensions: + - Zicond (conditional zero instructions) + - Zfa (additional floating-point instructions) + - Zvbb, Zvbc, Zvkg, Zvkned, Zvknh[ab], Zvksed, Zvksh, Zvkn, Zvknc, Zvkng, + Zvks, Zvksc, Zvkg, Zvkt (vector crypto instructions) +* The RISC-V port now supports the following vendor-defined extensions: + - XVentanaCondOps +* Add support for Intel FRED, LKGS and AMX-COMPLEX instructions. +* A new .insn directive is recognized by x86 gas. +* Add SME2 support to the AArch64 port. +* The linker now accepts a command line option of --remap-inputs + = to relace any input file that matches with + . In addition the option --remap-inputs-file= can be used to + specify a file containing any number of these remapping directives. +* The linker command line option --print-map-locals can be used to include + local symbols in a linker map. (ELF targets only). +* For most ELF based targets, if the --enable-linker-version option is used + then the version of the linker will be inserted as a string into the .comment + section. +* The linker script syntax has a new command for output sections: ASCIZ "string" + This will insert a zero-terminated string at the current location. +* Add command-line option, -z nosectionheader, to omit ELF section + header. +- Removed obsolete patches: binutils-2.40-branch.diff.gz, + riscv-dynamic-tls-reloc-pie.patch, riscv-pr22263-1.patch, + extensa-gcc-4_3-fix.diff . +- Add binutils-2.41-branch.diff.gz . +- Add binutils-old-makeinfo.diff for SLE-12 and older. +- Rebased aarch64-common-pagesize.patch and binutils-revert-rela.diff . +- Contains fixes for these non-CVEs (not security bugs per upstreams + SECURITY.md): + * bsc#1209642 aka CVE-2023-1579 aka PR29988 + * bsc#1210297 aka CVE-2023-1972 aka PR30285 + * bsc#1210733 aka CVE-2023-2222 aka PR29936 + * bsc#1213458 aka CVE-2021-32256 aka PR105039 (gcc) + * bsc#1214565 aka CVE-2020-19726 aka PR26240 + * bsc#1214567 aka CVE-2022-35206 aka PR29290 + * bsc#1214579 aka CVE-2022-35205 aka PR29289 + * bsc#1214580 aka CVE-2022-44840 aka PR29732 + * bsc#1214604 aka CVE-2022-45703 aka PR29799 + * bsc#1214611 aka CVE-2022-48065 aka PR29925 + * bsc#1214619 aka CVE-2022-48064 aka PR29922 + * bsc#1214620 aka CVE-2022-48063 aka PR29924 + * bsc#1214623 aka CVE-2022-47696 aka PR29677 + * bsc#1214624 aka CVE-2022-47695 aka PR29846 + * bsc#1214625 aka CVE-2022-47673 aka PR29876 + +------------------------------------------------------------------- +Thu Jul 13 14:31:57 UTC 2023 - Michael Matz + +- Add binutils-disable-dt-relr.sh for an compatibility problem + caused by binutils-revert-rela.diff in SLE codestreams. + Needed for update of glibc as that would otherwise pick up + the broken relative relocs support. [bsc#1213282, PED-1435] +- This only existed only for a very short while in SLE-15, as the main + variant in devel:gcc subsumed this in binutils-revert-rela.diff. + Hence: +- Remove binutils-disable-dt-relr.sh as subsumed. + +------------------------------------------------------------------- +Tue May 30 09:43:15 UTC 2023 - Andreas Schwab + +- riscv-dynamic-tls-reloc-pie.patch: Backport for PR ld/22263 and PR + ld/25694 +- riscv-pr22263-1.patch: Backport for PR ld/22263 + +------------------------------------------------------------------- +Wed Apr 12 14:56:56 UTC 2023 - Martin Liška + +- Rebase branch patch (includes fix for PR30281). + +------------------------------------------------------------------- +Tue Mar 21 16:33:06 UTC 2023 - Martin Liška + +- Document fixed CVEs: + * bnc#1208037 aka CVE-2023-25588 aka PR29677 + * bnc#1208038 aka CVE-2023-25587 aka PR29846 + * bnc#1208040 aka CVE-2023-25585 aka PR29892 + * bnc#1208409 aka CVE-2023-0687 aka PR29444 + +------------------------------------------------------------------- +Thu Mar 16 14:18:53 UTC 2023 - Richard Biener + +- Enable bpf-none cross target and add bpf-none to the multitarget + set of supported targets. + +------------------------------------------------------------------- +Wed Mar 8 15:31:09 UTC 2023 - Michael Matz + +- Disable packed-relative-relocs for old codestreams. They generate + buggy relocations when binutils-revert-rela.diff is active. + [bsc#1206556] + +------------------------------------------------------------------- +Thu Feb 23 09:11:50 UTC 2023 - Martin Liška + +- Disable ZSTD debug section compress by default. + +------------------------------------------------------------------- +Tue Feb 21 15:32:02 UTC 2023 - Martin Liška + +- Enable zstd compression algorithm (instead of zlib) + for debug info sections by default. + +------------------------------------------------------------------- +Mon Jan 30 09:18:59 UTC 2023 - Martin Liška + +- Pack libgprofng only for supported platforms. + +------------------------------------------------------------------- +Fri Jan 27 19:06:39 UTC 2023 - Martin Liška + +- Remove upstreamed patch binutils-maxpagesize.diff. + +------------------------------------------------------------------- +Fri Jan 27 09:56:13 UTC 2023 - Martin Liška + +- Rebase binutils-2.40-branch.diff.gz as it includes fix for PR30043. +- Move libgprofng-related libraries to the proper locations (packages). +- Add --without=bootstrap for skipping of bootstrap (faster testing + of the package). + +------------------------------------------------------------------- +Tue Jan 24 12:52:49 UTC 2023 - Richard Biener + +- Remove broken arm32-avoid-copyreloc.patch to fix [gcc#108515] + +------------------------------------------------------------------- +Mon Jan 16 08:34:07 UTC 2023 - Martin Liška + +- Update to version 2.40: +* Objdump has a new command line option --show-all-symbols which will make it + display all symbols that match a given address when disassembling. (Normally + only the first symbol that matches an address is shown). +* Add --enable-colored-disassembly configure time option to enable colored + disassembly output by default, if the output device is a terminal. Note, + this configure option is disabled by default. +* DCO signed contributions are now accepted. +* objcopy --decompress-debug-sections now supports zstd compressed debug + sections. The new option --compress-debug-sections=zstd compresses debug + sections with zstd. +* addr2line and objdump --dwarf now support zstd compressed debug sections. +* The dlltool program now accepts --deterministic-libraries and + --non-deterministic-libraries as command line options to control whether or + not it generates deterministic output libraries. If neither of these options + are used the default is whatever was set when the binutils were configured. +* readelf and objdump now have a newly added option --sframe which dumps the + SFrame section. +* Add support for Intel RAO-INT instructions. +* Add support for Intel AVX-NE-CONVERT instructions. +* Add support for Intel MSRLIST instructions. +* Add support for Intel WRMSRNS instructions. +* Add support for Intel CMPccXADD instructions. +* Add support for Intel AVX-VNNI-INT8 instructions. +* Add support for Intel AVX-IFMA instructions. +* Add support for Intel PREFETCHI instructions. +* Add support for Intel AMX-FP16 instructions. +* gas now supports --compress-debug-sections=zstd to compress + debug sections with zstd. +* Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd} + that selects the default compression algorithm + for --enable-compressed-debug-sections. +* Add support for various T-Head extensions (XTheadBa, XTheadBb, XTheadBs, + XTheadCmo, XTheadCondMov, XTheadFMemIdx, XTheadFmv, XTheadInt, XTheadMemIdx, + XTheadMemPair, XTheadMac, and XTheadSync) from version 2.0 of the T-Head + ISA manual, which are implemented in the Allwinner D1. +* Add support for the RISC-V Zawrs extension, version 1.0-rc4. +* Add support for Cortex-X1C for Arm. +* New command line option --gsframe to generate SFrame unwind information + on x86_64 and aarch64 targets. +* The linker has a new command line option to suppress the generation of any + warning or error messages. This can be useful when there is a need to create + a known non-working binary. The option is -w or --no-warnings. +* ld now supports zstd compressed debug sections. The new option + --compress-debug-sections=zstd compresses debug sections with zstd. +* Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd} + that selects the default compression algorithm + for --enable-compressed-debug-sections. +* Remove support for -z bndplt (MPX prefix instructions). +- Rebased patches: add-ulp-section.diff, ld-relro.diff, binutils-revert-plt32-in-branches.diff, + cross-avr-size.patch. +- Removed patch: binutils-pr29482.diff. +- New patch: extensa-gcc-4_3-fix.diff. +- Includes fixes for these CVEs: + * bnc#1206080 aka CVE-2022-4285 aka PR29699 +- Enable by default: --enable-colored-disassembly. + +------------------------------------------------------------------- +Sat Dec 10 10:00:56 UTC 2022 - Dirk Müller + +- fix build on x86_64_vX platforms + +------------------------------------------------------------------- +Tue Oct 25 14:52:30 UTC 2022 - Michael Matz + +- Add binutils-maxpagesize.diff for a problem on old code + streams, where we would generate too large binaries. + +------------------------------------------------------------------- +Tue Oct 25 12:54:34 UTC 2022 - Andreas Schwab + +- s390-pic-dso.diff: use %pB instead of %B + +------------------------------------------------------------------- +Mon Oct 17 15:16:23 UTC 2022 - Michael Matz + +- SLE toolchain update of binutils. Update to 2.39 from 2.37, + which means obsoleting and hence removing these patches: + binutils-add-efi-aarch64-1.diff, binutils-add-efi-aarch64-2.diff, + binutils-add-efi-aarch64-3.diff, binutils-fix-keepdebug.diff, + binutils-add-z16-name.diff. + Implements [jsc#SLE-25046, jsc#PED-2029, jsc#PED-2035, jsc#PED-2033, + jsc#PED-2030, jsc#PED-2038, jsc#PED-2032, jsc#PED-2034, jsc#PED-2031, + jsc#SLE-25047] +- This fixes these CVEs relative to 2.37: + [bsc#1188374, bsc#1185597] aka (GCC) PR99935 aka CVE-2021-3648 + [bsc#1193929] aka PR28694 aka CVE-2021-45078 + [bsc#1194783] aka (GCC) PR98886 aka CVE-2021-46195 + [bsc#1197592] aka (GCC) PR105039 aka CVE-2022-27943 + [bsc#1202966] aka PR29289 aka CVE-2022-38126 + [bsc#1202967] aka PR29290 aka CVE-2022-38127 + [bsc#1202969] aka CVE-2021-3826 + +------------------------------------------------------------------- +Fri Oct 14 15:22:38 UTC 2022 - Dirk Müller + +- add arm32-avoid-copyreloc.patch for PR16177 (bsc#1200962) + +------------------------------------------------------------------- +Fri Aug 26 13:24:35 UTC 2022 - Michael Matz + +- Add binutils-pr29482.diff for PR29482, aka CVE-2022-38533 + [bsc#1202816] + +------------------------------------------------------------------- +Wed Aug 10 09:04:57 UTC 2022 - Martin Liška + +- Rebase binutils-2.39-branch.diff.gz that contains fix for PR29451. + +------------------------------------------------------------------- +Mon Aug 8 11:43:14 UTC 2022 - Martin Liška + +- Add binutils-2.39-branch.diff.gz. +- Explicitly enable --enable-warn-execstack=yes and --enable-warn-rwx-segments=yes. +- Add gprofng subpackage. + +------------------------------------------------------------------- +Sat Aug 6 08:41:08 UTC 2022 - Martin Liška + +- Update to binutils 2.39: + * The ELF linker will now generate a warning message if the stack is made + executable. Similarly it will warn if the output binary contains a + segment with all three of the read, write and execute permission + bits set. These warnings are intended to help developers identify + programs which might be vulnerable to attack via these executable + memory regions. + The warnings are enabled by default but can be disabled via a command + line option. It is also possible to build a linker with the warnings + disabled, should that be necessary. + * The ELF linker now supports a --package-metadata option that allows + embedding a JSON payload in accordance to the Package Metadata + specification. + * In linker scripts it is now possible to use TYPE= in an output + section description to set the section type value. + * The objdump program now supports coloured/colored syntax + highlighting of its disassembler output for some architectures. + (Currently: AVR, RiscV, s390, x86, x86_64). + * The nm program now supports a --no-weak/-W option to make it ignore + weak symbols. + * The readelf and objdump programs now support a -wE option to prevent + them from attempting to access debuginfod servers when following + links. + * The objcopy program's --weaken, --weaken-symbol, and + --weaken-symbols options now works with unique symbols as well. +- Rebase binutils-compat-old-behaviour.diff, binutils-revert-hlasm-insns.diff, + binutils-revert-plt32-in-branches.diff and remove binutils-2.38-branch.diff.gz. +- For now use --disable-gprofng. +- Includes fixes for these CVEs: + bnc#1142579 aka CVE-2019-1010204 aka PR23765 + +------------------------------------------------------------------- +Mon Jun 13 12:09:35 UTC 2022 - Michael Matz + +(Fake entry from SLE for tracking purposes:) +- For building shim 15.6~rc1 (and later versions) aarch64 image, objcopy + needs to support efi-app-aarch64 target. (bsc#1198458) + Adds binutils-add-efi-aarch64-1.diff, + binutils-add-efi-aarch64-2.diff, binutils-add-efi-aarch64-3.diff . + +------------------------------------------------------------------- +Wed May 25 10:23:35 UTC 2022 - Martin Liška + +- Use https for variosu links. + +------------------------------------------------------------------- +Wed May 25 08:56:09 UTC 2022 - Martin Liška + +- Update binutils-2.38-branch.diff.gz (to 93054037f1e304e) + in order to include PR29087. + +------------------------------------------------------------------- +Mon May 9 10:18:29 UTC 2022 - Andreas Schwab + +- Enable multitarget build on riscv64 +- On SLE15 and later, use make -Oline to synchronize configure output by + lines + +------------------------------------------------------------------- +Fri May 6 14:17:19 UTC 2022 - Michael Matz + +(Fake entry from SLE for tracking purposes:) +- Add binutils-fix-keepdebug.diff for fix bsc#1191908, a problem + in crash not accepting some of our .ko.debug files. + +------------------------------------------------------------------- +Wed May 4 12:08:27 UTC 2022 - Martin Liška + +- Renumber Sources. + +------------------------------------------------------------------- +Wed May 4 10:22:26 UTC 2022 - Martin Liška + +- Fix ExcludeArch for ppc. + +------------------------------------------------------------------- +Wed May 4 07:10:59 UTC 2022 - Martin Liška + +- Make multibuild utilize only the main binutils.spec file. +- Remove not needed README.First-for.SUSE.packagers, pre_checkin.sh. + +------------------------------------------------------------------- +Mon May 2 10:15:26 UTC 2022 - Martin Liška + +- Start using _multibuild for cross binutils. + +------------------------------------------------------------------- +Mon Apr 25 16:25:47 UTC 2022 - Michael Matz + +- Add binutils-revert-rela.diff to revert back to old behaviour + of not ignoring the in-section content of to be relocated + fields on x86-64, even though that's a RELA architecture. + Compatibility with buggy object files generated by old tools. + [bsc#1198422] + (forward port from SLE) + +------------------------------------------------------------------- +Mon Apr 11 13:49:19 UTC 2022 - Michael Matz + +- Update binutils-2.38-branch.diff.gz (to c210342d7f5) to include + recognition of 'z16' name for 'arch14' on s390. [bsc#1198237] + +------------------------------------------------------------------- +Mon Apr 11 13:43:11 UTC 2022 - Michael Matz + +(Fake entry from SLE for tracking purposes:) +- Add binutils-add-z16-name.diff so that the now official name + z16 for arch14 is recognized. [bsc#1198237] + +------------------------------------------------------------------- +Mon Mar 21 16:40:26 UTC 2022 - Marcus Meissner + +- Add usage of a SUSE_ZNOW environment variable which allows switching + on "-z now" by default using "export SUSE_ZNOW=1", similar to + the SUSE_ASNEEDED variable. Adds binutils-znow.patch. + +------------------------------------------------------------------- +Thu Mar 10 21:22:20 UTC 2022 - Wolfgang Bauer + +- Update binutils-skip-rpaths.patch: add back fix for boo#1191473, + which got lost in the update to 2.38. + +------------------------------------------------------------------- +Fri Mar 4 10:44:39 UTC 2022 - Martin Liška + +- Update binutils-2.38-branch.diff.gz in order to include PR28879. + +------------------------------------------------------------------- +Tue Mar 1 12:41:27 UTC 2022 - Michael Matz + +- From Stefan Brüns : + * Install symlinks for all target specific tools on + arm-eabi-none [bsc#1185712] + +------------------------------------------------------------------- +Thu Feb 24 09:10:44 UTC 2022 - Martin Liška + +- Do not re-generate ld/ldlex.c, ld/ldgram.c, ld/ldgram.h and verify + that corresponding flex/bison files are not modified by a patch. + +------------------------------------------------------------------- +Thu Feb 24 06:55:14 UTC 2022 - Martin Liška + +- Use verbose mode for make for cross compilers. + +------------------------------------------------------------------- +Wed Feb 23 17:52:15 UTC 2022 - Michael Matz + +- Make it build on SLE-11 again. + +------------------------------------------------------------------- +Tue Feb 22 09:13:15 UTC 2022 - Martin Liška + +- Use verbose mode for make. + +------------------------------------------------------------------- +Sat Feb 12 19:13:31 UTC 2022 - Martin Liška + +- Update to binutils 2.38: + * elfedit: Add --output-abiversion option to update ABIVERSION. + * Add support for the LoongArch instruction set. + * Tools which display symbols or strings (readelf, strings, nm, objdump) + have a new command line option which controls how unicode characters are + handled. By default they are treated as normal for the tool. Using + --unicode=locale will display them according to the current locale. + Using --unicode=hex will display them as hex byte values, whilst + --unicode=escape will display them as escape sequences. In addition + using --unicode=highlight will display them as unicode escape sequences + highlighted in red (if supported by the output device). + * readelf -r dumps RELR relative relocations now. + * Support for efi-app-aarch64, efi-rtdrv-aarch64 and efi-bsdrv-aarch64 has been + added to objcopy in order to enable UEFI development using binutils. + * ar: Add --thin for creating thin archives. -T is a deprecated alias without + diagnostics. In many ar implementations -T has a different meaning, as + specified by X/Open System Interface. + * Add support for AArch64 system registers that were missing in previous + releases. + * Add support for the LoongArch instruction set. + * Add a command-line option, -muse-unaligned-vector-move, for x86 target + to encode aligned vector move as unaligned vector move. + * Add support for Cortex-R52+ for Arm. + * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64. + * Add support for Cortex-A710 for Arm. + * Add support for Scalable Matrix Extension (SME) for AArch64. + * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the + assembler what to when it encoutners multibyte characters in the input. The + default is to allow them. Setting the option to "warn" will generate a + warning message whenever any multibyte character is encountered. Using the + option to "warn-sym-only" will make the assembler generate a warning whenever a + symbol is defined containing multibyte characters. (References to undefined + symbols will not generate warnings). + * Outputs of .ds.x directive and .tfloat directive with hex input from + x86 assembler have been reduced from 12 bytes to 10 bytes to match the + output of .tfloat directive. + * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and + 'armv9.3-a' for -march in AArch64 GAS. + * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a', + 'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS. + * Add support for Intel AVX512_FP16 instructions. + * Add -z pack-relative-relocs/-z no pack-relative-relocs to x86 ELF + linker to pack relative relocations in the DT_RELR section. + * Add support for the LoongArch architecture. + * Add -z indirect-extern-access/-z noindirect-extern-access to x86 ELF + linker to control canonical function pointers and copy relocation. + * Add --max-cache-size=SIZE to set the the maximum cache size to SIZE + bytes. +- Add binutils-2.38-branch.diff.gz. +- Removed deletion of man pages as they should be properly packages + in tarball. +- Rebased patches: aarch64-common-pagesize.patch, add-ulp-section.diff, + binutils-bfd_h.patch, binutils-revert-nm-symversion.diff, + binutils-revert-plt32-in-branches.diff, binutils-skip-rpaths.patch + and binutils-compat-old-behaviour.diff. + +------------------------------------------------------------------- +Fri Feb 4 13:13:20 UTC 2022 - Matwey Kornilov + +- Enable PRU architecture for AM335x CPU (Beagle Bone Black board) + +------------------------------------------------------------------- +Thu Jan 27 20:36:30 UTC 2022 - Dirk Müller + +- use fdupes on datadir +- remove RPM_BUILD_ROOT usage and other cleanups + +------------------------------------------------------------------- +Fri Nov 12 13:20:09 UTC 2021 - Martin Liška + +- Rebase binutils-2.37-branch.diff: fixes PR28494. + +------------------------------------------------------------------- +Fri Nov 5 16:54:36 UTC 2021 - Michael Matz + +- Add binutils-revert-hlasm-insns.diff for compatibility on old + code stream that expect 'brcl 0,label' to not be disassembled + as 'jgnop label' on s390x. [bsc#1192267] + +------------------------------------------------------------------- +Wed Nov 3 08:23:52 UTC 2021 - Martin Liška + +- Rebase binutils-2.37-branch.diff: fixes PR28523 aka boo#1188941. + +------------------------------------------------------------------- +Tue Nov 2 15:57:53 UTC 2021 - Michael Matz + +- Fix empty man-pages from broken release tarball [PR28144]. + +------------------------------------------------------------------- +Mon Nov 1 09:34:38 UTC 2021 - Martin Liška + +- Update binutils-skip-rpaths.patch with contained a memory corruption + (boo#1191473). + +------------------------------------------------------------------- +Fri Oct 8 14:11:44 UTC 2021 - Michael Matz + +- Configure with --disable-x86-used-note on old code streams. +- Disable libalternatives temporarily for build cycle reasons. +- make TARGET-bfd=headers again, we patch bfd-in.h +- This state submitted to SLE12 and SLE15 code streams for annual + toolchain update. [jsc#PM-2767, jsc#SLE-21561, jsc#SLE-19618] +- Bump binutils-2.37-branch.diff to 66d5c7003, to include fixes for + PR28422, PR28192, PR28391. Also adds some s390x arch14 + instructions [jsc#SLE-18637]. + +------------------------------------------------------------------- +Fri Sep 10 23:16:12 CEST 2021 - Stefan Schubert schubi@suse.de + +- Using libalternatives instead of update-alternatives. + +------------------------------------------------------------------- +Wed Sep 8 15:09:58 UTC 2021 - Michael Matz + +- Adjust for testsuite fails on older products that configure + binutils in different ways, adds binutils-compat-old-behaviour.diff + and adjusts binutils-revert-nm-symversion.diff and + binutils-revert-plt32-in-branches.diff. + +------------------------------------------------------------------- +Tue Aug 3 13:36:19 UTC 2021 - Martin Liška + +- Bump binutils-2.37-branch.diff: fixes PR28138. + +------------------------------------------------------------------- +Thu Jul 22 17:36:14 UTC 2021 - Martin Liška + +- Use LTO & PGO build. + +------------------------------------------------------------------- +Thu Jul 22 15:01:27 UTC 2021 - Martin Liška + +- Update to binutils 2.37: + * The GNU Binutils sources now requires a C99 compiler and library to + build. + * Support for the arm-symbianelf format has been removed. + * Support for Realm Management Extension (RME) for AArch64 has been + added. + * A new linker option '-z report-relative-reloc' for x86 ELF targets + has been added to report dynamic relative relocations. + * A new linker option '-z start-stop-gc' has been added to disable + special treatment of __start_*/__stop_* references when + --gc-sections. + * A new linker options '-Bno-symbolic' has been added which will + cancel the '-Bsymbolic' and '-Bsymbolic-functions' options. + * The readelf tool has a new command line option which can be used to + specify how the numeric values of symbols are reported. + --sym-base=0|8|10|16 tells readelf to display the values in base 8, + base 10 or base 16. A sym base of 0 represents the default action + of displaying values under 10000 in base 10 and values above that in + base 16. + * A new format has been added to the nm program. Specifying + '--format=just-symbols' (or just using -j) will tell the program to + only display symbol names and nothing else. + * A new command line option '--keep-section-symbols' has been added to + objcopy and strip. This stops the removal of unused section symbols + when the file is copied. Removing these symbols saves space, but + sometimes they are needed by other tools. + * The '--weaken', '--weaken-symbol' and '--weaken-symbols' options + supported by objcopy now make undefined symbols weak on targets that + support weak symbols. + * Readelf and objdump can now display and use the contents of .debug_sup + sections. + * Readelf and objdump will now follow links to separate debug info + files by default. This behaviour can be stopped via the use of the + new '-wN' or '--debug-dump=no-follow-links' options for readelf and + the '-WN' or '--dwarf=no-follow-links' options for objdump. Also + the old behaviour can be restored by the use of the + '--enable-follow-debug-links=no' configure time option. + + The semantics of the =follow-links option have also been slightly + changed. When enabled, the option allows for the loading of symbol + tables and string tables from the separate files which can be used + to enhance the information displayed when dumping other sections, + but it does not automatically imply that information from the + separate files should be displayed. + + If other debug section display options are also enabled (eg + '--debug-dump=info') then the contents of matching sections in both + the main file and the separate debuginfo file *will* be displayed. + This is because in most cases the debug section will only be present + in one of the files. + + If however non-debug section display options are enabled (eg + '--sections') then the contents of matching parts of the separate + debuginfo file will *not* be displayed. This is because in most + cases the user probably only wanted to load the symbol information + from the separate debuginfo file. In order to change this behaviour + a new command line option --process-links can be used. This will + allow di0pslay options to applied to both the main file and any + separate debuginfo files. + * Nm has a new command line option: '--quiet'. This suppresses "no + symbols" diagnostic. +- Includes fixes for these CVEs: + bnc#1181452 aka CVE-2021-20197 aka PR26945 + bnc#1183511 aka CVE-2021-20284 aka PR26931 + bnc#1184519 aka CVE-2021-20294 aka PR26929 + bnc#1184620 aka CVE-2021-3487 aka PR26946 + bnc#1184794 aka CVE-2020-35448 aka PR26574 +- Also fixes: + bsc#1183909 - slow performance of stripping some binaries +- Rebased patches: binutils-build-as-needed.diff, binutils-fix-abierrormsg.diff, + binutils-fix-invalid-op-errata.diff, binutils-fix-relax.diff, + binutils-revert-nm-symversion.diff, binutils-revert-plt32-in-branches.diff +- Removed patches (are in upstream): ppc-ensure-undef-dynamic-weak-undefined.patch and + ppc-use-local-plt.patch. +- Add binutils-2.37-branch.diff.gz. + +------------------------------------------------------------------- +Fri May 7 15:34:22 UTC 2021 - Andreas Schwab + +- ppc-ensure-undef-dynamic-weak-undefined.patch: PPC: ensure_undef_dynamic + on weak undef only in plt +- ppc-use-local-plt.patch: PowerPC use_local_plt (prerequisite for above + patch) + +------------------------------------------------------------------- +Fri Mar 26 10:06:58 UTC 2021 - Martin Liška + +- Update 2.36 branch diff which fixes PR27587. + +------------------------------------------------------------------- +Wed Mar 3 12:53:27 UTC 2021 - Martin Liška + +- Do not run make TARGET-bfd=headers separately. + +------------------------------------------------------------------- +Mon Mar 1 09:01:59 UTC 2021 - Martin Liška + +- Bump 2.36 branch diff (includes fix for PR27441 aka bsc#1182252). + +------------------------------------------------------------------- +Thu Feb 4 08:40:53 UTC 2021 - Martin Liška + +- Bump 2.36 branch diff. + +------------------------------------------------------------------- +Wed Feb 3 08:39:37 UTC 2021 - Martin Liška + +- Update 2.36 branch diff which should fix PR27311 completely. + It fixes also PR27284. +- Remove temporary fix 0001-PR27311-ld.bfd-symbol-from-plugin-undefined-referenc.patch. + +------------------------------------------------------------------- +Tue Feb 2 13:07:22 UTC 2021 - Martin Liška + +- Add temporary upstream fix for PR27311 + 0001-PR27311-ld.bfd-symbol-from-plugin-undefined-referenc.patch. + +------------------------------------------------------------------- +Sun Jan 24 16:56:39 UTC 2021 - Martin Liška + +- Update to binutils 2.36: + New features in the Assembler: + General: + * When setting the link order attribute of ELF sections, it is now + possible to use a numeric section index instead of symbol name. + * Added a .nop directive to generate a single no-op instruction in + a target neutral manner. This instruction does have an effect on + DWARF line number generation, if that is active. + * Removed --reduce-memory-overheads and --hash-size as gas now + uses hash tables that can be expand and shrink automatically. + X86/x86_64: + * Add support for AVX VNNI, HRESET, UINTR, TDX, AMX and Key + Locker instructions. + * Support non-absolute segment values for lcall and ljmp. + * Add {disp16} pseudo prefix to x86 assembler. + * Configure with --enable-x86-used-note by default for Linux/x86. + ARM/AArch64: + * Add support for Cortex-A78, Cortex-A78AE and Cortex-X1, + Cortex-R82, Neoverse V1, and Neoverse N2 cores. + * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded + Trace Extension), TRBE (Trace Buffer Extension), CSRE (Call + Stack Recorder Extension) and BRBE (Branch Record Buffer + Extension) system registers. + * Add support for Armv8-R and Armv8.7-A ISA extensions. + * Add support for DSB memory nXS barrier, WFET and WFIT + instruction for Armv8.7. + * Add support for +csre feature for -march. Add CSR PDEC + instruction for CSRE feature in AArch64. + * Add support for +flagm feature for -march in Armv8.4 AArch64. + * Add support for +ls64 feature for -march in Armv8.7 + AArch64. Add atomic 64-byte load/store instructions for this + feature. + * Add support for +pauth (Pointer Authentication) feature for + -march in AArch64. + New features in the Linker: + * Add --error-handling-script= command line option to allow + a helper script to be invoked when an undefined symbol or a + missing library is encountered. This option can be suppressed + via the configure time switch: --enable-error-handling-script=no. + * Add -z x86-64-{baseline|v[234]} to the x86 ELF linker to mark + x86-64-{baseline|v[234]} ISA level as needed. + * Add -z unique-symbol to avoid duplicated local symbol names. + * The creation of PE format DLLs now defaults to using a more + secure set of DLL characteristics. + * The linker now deduplicates the types in .ctf sections. The new + command-line option --ctf-share-types describes how to do this: + its default value, share-unconflicted, produces the most compact + output. + * The linker now omits the "variable section" from .ctf sections + by default, saving space. This is almost certainly what you + want unless you are working on a project that has its own + analogue of symbol tables that are not reflected in the ELF + symtabs. + New features in other binary tools: + * The ar tool's previously unused l modifier is now used for + specifying dependencies of a static library. The arguments of + this option (or --record-libdeps long form option) will be + stored verbatim in the __.LIBDEP member of the archive, which + the linker may read at link time. + * Readelf can now display the contents of LTO symbol table + sections when asked to do so via the --lto-syms command line + option. + * Readelf now accepts the -C command line option to enable the + demangling of symbol names. In addition the --demangle=