81 lines
2.5 KiB
Diff
81 lines
2.5 KiB
Diff
From b8a8f319b30149f94823302d9120d83b9eee01a4 Mon Sep 17 00:00:00 2001
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From: Tom de Vries <tdevries@suse.de>
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Date: Tue, 13 Feb 2024 09:10:54 +0100
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Subject: [PATCH 23/48] [gdb/tdep] Fix reverse execution of LDR(immediate) T4
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When running test-case gdb.reverse/func-map-to-same-line.exp on arm-linux with
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target board unix/-mthumb, we run into:
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...
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(gdb) reverse-step
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func2 () at func-map-to-same-line.c:26
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26 {
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(gdb) FAIL: gdb.reverse/func-map-to-same-line.exp: \
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column_info_flag=column-info: step-test: reverse-step into func2
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...
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The FAIL is caused by incorrect recording of this insn:
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...
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4f6: f85d 7b04 ldr.w r7, [sp], #4
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...
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The insn updates the sp, but we don't record this:
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...
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$ gdb -q -batch func-map-to-same-line \
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-ex "b *func2+8" \
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-ex run \
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-ex record \
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-ex "set debug record 2" \
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-ex stepi
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Breakpoint 1 at 0x4f6: file func-map-to-same-line.c, line 27.
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Breakpoint 1, 0xaaaaa4f6 in func2 () at func-map-to-same-line.c:27
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27 } /* END FUNC2 */
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Process record: arm_process_record addr = 0xaaaaa4f6
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Process record: add register num = 15 to record list.
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Process record: record_full_arch_list_add 0xabc6c460.
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Process record: add register num = 7 to record list.
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Process record: record_full_arch_list_add 0xabc3b868.
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Process record: add register num = 25 to record list.
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...
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[ Note that sp is r13, and we see here only r15 (pc), r7, and r25 (ps). ]
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The problem is that the specific insn, an LDR(immediate) T4, is not handled in
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thumb2_record_ld_word.
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Fix this by detecting the insn in thumb2_record_ld_word, and recording the
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updated base register.
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Tested on arm-linux.
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Reported-By: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
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Approved-By: Luis Machado <luis.machado@arm.com>
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PR tdep/31278
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Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31278
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---
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gdb/arm-tdep.c | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
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index 04392115848..3b1682a2aea 100644
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--- a/gdb/arm-tdep.c
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+++ b/gdb/arm-tdep.c
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@@ -14156,6 +14156,14 @@ thumb2_record_ld_word (arm_insn_decode_record *thumb2_insn_r)
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record_buf[1] = ARM_PS_REGNUM;
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thumb2_insn_r->reg_rec_count = 2;
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+ if ((thumb2_insn_r->arm_insn & 0xfff00900) == 0xf8500900)
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+ {
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+ /* Detected LDR(immediate), T4, with write-back bit set. Record Rn
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+ update. */
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+ record_buf[2] = bits (thumb2_insn_r->arm_insn, 16, 19);
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+ thumb2_insn_r->reg_rec_count++;
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+ }
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+
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REG_ALLOC (thumb2_insn_r->arm_regs, thumb2_insn_r->reg_rec_count,
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record_buf);
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return ARM_RECORD_SUCCESS;
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--
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2.35.3
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