396 lines
14 KiB
Python
396 lines
14 KiB
Python
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#!/usr/bin/python3
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# Xen Mask Calculator - Calculate CPU masking information based on cpuid(1)
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# Copyright (C) 2017 Armando Vega
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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import argparse
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import sys
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import os
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EAX1_MATCH = '0x00000001 0x00:'
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EAX7_MATCH = '0x00000007 0x00:'
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EXP_LINELN = 76
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libxl_names_ecx1 = []
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libxl_names_edx1 = []
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libvirt_names_ecx1 = []
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libvirt_names_edx1 = []
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libxl_names_ebx7 = []
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libxl_names_ecx7 = []
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libvirt_names_ebx7 = []
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libvirt_names_ecx7 = []
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def fill_ecx1(bit, libxl, libvirt):
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if libxl_names_ecx1[bit]:
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print("ecx bit %s already set: libxl %s libvirt %s. Ignoring %s/%s\n" % (bit, libxl_names_ecx1[bit], libvirt_names_ecx1[bit], libxl, libvirt))
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return
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libxl_names_ecx1[bit] = libxl
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libvirt_names_ecx1[bit] = libvirt
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def fill_edx1(bit, libxl, libvirt):
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if libxl_names_edx1[bit]:
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print("edx bit %s already set: libxl %s libvirt %s. Ignoring %s/%s\n" % (bit, libxl_names_edx1[bit], libvirt_names_edx1[bit], libxl, libvirt))
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return
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libxl_names_edx1[bit] = libxl
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libvirt_names_edx1[bit] = libvirt
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def fill_ebx7(bit, libxl, libvirt):
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if libxl_names_ebx7[bit]:
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print("edx bit %s already set: libxl %s libvirt %s. Ignoring %s/%s\n" % (bit, libxl_names_ebx7[bit], libvirt_names_ebx7[bit], libxl, libvirt))
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return
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libxl_names_ebx7[bit] = libxl
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libvirt_names_ebx7[bit] = libvirt
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def fill_ecx7(bit, libxl, libvirt):
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if libxl_names_ecx7[bit]:
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print("ecx bit %s already set: libxl %s libvirt %s. Ignoring %s/%s\n" % (bit, libxl_names_ecx7[bit], libvirt_names_ecx7[bit], libxl, libvirt))
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return
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libxl_names_ecx7[bit] = libxl
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libvirt_names_ecx7[bit] = libvirt
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def fill_bit_names():
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for i in range(0,32):
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libxl_names_ecx1.append(None)
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libxl_names_edx1.append(None)
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libxl_names_ebx7.append(None)
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libxl_names_ecx7.append(None)
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libvirt_names_ecx1.append(None)
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libvirt_names_edx1.append(None)
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libvirt_names_ebx7.append(None)
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libvirt_names_ecx7.append(None)
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fill_ecx1(0, "sse3", "pni")
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fill_ecx1(1, "pclmulqdq", "pclmuldq")
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fill_ecx1(2, "dtes64", "dtes64")
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fill_ecx1(3, "monitor", "monitor")
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fill_ecx1(4, "dscpl", "ds_cpl")
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fill_ecx1(5, "vmx", "vmx")
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fill_ecx1(6, "smx", "smx")
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fill_ecx1(7, "est", "est")
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fill_ecx1(8, "tm2", "tm2")
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fill_ecx1(9, "ssse3", "ssse3")
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fill_ecx1(10, "cntxid", "cid")
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fill_ecx1(12, "fma", "fma")
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fill_ecx1(13, "cmpxchg16", "cx16")
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fill_ecx1(14, "xtpr", "xtpr")
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fill_ecx1(15, "pdcm", "pdcm")
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fill_ecx1(17, "pcid", "pcid")
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fill_ecx1(18, "dca", "dca")
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fill_ecx1(19, "sse4_1", "sse4.1")
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fill_ecx1(20, "sse4_2", "sse4.2")
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fill_ecx1(21, "x2apic", "x2apic")
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fill_ecx1(22, "movbe", "movbe")
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fill_ecx1(23, "popcnt", "popcnt")
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fill_ecx1(24, "tsc-deadline", "tsc-deadline")
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fill_ecx1(25, "aes", "aes")
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fill_ecx1(26, "xsave", "xsave")
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fill_ecx1(27, "osxsave", "osxsave")
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fill_ecx1(28, "avx", "avx")
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fill_ecx1(29, "f16c", "f16c")
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fill_ecx1(30, "rdrand", "rdrand")
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fill_ecx1(31, "hypervisor", "hypervisor")
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fill_edx1(0, "fpu", "fpu")
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fill_edx1(1, "vme", "vme")
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fill_edx1(2, "de", "de")
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fill_edx1(3, "pse", "pse")
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fill_edx1(4, "tsc", "tsc")
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fill_edx1(5, "msr", "msr")
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fill_edx1(6, "pae", "pae")
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fill_edx1(7, "mce", "mce")
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fill_edx1(8, "cmpxchg8", "cx8")
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fill_edx1(9, "apic", "apic")
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fill_edx1(11, "sysenter", "sep")
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fill_edx1(12, "mtrr", "mtrr")
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fill_edx1(13, "pge", "pge")
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fill_edx1(14, "mca", "mca")
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fill_edx1(15, "cmov", "cmov")
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fill_edx1(16, "pat", "pat")
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fill_edx1(17, "pse36", "pse36")
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fill_edx1(18, "psn", "pn")
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fill_edx1(19, "clfsh", "clflush")
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fill_edx1(21, "ds", "ds")
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fill_edx1(22, "acpi", "acpi")
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fill_edx1(23, "mmx", "mmx")
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fill_edx1(24, "fxsr", "fxsr")
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fill_edx1(25, "sse", "sse")
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fill_edx1(26, "sse2", "sse2")
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fill_edx1(27, "ss", "ss")
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fill_edx1(28, "htt", "ht")
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fill_edx1(29, "tm", "tm")
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fill_edx1(30, "ia64", "ia64")
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fill_edx1(31, "pbe", "pbe")
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fill_ebx7(0, "fsgsbase", "fsgsbase")
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fill_ebx7(1, "tsc_adjust", "tsc_adjust")
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fill_ebx7(3, "bmi1", "bmi1")
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fill_ebx7(4, "hle", "hle")
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fill_ebx7(5, "avx2", "avx2")
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fill_ebx7(7, "smep", "smep")
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fill_ebx7(8, "bmi2", "bmi2")
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fill_ebx7(9, "erms", "erms")
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fill_ebx7(10, "invpcid", "invpcid")
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fill_ebx7(11, "rtm", "rtm")
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fill_ebx7(12, "cmt", "cmt")
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fill_ebx7(14, "mpx", "mpx")
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fill_ebx7(16, "avx512f", "avx512f")
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fill_ebx7(17, "avx512dq", "avx512dq")
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fill_ebx7(18, "rdseed", "rdseed")
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fill_ebx7(19, "adx", "adx")
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fill_ebx7(20, "smap", "smap")
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fill_ebx7(21, "avx512-ifma", "avx512-ifma")
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fill_ebx7(23, "clflushopt", "clflushopt")
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fill_ebx7(24, "clwb", "clwb")
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fill_ebx7(26, "avx512pf", "avx512pf")
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fill_ebx7(27, "avx512er", "avx512er")
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fill_ebx7(28, "avx512cd", "avx512cd")
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fill_ebx7(29, "sha", "sha")
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fill_ebx7(30, "avx512bw", "avx512bw")
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fill_ebx7(31, "avx512vl", "avx512vl")
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fill_ecx7(0, "prefetchwt1", "prefetchwt1")
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fill_ecx7(1, "avx512-vbmi", "avx512-vbmi")
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fill_ecx7(2, "umip", "umip")
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fill_ecx7(3, "pku", "pku")
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fill_ecx7(4, "ospke", "ospke")
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fill_ecx7(6, "avx512-vbmi2", "avx512-vbmi2")
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fill_ecx7(8, "gfni", "gfni")
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fill_ecx7(9, "vaes", "vaes")
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fill_ecx7(10, "vpclmulqdq", "vpclmulqdq")
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fill_ecx7(11, "avx512-vnni", "avx512-vnni")
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fill_ecx7(12, "avx512-bitalg", "avx512-bitalg")
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fill_ecx7(14, "avx512-vpopcntdq", "avx512-vpopcntdq")
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fill_ecx7(22, "rdpid", "rdpid")
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fill_ecx7(25, "cldemote", "cldemote")
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def get_register_mask(regs):
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""" Take a list of register values and return the calculated mask """
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reg_n = len(regs)
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mask = ''
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for idx in range(32):
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counter = 0
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for reg in regs:
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counter += 1 if (reg & (1 << idx) > 0) else 0
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# if we have all 1s or all 0s we don't mask the bit
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if counter == reg_n or counter == 0:
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mask = mask + 'x'
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else:
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mask = mask + '0'
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# we calculated the mask in reverse, so we reverse it again
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return mask[::-1]
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def print_xl_masking_config(nodes):
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""" Take a dictionary of nodes containing their registers and print out CPUID masking configuration for xl """
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nomasking = 'x' * 32
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libxl = []
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libvirt = []
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eax1_ecx_regs = []
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eax1_edx_regs = []
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eax7_ebx_regs = []
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eax7_ecx_regs = []
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for node in nodes:
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eax1_ecx_regs.append(nodes[node]['eax1_ecx'])
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eax1_edx_regs.append(nodes[node]['eax1_edx'])
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eax7_ebx_regs.append(nodes[node]['eax7_ebx'])
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eax7_ecx_regs.append(nodes[node]['eax7_ecx'])
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# Get masks for the EAX1 and EAX7 registers
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eax1_ecx_mask = get_register_mask(eax1_ecx_regs)
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eax1_edx_mask = get_register_mask(eax1_edx_regs)
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eax7_ebx_mask = get_register_mask(eax7_ebx_regs)
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eax7_ecx_mask = get_register_mask(eax7_ecx_regs)
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# Build the xl CPUID config
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cpuid_config = 'cpuid = [\n "0x00000001:ecx=' + eax1_ecx_mask
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if eax1_edx_mask != nomasking:
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cpuid_config += ',edx=' + eax1_edx_mask
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cpuid_config += '",\n'
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cpuid_config += ' "0x00000007,0x00:ebx=' + eax7_ebx_mask
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if eax7_ecx_mask != nomasking:
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cpuid_config += ',ecx=' + eax7_ecx_mask
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cpuid_config += '"\n'
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cpuid_config += ']'
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print(cpuid_config)
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bitnum = len(eax1_ecx_mask)
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while bitnum > 0:
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bitnum -= 1
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bitval = eax1_ecx_mask[len(eax1_ecx_mask) - 1 - bitnum]
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if bitval == "0" and libxl_names_ecx1[bitnum]:
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libxl.append(libxl_names_ecx1[bitnum] + "=0")
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libvirt.append(libvirt_names_ecx1[bitnum])
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bitnum = len(eax1_edx_mask)
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while bitnum > 0:
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bitnum -= 1
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bitval = eax1_edx_mask[len(eax1_edx_mask) - 1 - bitnum]
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if bitval == "0" and libxl_names_edx1[bitnum]:
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libxl.append(libxl_names_edx1[bitnum] + "=0")
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libvirt.append(libvirt_names_edx1[bitnum])
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bitnum = len(eax7_ebx_mask)
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while bitnum > 0:
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bitnum -= 1
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bitval = eax7_ebx_mask[len(eax7_ebx_mask) - 1 - bitnum]
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if bitval == "0" and libxl_names_ebx7[bitnum]:
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libxl.append(libxl_names_ebx7[bitnum] + "=0")
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libvirt.append(libvirt_names_ebx7[bitnum])
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bitnum = len(eax7_ecx_mask)
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while bitnum > 0:
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bitnum -= 1
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bitval = eax7_ecx_mask[len(eax7_ecx_mask) - 1 - bitnum]
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if bitval == "0" and libxl_names_ecx7[bitnum]:
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libxl.append(libxl_names_ecx7[bitnum] + "=0")
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libvirt.append(libvirt_names_ecx7[bitnum])
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if len(libxl) > 0:
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output = "cpuid = [ host"
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for i in libxl:
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output += "," + i
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output += " ]"
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print(output)
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print("<domain>")
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print(" <cpu>")
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for i in libvirt:
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print(" <feature policy='optional' name='%s' />" % i)
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print(" </cpu>")
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print("</domain>")
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def print_verbose_masking_info(nodes):
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""" Take a dictionary of nodes containing their registers and print out verbose mask derivation information """
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eax1_ecx_regs = []
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eax1_edx_regs = []
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eax7_ebx_regs = []
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eax7_ecx_regs = []
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for node in nodes:
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eax1_ecx_regs.append(nodes[node]['eax1_ecx'])
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eax1_edx_regs.append(nodes[node]['eax1_edx'])
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eax7_ebx_regs.append(nodes[node]['eax7_ebx'])
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eax7_ecx_regs.append(nodes[node]['eax7_ecx'])
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print("")
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print('== Detailed mask derivation info ==')
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print("")
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print('EAX1 ECX registers:')
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for reg in eax1_ecx_regs:
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print('{0:032b}'.format(reg))
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print('================================')
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print(get_register_mask(eax1_ecx_regs))
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print("")
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print('EAX1 EDX registers:')
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for reg in eax1_edx_regs:
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print('{0:032b}'.format(reg))
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print('================================')
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print(get_register_mask(eax1_edx_regs))
|
||
|
|
|
||
|
|
print("")
|
||
|
|
print('EAX7,0 EBX registers:')
|
||
|
|
for reg in eax7_ebx_regs:
|
||
|
|
print('{0:032b}'.format(reg))
|
||
|
|
print('================================')
|
||
|
|
print(get_register_mask(eax7_ebx_regs))
|
||
|
|
|
||
|
|
print("")
|
||
|
|
print('EAX7,0 ECX registers:')
|
||
|
|
for reg in eax7_ecx_regs:
|
||
|
|
print('{0:032b}'.format(reg))
|
||
|
|
print('================================')
|
||
|
|
print(get_register_mask(eax7_ecx_regs))
|
||
|
|
|
||
|
|
|
||
|
|
if __name__ == '__main__':
|
||
|
|
epilog = """The individual 'node_files' are generated with 'cpuid -1r':
|
||
|
|
server1~$ cpuid -1r > node1
|
||
|
|
server2~$ cpuid -1r > node2
|
||
|
|
server3~$ cpuid -1r > node3
|
||
|
|
|
||
|
|
~$ {0} node1 node2 node3
|
||
|
|
|
||
|
|
Use 'zypper install cpuid' to install the cpuid.rpm.
|
||
|
|
|
||
|
|
Note: Run 'cpuid' with NATIVE boot instead of dom0 to get the complete cpid value.
|
||
|
|
Xen hides some bits from dom0!
|
||
|
|
""".format(sys.argv[0])
|
||
|
|
parser = argparse.ArgumentParser(
|
||
|
|
formatter_class=argparse.RawDescriptionHelpFormatter,
|
||
|
|
description='A utility that calculates a XEN CPUID difference mask',
|
||
|
|
epilog=epilog
|
||
|
|
)
|
||
|
|
parser.add_argument('node_files', nargs='*', help='Filenames of XEN node CPUID outputs')
|
||
|
|
parser.add_argument('-v', '--verbose', action='store_true', help='Get detailed mask derivation information')
|
||
|
|
args = parser.parse_args()
|
||
|
|
if len(args.node_files) < 2:
|
||
|
|
print('Need at least 2 files to do the comparison!')
|
||
|
|
parser.print_help()
|
||
|
|
sys.exit(1)
|
||
|
|
|
||
|
|
fill_bit_names()
|
||
|
|
nodes = dict()
|
||
|
|
for node in args.node_files:
|
||
|
|
if os.path.isfile(node):
|
||
|
|
try:
|
||
|
|
f = open(node)
|
||
|
|
except IOError as e:
|
||
|
|
print("I/O error({0}): {1}".format(e.errno, e.strerror))
|
||
|
|
sys.exit(1)
|
||
|
|
else:
|
||
|
|
lines = [line.strip() for line in f]
|
||
|
|
eax1 = ''
|
||
|
|
eax7 = ''
|
||
|
|
# try to match the lines containing interesting registers
|
||
|
|
# EAX1 - Processor Info and Feature Bits
|
||
|
|
# EAX7 - Extended features
|
||
|
|
for line in lines:
|
||
|
|
if line.startswith(EAX1_MATCH):
|
||
|
|
eax1 = line
|
||
|
|
elif line.startswith(EAX7_MATCH):
|
||
|
|
eax7 = line
|
||
|
|
# if we get garbled data we should probably just give up
|
||
|
|
if len(eax1) < EXP_LINELN or len(eax7) < EXP_LINELN:
|
||
|
|
print('ERROR: invalid data format in file : ' + node)
|
||
|
|
sys.exit(1)
|
||
|
|
|
||
|
|
# check if we can actually parse the strings into integers
|
||
|
|
try:
|
||
|
|
eax1_ecx = int(eax1.split()[4].split('=')[1], 0)
|
||
|
|
eax1_edx = int(eax1.split()[5].split('=')[1], 0)
|
||
|
|
eax7_ebx = int(eax7.split()[3].split('=')[1], 0)
|
||
|
|
eax7_ecx = int(eax7.split()[4].split('=')[1], 0)
|
||
|
|
except ValueError:
|
||
|
|
print('ERROR: invalid data format in file: ' + node)
|
||
|
|
sys.exit(1)
|
||
|
|
|
||
|
|
nodes[node] = dict()
|
||
|
|
nodes[node]['eax1_ecx'] = eax1_ecx
|
||
|
|
nodes[node]['eax1_edx'] = eax1_edx
|
||
|
|
nodes[node]['eax7_ebx'] = eax7_ebx
|
||
|
|
nodes[node]['eax7_ecx'] = eax7_ecx
|
||
|
|
f.close()
|
||
|
|
else:
|
||
|
|
print('File not found: ' + node)
|
||
|
|
sys.exit(1)
|
||
|
|
|
||
|
|
print_xl_masking_config(nodes)
|
||
|
|
if args.verbose:
|
||
|
|
print_verbose_masking_info(nodes)
|