2023-05-30 14:35:57 +01:00
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/*
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* QEMU CXL Events
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*
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* Copyright (c) 2022 Intel
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef CXL_EVENTS_H
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#define CXL_EVENTS_H
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2023-05-30 14:35:59 +01:00
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#include "qemu/uuid.h"
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2023-05-30 14:35:57 +01:00
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/*
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* CXL rev 3.0 section 8.2.9.2.2; Table 8-49
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*
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* Define these as the bit position for the event status register for ease of
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* setting the status.
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*/
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typedef enum CXLEventLogType {
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CXL_EVENT_TYPE_INFO = 0,
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CXL_EVENT_TYPE_WARN = 1,
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CXL_EVENT_TYPE_FAIL = 2,
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CXL_EVENT_TYPE_FATAL = 3,
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CXL_EVENT_TYPE_DYNAMIC_CAP = 4,
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CXL_EVENT_TYPE_MAX
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} CXLEventLogType;
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2023-05-30 14:35:59 +01:00
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/*
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* Common Event Record Format
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* CXL rev 3.0 section 8.2.9.2.1; Table 8-42
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*/
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#define CXL_EVENT_REC_HDR_RES_LEN 0xf
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typedef struct CXLEventRecordHdr {
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QemuUUID id;
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uint8_t length;
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uint8_t flags[3];
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uint16_t handle;
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uint16_t related_handle;
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uint64_t timestamp;
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uint8_t maint_op_class;
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uint8_t reserved[CXL_EVENT_REC_HDR_RES_LEN];
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} QEMU_PACKED CXLEventRecordHdr;
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#define CXL_EVENT_RECORD_DATA_LENGTH 0x50
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typedef struct CXLEventRecordRaw {
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CXLEventRecordHdr hdr;
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uint8_t data[CXL_EVENT_RECORD_DATA_LENGTH];
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} QEMU_PACKED CXLEventRecordRaw;
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#define CXL_EVENT_RECORD_SIZE (sizeof(CXLEventRecordRaw))
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/*
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* Get Event Records output payload
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* CXL rev 3.0 section 8.2.9.2.2; Table 8-50
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*/
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#define CXL_GET_EVENT_FLAG_OVERFLOW BIT(0)
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#define CXL_GET_EVENT_FLAG_MORE_RECORDS BIT(1)
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typedef struct CXLGetEventPayload {
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uint8_t flags;
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uint8_t reserved1;
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uint16_t overflow_err_count;
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uint64_t first_overflow_timestamp;
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uint64_t last_overflow_timestamp;
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uint16_t record_count;
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uint8_t reserved2[0xa];
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CXLEventRecordRaw records[];
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} QEMU_PACKED CXLGetEventPayload;
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#define CXL_EVENT_PAYLOAD_HDR_SIZE (sizeof(CXLGetEventPayload))
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/*
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* Clear Event Records input payload
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* CXL rev 3.0 section 8.2.9.2.3; Table 8-51
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*/
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typedef struct CXLClearEventPayload {
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uint8_t event_log; /* CXLEventLogType */
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uint8_t clear_flags;
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uint8_t nr_recs;
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uint8_t reserved[3];
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uint16_t handle[];
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} CXLClearEventPayload;
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2023-05-30 14:35:57 +01:00
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#endif /* CXL_EVENTS_H */
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