qemu/tcg/i386/tcg-target-con-str.h

/* SPDX-License-Identifier: MIT */
/*
 * Define i386 target-specific operand constraints.
 * Copyright (c) 2021 Linaro
 *
 */

/*
 * Define constraint letters for register sets:
 * REGS(letter, register_mask)
 */
REGS('a', 1u << TCG_REG_EAX)
REGS('b', 1u << TCG_REG_EBX)
REGS('c', 1u << TCG_REG_ECX)
REGS('d', 1u << TCG_REG_EDX)
REGS('S', 1u << TCG_REG_ESI)
REGS('D', 1u << TCG_REG_EDI)

REGS('r', ALL_GENERAL_REGS)
REGS('x', ALL_VECTOR_REGS)
REGS('q', ALL_BYTEL_REGS)     /* regs that can be used as a byte operand */
REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS)  /* qemu_ld/st */
REGS('s', ALL_BYTEL_REGS & ~SOFTMMU_RESERVE_REGS)    /* qemu_st8_i32 data */

/*
 * Define constraint letters for constants:
 * CONST(letter, TCG_CT_CONST_* bit set)
 */
CONST('e', TCG_CT_CONST_S32)
CONST('I', TCG_CT_CONST_I32)
CONST('O', TCG_CT_CONST_ZERO)
CONST('T', TCG_CT_CONST_TST)
CONST('W', TCG_CT_CONST_WSZ)
CONST('Z', TCG_CT_CONST_U32)
tcg/i386: Split out target constraints to tcg-target-con-str.h This eliminates the target-specific function target_parse_constraint and folds it into the single caller, process_op_defs. Since this is done directly into the switch statement, duplicates are compilation errors rather than silently ignored at runtime. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2020-10-16 15:27:46 -07:00			`/* SPDX-License-Identifier: MIT */`
			`/*`
			`* Define i386 target-specific operand constraints.`
			`* Copyright (c) 2021 Linaro`
			`*`
			`*/`

			`/*`
			`* Define constraint letters for register sets:`
			`* REGS(letter, register_mask)`
			`*/`
			`REGS('a', 1u << TCG_REG_EAX)`
			`REGS('b', 1u << TCG_REG_EBX)`
			`REGS('c', 1u << TCG_REG_ECX)`
			`REGS('d', 1u << TCG_REG_EDX)`
			`REGS('S', 1u << TCG_REG_ESI)`
			`REGS('D', 1u << TCG_REG_EDI)`

			`REGS('r', ALL_GENERAL_REGS)`
			`REGS('x', ALL_VECTOR_REGS)`
			`REGS('q', ALL_BYTEL_REGS) /* regs that can be used as a byte operand */`
			`REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS) /* qemu_ld/st */`
			`REGS('s', ALL_BYTEL_REGS & ~SOFTMMU_RESERVE_REGS) /* qemu_st8_i32 data */`

			`/*`
			`* Define constraint letters for constants:`
			`* CONST(letter, TCG_CT_CONST_* bit set)`
			`*/`
			`CONST('e', TCG_CT_CONST_S32)`
			`CONST('I', TCG_CT_CONST_I32)`
tcg/i386: Optimize cmpsel with constant 0 operand 3. These can be simplified to and/andc, avoiding the load of the zero into a register. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2024-09-06 22:01:12 -07:00			`CONST('O', TCG_CT_CONST_ZERO)`
tcg/i386: Improve TSTNE/TESTEQ vs powers of two Use "test x,x" when the bit is one of the 4 sign bits. Use "bt imm,x" otherwise. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2024-01-10 09:15:07 +11:00			`CONST('T', TCG_CT_CONST_TST)`
tcg/i386: Split out target constraints to tcg-target-con-str.h This eliminates the target-specific function target_parse_constraint and folds it into the single caller, process_op_defs. Since this is done directly into the switch statement, duplicates are compilation errors rather than silently ignored at runtime. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2020-10-16 15:27:46 -07:00			`CONST('W', TCG_CT_CONST_WSZ)`
			`CONST('Z', TCG_CT_CONST_U32)`