17 lines
		
	
	
		
			288 B
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			17 lines
		
	
	
		
			288 B
		
	
	
	
		
			C
		
	
	
	
	
	
|   | /* SPDX-License-Identifier: MIT */ | ||
|  | /*
 | ||
|  |  * Define target-specific register size | ||
|  |  * Copyright (c) 2008 Fabrice Bellard | ||
|  |  */ | ||
|  | 
 | ||
|  | #ifndef TCG_TARGET_REG_BITS_H
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|  | #define TCG_TARGET_REG_BITS_H
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|  | 
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|  | #ifdef _ARCH_PPC64
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|  | # define TCG_TARGET_REG_BITS  64
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|  | #else
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|  | # define TCG_TARGET_REG_BITS  32
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|  | #endif
 | ||
|  | 
 | ||
|  | #endif
 |