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										 |  |  | /*
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							|  |  |  |  * QEMU OpenRISC timer support | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> | 
					
						
							|  |  |  |  *                         Zhizhou Zhang <etouzh@gmail.com> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This library is free software; you can redistribute it and/or | 
					
						
							|  |  |  |  * modify it under the terms of the GNU Lesser General Public | 
					
						
							|  |  |  |  * License as published by the Free Software Foundation; either | 
					
						
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										 |  |  |  * version 2.1 of the License, or (at your option) any later version. | 
					
						
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										 |  |  |  * | 
					
						
							|  |  |  |  * This library is distributed in the hope that it will be useful, | 
					
						
							|  |  |  |  * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
					
						
							|  |  |  |  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU | 
					
						
							|  |  |  |  * Lesser General Public License for more details. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * You should have received a copy of the GNU Lesser General Public | 
					
						
							|  |  |  |  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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							|  |  |  |  */ | 
					
						
							|  |  |  | 
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										 |  |  | #include "qemu/osdep.h"
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										 |  |  | #include "cpu.h"
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										 |  |  | #include "migration/vmstate.h"
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										 |  |  | #include "qemu/timer.h"
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										 |  |  | #include "sysemu/reset.h"
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										 |  |  | #define TIMER_PERIOD 50 /* 50 ns period for 20 MHz timer */
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										 |  |  | /* Tick Timer global state to allow all cores to be in sync */ | 
					
						
							|  |  |  | typedef struct OR1KTimerState { | 
					
						
							|  |  |  |     uint32_t ttcr; | 
					
						
							|  |  |  |     uint64_t last_clk; | 
					
						
							|  |  |  | } OR1KTimerState; | 
					
						
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										 |  |  | static OR1KTimerState *or1k_timer; | 
					
						
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							|  |  |  | void cpu_openrisc_count_set(OpenRISCCPU *cpu, uint32_t val) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     or1k_timer->ttcr = val; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | uint32_t cpu_openrisc_count_get(OpenRISCCPU *cpu) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     return or1k_timer->ttcr; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | /* Add elapsed ticks to ttcr */ | 
					
						
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										 |  |  | void cpu_openrisc_count_update(OpenRISCCPU *cpu) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  |     uint64_t now; | 
					
						
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										 |  |  |     if (!cpu->env.is_counting) { | 
					
						
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										 |  |  |         return; | 
					
						
							|  |  |  |     } | 
					
						
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										 |  |  |     now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | 
					
						
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										 |  |  |     or1k_timer->ttcr += (uint32_t)((now - or1k_timer->last_clk) | 
					
						
							|  |  |  |                                     / TIMER_PERIOD); | 
					
						
							|  |  |  |     or1k_timer->last_clk = now; | 
					
						
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										 |  |  | } | 
					
						
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										 |  |  | /* Update the next timeout time as difference between ttmr and ttcr */ | 
					
						
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										 |  |  | void cpu_openrisc_timer_update(OpenRISCCPU *cpu) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     uint32_t wait; | 
					
						
							|  |  |  |     uint64_t now, next; | 
					
						
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										 |  |  |     if (!cpu->env.is_counting) { | 
					
						
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										 |  |  |         return; | 
					
						
							|  |  |  |     } | 
					
						
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							|  |  |  |     cpu_openrisc_count_update(cpu); | 
					
						
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										 |  |  |     now = or1k_timer->last_clk; | 
					
						
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										 |  |  |     if ((cpu->env.ttmr & TTMR_TP) <= (or1k_timer->ttcr & TTMR_TP)) { | 
					
						
							|  |  |  |         wait = TTMR_TP - (or1k_timer->ttcr & TTMR_TP) + 1; | 
					
						
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										 |  |  |         wait += cpu->env.ttmr & TTMR_TP; | 
					
						
							|  |  |  |     } else { | 
					
						
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										 |  |  |         wait = (cpu->env.ttmr & TTMR_TP) - (or1k_timer->ttcr & TTMR_TP); | 
					
						
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										 |  |  |     } | 
					
						
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										 |  |  |     next = now + (uint64_t)wait * TIMER_PERIOD; | 
					
						
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										 |  |  |     timer_mod(cpu->env.timer, next); | 
					
						
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										 |  |  | } | 
					
						
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							|  |  |  | void cpu_openrisc_count_start(OpenRISCCPU *cpu) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  |     cpu->env.is_counting = 1; | 
					
						
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										 |  |  |     cpu_openrisc_count_update(cpu); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | void cpu_openrisc_count_stop(OpenRISCCPU *cpu) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  |     timer_del(cpu->env.timer); | 
					
						
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										 |  |  |     cpu_openrisc_count_update(cpu); | 
					
						
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										 |  |  |     cpu->env.is_counting = 0; | 
					
						
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										 |  |  | } | 
					
						
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							|  |  |  | static void openrisc_timer_cb(void *opaque) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     OpenRISCCPU *cpu = opaque; | 
					
						
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							|  |  |  |     if ((cpu->env.ttmr & TTMR_IE) && | 
					
						
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										 |  |  |          timer_expired(cpu->env.timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL))) { | 
					
						
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										 |  |  |         CPUState *cs = CPU(cpu); | 
					
						
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										 |  |  |         cpu->env.ttmr |= TTMR_IP; | 
					
						
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										 |  |  |         cs->interrupt_request |= CPU_INTERRUPT_TIMER; | 
					
						
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										 |  |  |     } | 
					
						
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							|  |  |  |     switch (cpu->env.ttmr & TTMR_M) { | 
					
						
							|  |  |  |     case TIMER_NONE: | 
					
						
							|  |  |  |         break; | 
					
						
							|  |  |  |     case TIMER_INTR: | 
					
						
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										 |  |  |         or1k_timer->ttcr = 0; | 
					
						
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										 |  |  |         break; | 
					
						
							|  |  |  |     case TIMER_SHOT: | 
					
						
							|  |  |  |         cpu_openrisc_count_stop(cpu); | 
					
						
							|  |  |  |         break; | 
					
						
							|  |  |  |     case TIMER_CONT: | 
					
						
							|  |  |  |         break; | 
					
						
							|  |  |  |     } | 
					
						
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							|  |  |  |     cpu_openrisc_timer_update(cpu); | 
					
						
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										 |  |  |     qemu_cpu_kick(CPU(cpu)); | 
					
						
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										 |  |  | } | 
					
						
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										 |  |  | /* Reset the per CPU counter state. */ | 
					
						
							|  |  |  | static void openrisc_count_reset(void *opaque) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     OpenRISCCPU *cpu = opaque; | 
					
						
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							|  |  |  |     if (cpu->env.is_counting) { | 
					
						
							|  |  |  |         cpu_openrisc_count_stop(cpu); | 
					
						
							|  |  |  |     } | 
					
						
							|  |  |  |     cpu->env.ttmr = 0x00000000; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | /* Reset the global timer state. */ | 
					
						
							|  |  |  | static void openrisc_timer_reset(void *opaque) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     or1k_timer->ttcr = 0x00000000; | 
					
						
							|  |  |  |     or1k_timer->last_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | 
					
						
							|  |  |  | } | 
					
						
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										 |  |  | static const VMStateDescription vmstate_or1k_timer = { | 
					
						
							|  |  |  |     .name = "or1k_timer", | 
					
						
							|  |  |  |     .version_id = 1, | 
					
						
							|  |  |  |     .minimum_version_id = 1, | 
					
						
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										 |  |  |     .fields = (const VMStateField[]) { | 
					
						
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										 |  |  |         VMSTATE_UINT32(ttcr, OR1KTimerState), | 
					
						
							|  |  |  |         VMSTATE_UINT64(last_clk, OR1KTimerState), | 
					
						
							|  |  |  |         VMSTATE_END_OF_LIST() | 
					
						
							|  |  |  |     } | 
					
						
							|  |  |  | }; | 
					
						
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										 |  |  | void cpu_openrisc_clock_init(OpenRISCCPU *cpu) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  |     cpu->env.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &openrisc_timer_cb, cpu); | 
					
						
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										 |  |  |     qemu_register_reset(openrisc_count_reset, cpu); | 
					
						
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										 |  |  |     if (or1k_timer == NULL) { | 
					
						
							|  |  |  |         or1k_timer = g_new0(OR1KTimerState, 1); | 
					
						
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										 |  |  |         qemu_register_reset(openrisc_timer_reset, cpu); | 
					
						
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										 |  |  |         vmstate_register(NULL, 0, &vmstate_or1k_timer, or1k_timer); | 
					
						
							|  |  |  |     } | 
					
						
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										 |  |  | } |