2023-10-23 17:07:54 +01:00
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#ifndef CXL_USP_H
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#define CXL_USP_H
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#include "hw/pci/pcie.h"
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#include "hw/pci/pcie_port.h"
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#include "hw/cxl/cxl.h"
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typedef struct CXLUpstreamPort {
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/*< private >*/
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PCIEPort parent_obj;
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/*< public >*/
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CXLComponentState cxl_cstate;
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2023-10-23 17:07:55 +01:00
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CXLCCI swcci;
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2024-09-16 18:35:18 +01:00
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PCIExpLinkSpeed speed;
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PCIExpLinkWidth width;
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2023-10-23 17:07:54 +01:00
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DOECap doe_cdat;
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uint64_t sn;
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} CXLUpstreamPort;
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#endif /* CXL_SUP_H */
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