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								/*
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								 * QEMU model of the Smartfusion2 Ethernet MAC.
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								 *
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								 * Copyright (c) 2020 Subbaraya Sundeep <sundeep.lkml@gmail.com>.
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								 *
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								 * Permission is hereby granted, free of charge, to any person obtaining a copy
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								 * of this software and associated documentation files (the "Software"), to deal
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								 * in the Software without restriction, including without limitation the rights
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								 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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								 * copies of the Software, and to permit persons to whom the Software is
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								 * furnished to do so, subject to the following conditions:
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								 *
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								 * The above copyright notice and this permission notice shall be included in
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								 * all copies or substantial portions of the Software.
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								 *
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								 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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								 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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								 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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								 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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								 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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								 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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								 * THE SOFTWARE.
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								 */
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								#include "hw/sysbus.h"
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								#include "exec/memory.h"
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								#include "net/net.h"
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								#include "net/eth.h"
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								#include "qom/object.h"
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								#define TYPE_MSS_EMAC "msf2-emac"
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								OBJECT_DECLARE_SIMPLE_TYPE(MSF2EmacState, MSS_EMAC)
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								#define R_MAX         (0x1a0 / 4)
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								#define PHY_MAX_REGS  32
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								struct MSF2EmacState {
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								    SysBusDevice parent;
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								    MemoryRegion mmio;
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								    MemoryRegion *dma_mr;
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								    AddressSpace dma_as;
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								    qemu_irq irq;
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								    NICState *nic;
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								    NICConf conf;
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								    uint8_t mac_addr[ETH_ALEN];
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								    uint32_t rx_desc;
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								    uint16_t phy_regs[PHY_MAX_REGS];
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								    uint32_t regs[R_MAX];
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								};
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