51 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			51 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
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								/*
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								 * QEMU MicroBlaze CPU interrupt wrapper logic.
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								 *
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								 * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
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								 *
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								 * Permission is hereby granted, free of charge, to any person obtaining a copy
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								 * of this software and associated documentation files (the "Software"), to deal
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								 * in the Software without restriction, including without limitation the rights
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								 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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								 * copies of the Software, and to permit persons to whom the Software is
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								 * furnished to do so, subject to the following conditions:
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								 *
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								 * The above copyright notice and this permission notice shall be included in
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								 * all copies or substantial portions of the Software.
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								 *
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								 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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								 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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								 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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								 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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								 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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								 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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								 * THE SOFTWARE.
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								 */
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								#include "hw.h"
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								#include "pc.h"
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								#define D(x)
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								void pic_info(Monitor *mon)
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								{}
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								void irq_info(Monitor *mon)
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								{}
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								static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
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								{
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								    CPUState *env = (CPUState *)opaque;
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								    int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
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								    if (level)
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								        cpu_interrupt(env, type);
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								    else
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								        cpu_reset_interrupt(env, type);
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								}
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								qemu_irq *microblaze_pic_init_cpu(CPUState *env);
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								qemu_irq *microblaze_pic_init_cpu(CPUState *env)
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								{
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								    return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);
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								}
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