Logo
Explore Help
Sign In
dfaggioli/qemu
1
0
Fork 0
You've already forked qemu
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
fefb41bf3485a1c9a44c15e382d28035c6fb5f4b
qemu/target-openrisc/Makefile.objs

6 lines
221 B
Makefile
Raw Normal View History

target-or32: Add target stubs and QOM cpu Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-20 15:50:39 +08:00
obj-$(CONFIG_SOFTMMU) += machine.o
target-or32: Add exception support Add OpenRISC exception support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-20 15:50:42 +08:00
obj-y += cpu.o exception.o interrupt.o mmu.o translate.o
target-or32: Add float instruction helpers Add OpenRISC float instruction helpers. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-20 15:50:44 +08:00
obj-y += exception_helper.o fpu_helper.o int_helper.o \
target-or32: Add system instructions Add OpenRISC system instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-20 15:50:49 +08:00
interrupt_helper.o mmu_helper.o sys_helper.o
cpu: Introduce CPUClass::gdb_{read,write}_register() Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-29 04:18:45 +02:00
obj-y += gdbstub.o
Reference in New Issue Copy Permalink
Powered by Gitea Version: 1.24.6 Page: 127ms Template: 1ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API