target-mips: Fix RDHWR on CP0.Count
For RDHWR on the CP0.Count register, env->CP0_Count was being returned. This value is a delta against the QEMU_CLOCK_VIRTUAL clock, not the correct current value of CP0.Count. Use cpu_mips_get_count() instead. Signed-off-by: Alex Smith <alex.smith@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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		| @@ -2184,10 +2184,15 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env) | ||||
| target_ulong helper_rdhwr_cc(CPUMIPSState *env) | ||||
| { | ||||
|     if ((env->hflags & MIPS_HFLAG_CP0) || | ||||
|         (env->CP0_HWREna & (1 << 2))) | ||||
|         (env->CP0_HWREna & (1 << 2))) { | ||||
| #ifdef CONFIG_USER_ONLY | ||||
|         return env->CP0_Count; | ||||
|     else | ||||
| #else | ||||
|         return (int32_t)cpu_mips_get_count(env); | ||||
| #endif | ||||
|     } else { | ||||
|         helper_raise_exception(env, EXCP_RI); | ||||
|     } | ||||
|  | ||||
|     return 0; | ||||
| } | ||||
|   | ||||
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