target/sparc: Fix FEXPAND
This is a 2-operand instruction, not 3-operand.
Worse, we took the source from the wrong operand.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-3-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
(cherry picked from commit 7b616f36de)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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Michael Tokarev
parent
50ed4f856a
commit
d3da3d02a0
@@ -260,13 +260,13 @@ uint64_t helper_fmuld8ulx16(uint64_t src1, uint64_t src2)
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return d.ll;
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}
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uint64_t helper_fexpand(uint64_t src1, uint64_t src2)
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uint64_t helper_fexpand(uint32_t src2)
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{
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VIS32 s;
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VIS64 d;
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s.l = (uint32_t)src1;
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d.ll = src2;
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s.l = src2;
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d.ll = 0;
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d.VIS_W64(0) = s.VIS_B32(0) << 4;
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d.VIS_W64(1) = s.VIS_B32(1) << 4;
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d.VIS_W64(2) = s.VIS_B32(2) << 4;
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