hw/arm/boot: Set SCR_EL3.HXEn when booting kernel
When we direct boot a kernel on a CPU which emulates EL3, we need to
set up the EL3 system registers as the Linux kernel documentation
specifies:
https://www.kernel.org/doc/Documentation/arm64/booting.rst
For CPUs with FEAT_HCX support this includes:
- SCR_EL3.HXEn (bit 38) must be initialised to 0b1.
but we forgot to do this when implementing FEAT_HCX, which would mean
that a guest trying to access the HCRX_EL2 register would crash.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221027140207.413084-3-peter.maydell@linaro.org
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@@ -771,6 +771,9 @@ static void do_cpu_reset(void *opaque)
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env->cp15.scr_el3 |= SCR_ENTP2;
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env->vfp.smcr_el[3] = 0xf;
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}
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if (cpu_isar_feature(aa64_hcx, cpu)) {
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env->cp15.scr_el3 |= SCR_HXEN;
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}
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/* AArch64 kernels never boot in secure mode */
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assert(!info->secure_boot);
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/* This hook is only supported for AArch32 currently:
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