global: Squash 'the the'
'the' has a tendency to double up; squash them back down. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191104185202.102504-1-dgilbert@redhat.com> [lv: removed disas/libvixl/vixl/invalset.h change] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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Laurent Vivier
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@@ -385,7 +385,7 @@ Each LMB list entry consists of the following elements:
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is used to retrieve the right associativity list to be used for this
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LMB.
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- A 32bit flags word. The bit at bit position 0x00000008 defines whether
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the LMB is assigned to the the partition as of boot time.
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the LMB is assigned to the partition as of boot time.
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ibm,dynamic-memory-v2
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@@ -163,7 +163,7 @@ Interrupt Priority Register (PIPR) is also updated using the IPB. This
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register represent the priority of the most favored pending
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notification.
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The PIPR is then compared to the the Current Processor Priority
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The PIPR is then compared to the Current Processor Priority
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Register (CPPR). If it is more favored (numerically less than), the
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CPU interrupt line is raised and the EO bit of the Notification Source
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Register (NSR) is updated to notify the presence of an exception for
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@@ -89,7 +89,7 @@ TPM upon reboot. The PPI specification defines the operation requests and the
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actions the firmware has to take. The system administrator passes the operation
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request number to the firmware through an ACPI interface which writes this
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number to a memory location that the firmware knows. Upon reboot, the firmware
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finds the number and sends commands to the the TPM. The firmware writes the TPM
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finds the number and sends commands to the TPM. The firmware writes the TPM
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result code and the operation request number to a memory location that ACPI can
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read from and pass the result on to the administrator.
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