Richard Henderson
|
7f10b52f7b
|
target/sparc: Move gen_ne_fop_FFF insns to decodetree
Move FANDNOT1s, FANDNOT2s, FANDs, FNANDs, FNORs, FORNOT1s, FORNOT2s,
FORs, FPADD16s, FPADD32s, FPSUB16s, FPSUB32s, FXNORs, FXORs.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
fafba1bb0b
|
target/sparc: Use tcg_gen_vec_{add,sub}*
Replace the local helpers for the same integer operations.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
c6d83e4ff5
|
target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
baf3dbf258
|
target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
39ca3490f8
|
target/sparc: Move BMASK to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
9e20ca9409
|
target/sparc: Move ADDRALIGN* to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
45bfed3b2c
|
target/sparc: Move ARRAY* to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
b88ce6f246
|
target/sparc: Move EDGE* to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
da68140604
|
target/sparc: Merge LDFSR, LDXFSR implementations
Combine the helper to a single set_fsr().
Perform the mask and merge inline.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
3d3c06737b
|
target/sparc: Move LDFSR, STFSR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
287b11520b
|
target/sparc: Move asi fp load/store to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
06c060d9e5
|
target/sparc: Move simple fp load/store to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
3259b9e2fd
|
target/sparc: Split out fp ldst functions with asi precomputed
Take the operation size from the MemOp instead of a
separate parameter.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
5458fd3153
|
target/sparc: Move PREFETCH, PREFETCHA to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
d0a11d25f0
|
target/sparc: Move CASA, CASXA to decodetree
Remove gen_cas_asi, gen_casx_asi.
Rename gen_cas_asi0 to gen_cas_asi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
dca544b991
|
target/sparc: Move SWAP, SWAPA to decodetree
Remove gen_swap_asi.
Rename gen_swap_asi0 to gen_swap_asi.
Merge gen_swap into gen_swap_asi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
cf07cd1e68
|
target/sparc: Move LDSTUB, LDSTUBA to decodetree
Remove gen_ldstub_asi.
Rename gen_ldstub_asi0 to gen_ldstub_asi.
Merge gen_ldstub into gen_ldstub_asi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
42071fc16d
|
target/sparc: Move asi integer load/store to decodetree
Move LDDA, LDSBA, LDSHA, LDSWA, LDUBA, LDUHA, LDUWA, LDXA,
STBA, STDA, STHA, STWA, STXA.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
0880d20b2e
|
target/sparc: Move simple integer load/store to decodetree
Move LDUW, LDUB, LDUH, LDD, LDSW, LDSB, LDSH, LDX,
STW, STB, STH, STD, STX.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
ebbbec9216
|
target/sparc: Use tcg_gen_qemu_{ld,st}_i128 for GET_ASI_DTWINX
Perform one atomic 16-byte operation.
The atomicity is required for the LDTXA instructions.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
c03a0fd15c
|
target/sparc: Split out ldst functions with asi pre-computed
As an intermediate step in decodetree conversion, create
new functions passing in DisasASI and not insn.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
a76779ee3b
|
target/sparc: Drop ifdef around get_asi and friends
Mark some of the functions as unused, temporarily.
Fix up some tl vs i64 issues revealed in the process.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
811cc0b0ce
|
target/sparc: Split out resolve_asi
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
8f75b8a4eb
|
target/sparc: Move DONE, RETRY to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
d382580031
|
target/sparc: Move FLUSH, SAVE, RESTORE to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
86b82fe021
|
target/sparc: Move JMPL, RETT, RETURN to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
d3c7e8ad74
|
target/sparc: Convert remaining v8 coproc insns to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
9c6ec5bcad
|
target/sparc: Move POPC to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
fb4ed7aad4
|
target/sparc: Move MOVcc, MOVR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
5fc546ee35
|
target/sparc: Move SLL, SRL, SRA to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
a9aba13dae
|
target/sparc: Move TADD, TSUB, MULS to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
c26368532d
|
target/sparc: Move UDIV, SDIV to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
4ee85ea94b
|
target/sparc: Move UDIVX, SDIVX to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
dfebb950da
|
target/sparc: Move SUBC to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
b5372650e2
|
target/sparc: Move UMUL, SMUL to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
22188d7da8
|
target/sparc: Move MULX to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
420a187d80
|
target/sparc: Move ADDC to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
428881deba
|
target/sparc: Move basic arithmetic to decodetree
Move ADD, AND, OR, XOR, SUB, ANDN, ORN, XORN.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
2da789ded5
|
target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver
Use direct loads and stores to env instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
577efa4557
|
target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr
Use direct loads and stores to env instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
cd6269f7c9
|
target/sparc: Remove cpu_wim
Use direct loads and stores to env instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
bb97f2f5d7
|
target/sparc: Move WRTBR, WRHPR to decodetree
Implement htstate in the obvious way.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
9422278ef8
|
target/sparc: Move WRWIM, WRPR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
25524734c6
|
target/sparc: Move WRPSR, SAVED, RESTORED to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
0faef01b39
|
target/sparc: Move WRASR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
e8325dc02d
|
target/sparc: Move RDTBR, FLUSHW to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
5d617bfba0
|
target/sparc: Move RDWIM, RDPR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
668bb9b755
|
target/sparc: Move RDPSR, RDHPR to decodetree
Implement htstate in the obvious way.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/847
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
af25071c1d
|
target/sparc: Move RDASR, STBAR, MEMBAR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|
Richard Henderson
|
3037663616
|
target/sparc: Move Tcc to decodetree
Use the new delay_exceptionv function in the implementation.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
2023-10-25 01:01:13 -07:00 |
|