Richard Henderson
7c347c7333
target/arm: Fix sve predicate store, 8 <= VQ <= 15
...
Brown bag time: store instead of load results in uninitialized temp.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1704
Reported-by: Mark Rutland <mark.rutland@arm.com >
Tested-by: Alex Bennée <alex.bennee@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230620134659.817559-1-richard.henderson@linaro.org
Fixes: e6dd5e782balex.bennee@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-23 11:37:29 +01:00
Richard Henderson
3b97520c86
target/arm: Pass single_memop to gen_mte_checkN
...
Pass the individual memop to gen_mte_checkN.
For the moment, do nothing with it.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230530191438.411344-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-06 10:19:37 +01:00
Richard Henderson
0a9091424d
target/arm: Pass memop to gen_mte_check1*
...
Pass the completed memop to gen_mte_check1_mmuidx.
For the moment, do nothing more than extract the size.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230530191438.411344-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-06 10:19:37 +01:00
Richard Henderson
e6dd5e782b
target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r
...
Round len_align to 16 instead of 8, handling an odd 8-byte as part
of the tail. Use MO_ATOM_NONE to indicate that all of these memory
ops have only byte atomicity.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230530191438.411344-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-06 10:19:36 +01:00
Richard Henderson
5d05e5a183
target/arm: Tidy helpers for translation
...
Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct. Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-06-05 12:04:29 -07:00
Richard Henderson
a46f42d96f
target/arm: Include helper-gen.h in translator.h
...
This had been included via tcg-op-common.h via tcg-op.h,
but that is going away.
It is needed for inlines within translator.h, so we might as well
do it there and not individually in each translator c file.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-06-05 12:04:28 -07:00
Richard Henderson
d6840b9878
target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}
...
This hides the implicit initialization of a variable.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-13 07:03:39 -07:00
Richard Henderson
8d1b02a6a1
target/arm: Create gen_set_rmode, gen_restore_rmode
...
Split out common subroutines for handing rounding mode
changes during translation. Use tcg_constant_i32 and
tcg_temp_new_i32 instead of tcg_const_i32.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-13 06:44:38 -07:00
Richard Henderson
97584f2bc8
target/arm: Consistently use ARMFPRounding during translation
...
In preparation for extracting new helpers, ensure that
the rounding mode is represented as ARMFPRounding and
not FloatRoundMode.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-13 06:44:38 -07:00
Richard Henderson
bd46e45ab2
target/arm: Drop tcg_temp_free from translator-sve.c
...
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-05 13:44:07 -08:00
Richard Henderson
6980b80d59
target/arm: Drop new_tmp_a64
...
This is now a simple wrapper for tcg_temp_new_i64.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-05 13:44:07 -08:00
Richard Henderson
d4aa49acd3
target/arm: Don't use tcg_temp_local_new_*
...
Since tcg_temp_new_* is now identical, use those.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-01 07:33:28 -10:00
Richard Henderson
78817d3b9f
target/arm: Drop copies in gen_sve_{ldr,str}
...
Since we now get TEMP_TB temporaries by default, we no longer
need to make copies across these loops. These were the only
uses of new_tmp_a64_local(), so remove that as well.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-01 07:33:28 -10:00
Fabiano Rosas
f0984d4040
target/arm: move translate modules to tcg/
...
Introduce the target/arm/tcg directory. Its purpose is to hold the TCG
code that is selected by CONFIG_TCG.
Signed-off-by: Claudio Fontana <cfontana@suse.de >
Signed-off-by: Fabiano Rosas <farosas@suse.de >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-02-27 13:27:04 +00:00
