Alistair Francis
26cd0362dd
hw/riscv: spike: Remove deprecated ISA specific machines
...
The ISA specific Spike machines have been deprecated in QEMU since 4.1,
let's finally remove them.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com >
Reviewed-by: Bin Meng <bin.meng@windriver.com >
Reviewed-by: Thomas Huth <thuth@redhat.com >
2020-06-03 09:11:51 -07:00
Bin Meng
7ae05377b8
riscv: hw: Drop "clock-frequency" property of cpu nodes
...
The "clock-frequency" property of cpu nodes isn't required. Drop it.
This is to keep in sync with Linux kernel commit below:
https://patchwork.kernel.org/patch/11133031/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Signed-off-by: Palmer Dabbelt <palmer@sifive.com >
2019-10-28 07:47:27 -07:00
Markus Armbruster
ec150c7e09
include: Make headers more self-contained
...
Back in 2016, we discussed[1] rules for headers, and these were
generally liked:
1. Have a carefully curated header that's included everywhere first. We
got that already thanks to Peter: osdep.h.
2. Headers should normally include everything they need beyond osdep.h.
If exceptions are needed for some reason, they must be documented in
the header. If all that's needed from a header is typedefs, put
those into qemu/typedefs.h instead of including the header.
3. Cyclic inclusion is forbidden.
This patch gets include/ closer to obeying 2.
It's actually extracted from my "[RFC] Baby steps towards saner
headers" series[2], which demonstrates a possible path towards
checking 2 automatically. It passes the RFC test there.
[1] Message-ID: <87h9g8j57d.fsf@blackfin.pond.sub.org >
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg03345.html
[2] Message-Id: <20190711122827.18970-1-armbru@redhat.com >
https://lists.nongnu.org/archive/html/qemu-devel/2019-07/msg02715.html
Signed-off-by: Markus Armbruster <armbru@redhat.com >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Message-Id: <20190812052359.30071-2-armbru@redhat.com >
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com >
2019-08-16 13:31:51 +02:00
Michael Clark
4996b12874
RISC-V: Make some header guards more specific
...
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu >
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Signed-off-by: Michael Clark <mjc@sifive.com >
Signed-off-by: Palmer Dabbelt <palmer@sifive.com >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
2018-05-06 10:39:38 +12:00
Michael Clark
42b3a4b7cc
RISC-V: Remove unused class definitions
...
Removes a whole lot of unnecessary boilerplate code. Machines
don't need to be objects. The expansion of the SOC object model
for the RISC-V machines will happen in the future as SiFive
plans to add their FE310 and FU540 SOCs to QEMU. However, it
seems that this present boilerplate is complete unnecessary.
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu >
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Signed-off-by: Michael Clark <mjc@sifive.com >
Signed-off-by: Palmer Dabbelt <palmer@sifive.com >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
2018-05-06 10:39:38 +12:00
Michael Clark
2a8756ed7d
RISC-V: Replace hardcoded constants with enum values
...
The RISC-V device-tree code has a number of hard-coded
constants and this change moves them into header enums.
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu >
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Signed-off-by: Michael Clark <mjc@sifive.com >
Signed-off-by: Palmer Dabbelt <palmer@sifive.com >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
2018-05-06 10:39:38 +12:00
Michael Clark
5b4beba124
RISC-V Spike Machines
...
RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V
Instruction Set Simulator. The following machines are implemented:
- 'spike_v1.9.1'; HTIF console, config-string, Privileged ISA Version 1.9.1
- 'spike_v1.10'; HTIF console, device-tree, Privileged ISA Version 1.10
Acked-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu >
Signed-off-by: Michael Clark <mjc@sifive.com >
2018-03-07 08:30:28 +13:00
