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236 Commits

Author SHA1 Message Date
Max Filippov
bc19449acc tests/tcg/xtensa: clean up test set 
Drop test_fail: we know that exit simcall works. Now that it's not run
automatically there's no point in keeping it.
Drop test_pipeline: we're not modeling pipeline, we don't control ccount
and there's no plan to do so.
Enable test_boolean: it won't break on cores without boolean option, it
will do testing on cores with boolean option.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-03-23 14:42:05 -07:00
Max Filippov
b9ec52188f target/xtensa: fix break_dependency for repeated resources 
break_dependency incorrectly handles the case of dependency on an opcode
that references the same register multiple times. E.g. the following
instruction is translated incorrectly:

  { or a2, a3, a3 ; or a3, a2, a2 }

This happens because resource indices of both dependency graph nodes are
incremented, and a copy for the second instance of the same register in
the ending node is not done.
Only increment resource index of the ending node of the dependency.
Add test.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-03-21 21:47:50 -07:00
Alex Bennée
b640728151 tests/tcg/arm: account for pauth randomness 
Pointer authentication isn't guaranteed to always detect a clash
between different keys. Take this into account in the test by running
several times and checking the percentage hit rate of the test.

Cc: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
8a2af7a70c tests/tcg/i386: add memory test to exercise softmmu 
This is a simple test to check various access patterns to memory
including unaligned access.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
40d6ee9450 tests/tcg/i386: add system mode Hello World test 
This introduces the build framework for simple i386 system tests. The
first test is the eponymous "Hello World" which simply outputs the
text on the serial port and then exits.

I've included the framework for x86_64 but it is not in this series as
it is a work in progress.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
a113ec989b tests/tcg: provide a minilib for system tests 
We will likely want a few common functions to make up for the fact we
don't have a libc and we don't want to feel like we are programming by
banging rocks together.

I've purloined the printf function from:

  https://git.virtualopensystems.com/dev/tcg_baremetal_tests

Although I have tweaked the names to avoid confusing GCC about clashing
with builtins.

Cc: Alexander Spyridakis <a.spyridakis@virtualopensystems.com>
Cc: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
d72132c02e tests/tcg: enable cris base user-mode tests 
This converts the existing Makefile into a Makefile.target and updates
it so it can be called by the tcg build system. The original Makefile
didn't set -cpu except for the v17 tests however that has broken (I
assume because linux-user is a "max" cpu) so here I force it to be
crisv17.

I've also replicated the GNU simulator targets (run-FOO-on-sim).

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
f17365f518 tests/tcg/cris: align mul operations 
To avoid:

  Error: dangerous MULS/MULU location; give it higher alignment

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
0056cb5790 tests/tcg/cris: comment out the ccs test 
Evidently upstream gcc doesn't like this opcode.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
d4f6e58fcb tests/tcg: split cris tests into bare and libc directories 
Bare tests are standalone assembly tests that don't require linking to
any libc and hence can be built with kernel only compilers. The libc
tests need a compiler capable of building properly linked userspace
binaries. As we don't have such a cross compiler at the moment we
won't be building those tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
6b970dd62c tests/tcg/cris: cleanup sys.c 
This is a mini library which provides helper functions to the tests
which are all currently written in assembly. A bunch of minor changes:

      - removed libc related headers (fedora-cris-cross is a system compiler)
      - re-organised the functions to avoid forward declarations
      - cleaned up brace usage
      - restored exit for _fail case
      - removed tabs and fixed indentation

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Stefan Hajnoczi
647aee9ba2 tests/tcg/arm: add ARMv6-M UNDEFINED 32-bit instruction test 
Test that 32-bit instructions declared UNDEFINED in the ARMv6-M
Reference Manual really do raise an exception.  Also test that the 6
32-bit instructions defined in the ARMv6-M Reference Manual do not raise
an exception.

Based-on: <20181029194519.15628-1-stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20181129185113.30353-1-stefanha@redhat.com>
[AJB: integrated into system tests]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
be5cac175a tests/tcg/xtensa: enable system tests 
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Philippe Mathieu-Daudé
c72d9df181 tests/docker: add debian-xtensa-cross image 
Xtensa cpu supported:
- dc232b
- dc233c
- csp

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
b4f396151b tests/tcg/mips: fix hello-mips compilation 
The compilation flags for proper building are in the source tree. We
also fix exit to 0 so the result is counted as a success.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
d0ce6257c6 tests/tcg: add gdb runner variant 
With this you can launch a test in gdb with:

  cd $(BUILD)/tests
  make -f $(SRC)/tests/tcg/Makefile gdb-$(TEST_NAME)

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
fdfda70e28 tests/tcg: split run-test into user and system variants 
We can't rely on shell redirect magic to get things right so lets
setup a common output chardev that is expecting to write to files. As
we have split run-test up we might as well move the default monitor
bits into the call.

Finally a little make sophistry is required to correctly quote
$(COMMA) and as we don't inherit common rules we have our own little
copy here.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
3d55c02624 tests/tcg: add QEMU_OPT option for test runner 
This will allow tests to modify the QEMU invocation with for example
different -cpu stazas without having to define a whole new set of
runner types.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 2019-03-12 17:05:21 +00:00
Alex Bennée
bd15e6e004 tests/tcg: add softmmu awareness to Makefile 
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 2019-03-12 17:05:21 +00:00
Mateja Marjanovic
53e116fed6 target/mips: Add tests for a variety of MSA integer subtract instructions 
Add tests for a variety of MSA integer subtract instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-6-git-send-email-mateja.marjanovic@rt-rk.com>
 2019-03-11 12:45:36 +01:00
Mateja Marjanovic
4b302ce90d target/mips: Add tests for a variety of MSA integer multiply instructions 
Add tests for a variety of MSA integer multiply instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-5-git-send-email-mateja.marjanovic@rt-rk.com>
 2019-03-11 12:45:36 +01:00
Mateja Marjanovic
a8f91dd9fd target/mips: Add tests for a variety of MSA integer dot product instructions 
Add tests for a variety of MSA integer dot product instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-4-git-send-email-mateja.marjanovic@rt-rk.com>
 2019-03-11 12:45:36 +01:00
Mateja Marjanovic
72f463bc08 target/mips: Add tests for a variety of MSA integer divide instructions 
Add tests for a variety of MSA integer divide instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-3-git-send-email-mateja.marjanovic@rt-rk.com>
 2019-03-11 12:45:36 +01:00
Mateja Marjanovic
1be82d8901 target/mips: Add tests for a variety of MSA integer average instructions 
Add tests for a variety of MSA integer average instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-2-git-send-email-mateja.marjanovic@rt-rk.com>
 2019-03-11 12:45:36 +01:00
Aleksandar Markovic
81526dff27 tests/tcg: target/mips: Rename two header files for consistency 
Rename two header files for consistency and clarity. Do all other
changes to accommodate new names.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com>
Message-Id: <1551981716-30664-3-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-11 12:36:58 +01:00
Aleksandar Markovic
dd8d6a2d5a tests/tcg: target/mips: Correct preambles of test source files 
Correct preambles of test source files.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com>
Message-Id: <1551981716-30664-2-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-11 12:36:49 +01:00
Mateja Marjanovic
0fdd986a6c target/mips: Add tests for integer add MSA instruction group 
These are the regression tests for integer addition MSA instruction
- various flavors of instruction add (ADD, ADDS, HADD,...).

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551718283-4487-3-git-send-email-mateja.marjanovic@rt-rk.com>
 2019-03-05 17:05:33 +01:00
Aleksandar Markovic
2a367db039 tests/tcg: target/mips: Add tests for MSA pack instructions 
Add tests for MSA pack instructions. This includes following
instructions:

  * PCKEV.B - pack even (bytes)
  * PCKEV.H - pack even (halfwords)
  * PCKEV.W - pack even (words)
  * PCKEV.D - pack even (doublewords)
  * PCKOD.B - pack odd (bytes)
  * PCKOD.H - pack odd (halfwords)
  * PCKOD.W - pack odd (words)
  * PCKOD.D - pack odd (doublewords)
  * VSHF.B - data preserving shuffle (bytes)
  * VSHF.H - data preserving shuffle (halfwords)
  * VSHF.W - data preserving shuffle (words)
  * VSHF.D - data preserving shuffle (doublewords)

Each test consists of 80 test cases, so altogether there are 960
test cases.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-15-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:03:44 +01:00
Aleksandar Markovic
7ecdacc568 tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions 
Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU,
MUHU, DMUL, DMUH, DMULU, and DMUHU.

MUH and MUHU require 64 bit inputs in the form of 64-bit sign-extended
32-bit inputs.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-14-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:03:33 +01:00
Aleksandar Markovic
09a1bc758e tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions 
Add tests for MIPS64R6 shift instructions: SLLV, SRLV, SRAV, DSLLV,
DSRLV, and DSRAV.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-13-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:03:24 +01:00
Aleksandar Markovic
9dea2df848 tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions 
Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-12-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:03:15 +01:00
Aleksandar Markovic
8708c32a47 tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions 
Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-11-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:03:04 +01:00
Aleksandar Markovic
99d46107f7 tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions 
Add tests for MIPS64R6 logic instructions: AND, NOR, OR, and XOR.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-10-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:02:54 +01:00
Aleksandar Markovic
50dccc057f tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions 
Add wrappers for some MIPS64R6 instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-9-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:02:46 +01:00
Aleksandar Markovic
6ae2e3bb33 tests/tcg: target/mips: Extend functionality of MSA wrapper macros 
Add macros that will allow testing cases when one of the source
registers is identical to the destination register.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:02:37 +01:00
Aleksandar Markovic
dd3ba7036f tests/tcg: target/mips: Fix test utilities for 128-bit tests 
Add "static" and "const" modifiers where appropriate, and fix other
minor issues.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-7-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:02:30 +01:00
Aleksandar Markovic
ace4458466 tests/tcg: target/mips: Add test utilities for 64-bit tests 
Add test utilities for 64-bit tests. Some of MIPS64R6 instructions
require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits,
hence the need for sets of such inputs.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-6-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:02:22 +01:00
Aleksandar Markovic
26b3256392 tests/tcg: target/mips: Add test utilities for 32-bit tests 
Add test utilities for 32-bit tests.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-5-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:02:13 +01:00
Aleksandar Markovic
9e9509421f tests/tcg: target/mips: Add wrappers for various MSA instructions 
Add wrappers for various MSA integer instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-4-git-send-email-aleksandar.markovic@rt-rk.com>
 2019-03-05 17:02:03 +01:00
Peter Maydell
4179575898 Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into staging 
target/xtensa: FLIX support, various fixes and test improvements

- add FLIX (flexible length instructions extension) support;
- make testsuite runnable on wider range of xtensa cores;
- add floating point opcode tests;
- don't add duplicate 'static' in import_core.sh script;
- fix undefined opcodes detection in test_mmuhifi_c3 overlay.

# gpg: Signature made Thu 28 Feb 2019 12:53:23 GMT
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20190228-xtensa: (40 commits)
  tests/tcg/xtensa: add FPU2000 coprocessor tests
  tests/tcg/xtensa: add FP1 group tests
  tests/tcg/xtensa: add FP0 group conversion tests
  tests/tcg/xtensa: add FP0 group arithmetic tests
  tests/tcg/xtensa: add LSCI/LSCX group tests
  tests/tcg/xtensa: add test for FLIX
  tests/tcg/xtensa: conditionalize MMU-related tests
  tests/tcg/xtensa: conditionalize windowed register tests
  tests/tcg/xtensa: conditionalize and fix s32c1i tests
  tests/tcg/xtensa: fix SR tests for big endian configs
  tests/tcg/xtensa: conditionalize and expand SR tests
  tests/tcg/xtensa: conditionalize timer/CCOUNT tests
  tests/tcg/xtensa: conditionalize interrupt tests
  tests/tcg/xtensa: add straightforward conditionals
  tests/tcg/xtensa: conditionalize cache option tests
  tests/tcg/xtensa: conditionalize debug option tests
  tests/tcg/xtensa: enable boolean tests
  tests/tcg/xtensa: fix endianness issues in test_b
  tests/tcg/xtensa: don't use optional opcodes in generic code
  tests/tcg/xtensa: support configs with LITBASE
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2019-02-28 19:04:16 +00:00
Max Filippov
de0cebd930 tests/tcg/xtensa: add FPU2000 coprocessor tests 
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:24 -08:00
Max Filippov
fd78bc55a4 tests/tcg/xtensa: add FP1 group tests 
Test comparisons and conditional move operations.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:24 -08:00
Max Filippov
710b15f041 tests/tcg/xtensa: add FP0 group conversion tests 
Test conversions for normal, NaN and Inf arguments.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00
Max Filippov
9d012e8ec2 tests/tcg/xtensa: add FP0 group arithmetic tests 
Test arithmetic operations for normal, NaN and Inf arguments.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00
Max Filippov
5e33b037b5 tests/tcg/xtensa: add LSCI/LSCX group tests 
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00
Max Filippov
ebbd775aab tests/tcg/xtensa: add test for FLIX 
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00
Max Filippov
3db8a95e70 tests/tcg/xtensa: conditionalize MMU-related tests 
Make MMU-related tests conditional on the presence of MMUv2 option.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00
Max Filippov
c20e10eac8 tests/tcg/xtensa: conditionalize windowed register tests 
Make windowed register tests conditional on the presence of this option.
Fix tests to work correctly for both 32 and 64 physical registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00
Max Filippov
00988da486 tests/tcg/xtensa: conditionalize and fix s32c1i tests 
Make s32c1i tests conditional on the presence of this option. Initialize
ATOMCTL SR when it's present to allow RCW transactions on uncached
memory.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00
Max Filippov
9b2d08a066 tests/tcg/xtensa: fix SR tests for big endian configs 
SR tests generate instructions that the assembler does not recognize and
thus must take care about configuration endianness.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
 2019-02-28 04:43:23 -08:00