Richard Henderson
623507ccfc
target/arm: Handle mte in do_ldrq, do_ldro
...
These functions "use the standard load helpers", but
fail to clean_data_tbi or populate mtedesc.
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Tested-by: Gustavo Romero <gustavo.romero@linaro.org >
Message-id: 20240207025210.8837-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-02-15 11:30:45 +00:00
Richard Henderson
96fcc9982b
target/arm: Split out make_svemte_desc
...
Share code that creates mtedesc and embeds within simd_desc.
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Tested-by: Gustavo Romero <gustavo.romero@linaro.org >
Message-id: 20240207025210.8837-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-02-15 11:30:45 +00:00
Richard Henderson
b12a7671b6
target/arm: Adjust and validate mtedesc sizem1
...
When we added SVE_MTEDESC_SHIFT, we effectively limited the
maximum size of MTEDESC. Adjust SIZEM1 to consume the remaining
bits (32 - 10 - 5 - 12 == 5). Assert that the data to be stored
fits within the field (expecting 8 * 4 - 1 == 31, exact fit).
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Tested-by: Gustavo Romero <gustavo.romero@linaro.org >
Message-id: 20240207025210.8837-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-02-15 11:30:44 +00:00
Richard Henderson
64c6e7444d
target/arm: Fix nregs computation in do_{ld,st}_zpa
...
The field is encoded as [0-3], which is convenient for
indexing our array of function pointers, but the true
value is [1-4]. Adjust before calling do_mem_zpa.
Add an assert, and move the comment re passing ZT to
the helper back next to the relevant code.
Cc: qemu-stable@nongnu.org
Fixes: 206adacfb8richard.henderson@linaro.org >
Tested-by: Gustavo Romero <gustavo.romero@linaro.org >
Message-id: 20240207025210.8837-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-02-15 11:30:44 +00:00
Richard Henderson
b11293c212
target/arm: Fix SVE STR increment
...
The previous change missed updating one of the increments and
one of the MemOps. Add a test case for all vector lengths.
Cc: qemu-stable@nongnu.org
Fixes: e6dd5e782brichard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20231031143215.29764-1-richard.henderson@linaro.org
[PMM: fixed checkpatch nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-11-02 13:36:45 +00:00
Richard Henderson
ad75a51e84
tcg: Rename cpu_env to tcg_env
...
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-10-03 08:01:02 -07:00
Michael Tokarev
673d821541
arm: spelling fixes
...
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
2023-07-25 17:13:53 +03:00
Richard Henderson
0f23908c5c
target/arm: Demultiplex AESE and AESMC
...
Split these helpers so that we are not passing 'decrypt'
within the simd descriptor.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-07-08 07:30:18 +01:00
Richard Henderson
7c347c7333
target/arm: Fix sve predicate store, 8 <= VQ <= 15
...
Brown bag time: store instead of load results in uninitialized temp.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1704
Reported-by: Mark Rutland <mark.rutland@arm.com >
Tested-by: Alex Bennée <alex.bennee@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230620134659.817559-1-richard.henderson@linaro.org
Fixes: e6dd5e782balex.bennee@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-23 11:37:29 +01:00
Richard Henderson
3b97520c86
target/arm: Pass single_memop to gen_mte_checkN
...
Pass the individual memop to gen_mte_checkN.
For the moment, do nothing with it.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230530191438.411344-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-06 10:19:37 +01:00
Richard Henderson
0a9091424d
target/arm: Pass memop to gen_mte_check1*
...
Pass the completed memop to gen_mte_check1_mmuidx.
For the moment, do nothing more than extract the size.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230530191438.411344-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-06 10:19:37 +01:00
Richard Henderson
e6dd5e782b
target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r
...
Round len_align to 16 instead of 8, handling an odd 8-byte as part
of the tail. Use MO_ATOM_NONE to indicate that all of these memory
ops have only byte atomicity.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20230530191438.411344-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-06-06 10:19:36 +01:00
Richard Henderson
5d05e5a183
target/arm: Tidy helpers for translation
...
Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct. Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-06-05 12:04:29 -07:00
Richard Henderson
a46f42d96f
target/arm: Include helper-gen.h in translator.h
...
This had been included via tcg-op-common.h via tcg-op.h,
but that is going away.
It is needed for inlines within translator.h, so we might as well
do it there and not individually in each translator c file.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-06-05 12:04:28 -07:00
Richard Henderson
d6840b9878
target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}
...
This hides the implicit initialization of a variable.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-13 07:03:39 -07:00
Richard Henderson
8d1b02a6a1
target/arm: Create gen_set_rmode, gen_restore_rmode
...
Split out common subroutines for handing rounding mode
changes during translation. Use tcg_constant_i32 and
tcg_temp_new_i32 instead of tcg_const_i32.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-13 06:44:38 -07:00
Richard Henderson
97584f2bc8
target/arm: Consistently use ARMFPRounding during translation
...
In preparation for extracting new helpers, ensure that
the rounding mode is represented as ARMFPRounding and
not FloatRoundMode.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-13 06:44:38 -07:00
Richard Henderson
bd46e45ab2
target/arm: Drop tcg_temp_free from translator-sve.c
...
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-05 13:44:07 -08:00
Richard Henderson
6980b80d59
target/arm: Drop new_tmp_a64
...
This is now a simple wrapper for tcg_temp_new_i64.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-05 13:44:07 -08:00
Richard Henderson
d4aa49acd3
target/arm: Don't use tcg_temp_local_new_*
...
Since tcg_temp_new_* is now identical, use those.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-01 07:33:28 -10:00
Richard Henderson
78817d3b9f
target/arm: Drop copies in gen_sve_{ldr,str}
...
Since we now get TEMP_TB temporaries by default, we no longer
need to make copies across these loops. These were the only
uses of new_tmp_a64_local(), so remove that as well.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-03-01 07:33:28 -10:00
Fabiano Rosas
f0984d4040
target/arm: move translate modules to tcg/
...
Introduce the target/arm/tcg directory. Its purpose is to hold the TCG
code that is selected by CONFIG_TCG.
Signed-off-by: Claudio Fontana <cfontana@suse.de >
Signed-off-by: Fabiano Rosas <farosas@suse.de >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2023-02-27 13:27:04 +00:00
