Philippe Mathieu-Daudé
9348028e7e
target: Move ArchCPUClass definition to 'cpu.h'
...
The OBJECT_DECLARE_CPU_TYPE() macro forward-declares each
ArchCPUClass type. These forward declarations are sufficient
for code in hw/ to use the QOM definitions. No need to expose
these structure definitions. Keep each local to their target/
by moving them to the corresponding "cpu.h" header.
Suggested-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20231013140116.255-13-philmd@linaro.org >
2023-11-07 13:08:48 +01:00
Philippe Mathieu-Daudé
edcea147e3
target/loongarch: Declare QOM definitions in 'cpu-qom.h'
...
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Add a comment clarifying that in the header.
Extract QOM definitions from "cpu.h" to "cpu-qom.h".
Reviewed-by: Song Gao <gaosong@loongson.cn >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20231013140116.255-9-philmd@linaro.org >
2023-11-07 12:13:27 +01:00
Philippe Mathieu-Daudé
6ee45fac56
target: Unify QOM style
...
Enforce the style described by commit 067109a11c
("docs/devel:
mention the spacing requirement for QOM"):
The first declaration of a storage or class structure should
always be the parent and leave a visual space between that
declaration and the new code. It is also useful to separate
backing for properties (options driven by the user) and internal
state to make navigation easier.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Zhao Liu <zhao1.liu@intel.com >
Message-Id: <20231013140116.255-2-philmd@linaro.org >
2023-11-07 12:13:27 +01:00
Richard Henderson
91ffd93be6
linux-user/loongarch64: Use traps to track LSX/LASX usage
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20231101030816.2353416-2-gaosong@loongson.cn >
Signed-off-by: Song Gao <gaosong@loongson.cn >
2023-11-03 14:13:18 +08:00
Song Gao
1d832c19db
target/loongarch: Support 4K page size
...
The LoongArch kernel supports 4K page size.
Change TARGET_PAGE_BITS to 12.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Message-Id: <20231023024059.3858349-1-gaosong@loongson.cn >
2023-11-03 14:13:13 +08:00
Song Gao
31f694b911
target/loongarch: Implement query-cpu-model-expansion
...
Add support for the query-cpu-model-expansion QMP command to LoongArch.
We support query the cpu features.
e.g
la464 and max cpu support LSX/LASX, default enable,
la132 not support LSX/LASX.
1. start with '-cpu max,lasx=off'
(QEMU) query-cpu-model-expansion type=static model={"name":"max"}
{"return": {"model": {"name": "max", "props": {"lasx": false, "lsx": true}}}}
2. start with '-cpu la464,lasx=off'
(QEMU) query-cpu-model-expansion type=static model={"name":"la464"}
{"return": {"model": {"name": "max", "props": {"lasx": false, "lsx": true}}}
3. start with '-cpu la132,lasx=off'
qemu-system-loongarch64: can't apply global la132-loongarch-cpu.lasx=off: Property 'la132-loongarch-cpu.lasx' not found
4. start with '-cpu max,lasx=off' or start with '-cpu la464,lasx=off' query cpu model la132
(QEMU) query-cpu-model-expansion type=static model={"name":"la132"}
{"return": {"model": {"name": "la132"}}}
Acked-by: Markus Armbruster <armbru@redhat.com >
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20231020084925.3457084-4-gaosong@loongson.cn >
2023-11-03 14:13:07 +08:00
Song Gao
464136ceb6
target/loongarch: Allow user enable/disable LSX/LASX features
...
Some users may not need LSX/LASX, this patch allows the user
enable/disable LSX/LASX features.
e.g
'-cpu max,lsx=on,lasx=on' (default);
'-cpu max,lsx=on,lasx=off' (enabled LSX);
'-cpu max,lsx=off,lasx=on' (enabled LASX, LSX);
'-cpu max,lsx=off' (disable LSX and LASX).
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20231020084925.3457084-3-gaosong@loongson.cn >
2023-11-03 14:13:02 +08:00
Song Gao
d6f077321a
target/loongarch: Add cpu model 'max'
...
We use cpu la464 for the 'max' cpu.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20231020084925.3457084-2-gaosong@loongson.cn >
2023-11-03 14:12:55 +08:00
Song Gao
5f1a3132c6
target/loongarch: Add preldx instruction
...
Resolve the issue of starting the Loongnix 20.5[1] system failure.
Logs:
Loading Linux 4.19.0-19-loongson-3 ...
Loading initial ramdisk ...
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V03101019 I0
Error: unknown opcode. 90000000003a3e6c: 0x382c6d82
[1] http://pkg.loongnix.cn/loongnix/isos/Loongnix-20.5/Loongnix-20.5.cartoon.gui.loongarch64.en.qcow2
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Song Gao <gaosong@loongson.cn >
Message-Id: <20230905123910.3052023-1-gaosong@loongson.cn >
2023-10-13 09:50:16 +08:00
Jiajie Chen
32f4916cfb
target/loongarch: fix ASXE flag conflict
...
HW_FLAGS_EUEN_ASXE acccidentally conflicts with HW_FLAGS_CRMD_PG,
enabling LASX instructions even when CSR_EUEN.ASXE=0.
Closes: https://gitlab.com/qemu-project/qemu/-/issues/1907
Signed-off-by: Jiajie Chen <c@jia.je >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Song Gao <gaosong@loongson.cn >
Message-Id: <20230930112837.1871691-1-c@jia.je >
Signed-off-by: Song Gao <gaosong@loongson.cn >
2023-10-13 09:50:16 +08:00
Akihiko Odaki
a650683871
hw/core/cpu: Return static value with gdb_arch_name()
...
All implementations of gdb_arch_name() returns dynamic duplicates of
static strings. It's also unlikely that there will be an implementation
of gdb_arch_name() that returns a truly dynamic value due to the nature
of the function returning a well-known identifiers. Qualify the value
gdb_arch_name() with const and make all of its implementations return
static strings.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Message-Id: <20230912224107.29669-8-akihiko.odaki@daynix.com >
Signed-off-by: Alex Bennée <alex.bennee@linaro.org >
Message-Id: <20231009164104.369749-15-alex.bennee@linaro.org >
2023-10-11 08:46:33 +01:00
Philippe Mathieu-Daudé
01c85e60a4
meson: Rename target_softmmu_arch -> target_system_arch
...
Finish the convertion started with commit de6cd7599b
("meson: Replace softmmu_ss -> system_ss"). If the
$target_type is 'system', then use the target_system_arch[]
source set :)
Mechanical change doing:
$ sed -i -e s/target_softmmu_arch/target_system_arch/g \
$(git grep -l target_softmmu_arch)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20231004090629.37473-13-philmd@linaro.org >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
2023-10-07 19:03:07 +02:00
Richard Henderson
8fa08d7ec7
accel/tcg: Remove cpu_set_cpustate_pointers
...
This function is now empty, so remove it. In the case of
m68k and tricore, this empties the class instance initfn,
so remove those as well.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-10-04 11:03:54 -07:00
Richard Henderson
b77af26e97
accel/tcg: Replace CPUState.env_ptr with cpu_env()
...
Reviewed-by: Anton Johansson <anjo@rev.ng >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-10-04 11:03:54 -07:00
Richard Henderson
ad75a51e84
tcg: Rename cpu_env to tcg_env
...
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-10-03 08:01:02 -07:00
Richard Henderson
3b3d7df545
accel/tcg: Move CPUNegativeOffsetState into CPUState
...
Retain the separate structure to emphasize its importance.
Enforce CPUArchState always follows CPUState without padding.
Reviewed-by: Anton Johansson <anjo@rev.ng >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-10-03 08:01:02 -07:00
Richard Henderson
f669c99241
target/*: Add instance_align to all cpu base classes
...
The omission of alignment has technically been wrong since
269bd5d8f6
, where QEMU_ALIGNED was added to CPUTLBDescFast.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-10-03 08:01:02 -07:00
Song Gao
2cd81e3751
target/loongarch: CPUCFG support LASX
...
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-58-gaosong@loongson.cn >
2023-09-20 14:33:43 +08:00
Song Gao
c7aa330903
target/loongarch: Move simply DO_XX marcos togther
...
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-57-gaosong@loongson.cn >
2023-09-20 14:33:43 +08:00
Song Gao
4a26512f01
target/loongarch: Implement xvld xvst
...
This patch includes:
- XVLD[X], XVST[X];
- XVLDREPL.{B/H/W/D};
- XVSTELM.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-56-gaosong@loongson.cn >
2023-09-20 14:33:43 +08:00
Song Gao
513e88a24d
target/loongarch: Implement xvshuf xvperm{i} xvshuf4i
...
This patch includes:
- XVSHUF.{B/H/W/D};
- XVPERM.W;
- XVSHUF4i.{B/H/W/D};
- XVPERMI.{W/D/Q};
- XVEXTRINS.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-55-gaosong@loongson.cn >
2023-09-20 14:33:42 +08:00
Song Gao
ad2921482c
target/loongarch: Implement xvpack xvpick xvilv{l/h}
...
This patch includes:
- XVPACK{EV/OD}.{B/H/W/D};
- XVPICK{EV/OD}.{B/H/W/D};
- XVILV{L/H}.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-54-gaosong@loongson.cn >
2023-09-20 14:33:42 +08:00
Song Gao
df97f33807
target/loongarch: Implement xvreplve xvinsve0 xvpickve
...
This patch includes:
- XVREPLVE.{B/H/W/D};
- XVREPL128VEI.{B/H/W/D};
- XVREPLVE0.{B/H/W/D/Q};
- XVINSVE0.{W/D};
- XVPICKVE.{W/D};
- XVBSLL.V, XVBSRL.V.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-53-gaosong@loongson.cn >
2023-09-20 14:33:42 +08:00
Song Gao
f5ce2c8f2c
target/loongarch: Implement xvinsgr2vr xvpickve2gr
...
This patch includes:
- XVINSGR2VR.{W/D};
- XVPICKVE2GR.{W/D}[U].
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-52-gaosong@loongson.cn >
2023-09-20 14:33:42 +08:00
Song Gao
f3dfcc8b23
target/loongarch: Implement xvbitsel xvset
...
This patch includes:
- XVBITSEL.V;
- XVBITSELI.B;
- XVSET{EQZ/NEZ}.V;
- XVSETANYEQZ.{B/H/W/D};
- XVSETALLNEZ.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-51-gaosong@loongson.cn >
2023-09-20 14:33:42 +08:00
Song Gao
3eeda5fe4e
target/loongarch: Implement xvfcmp
...
This patch includes:
- XVFCMP.cond.{S/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-50-gaosong@loongson.cn >
2023-09-20 14:33:42 +08:00
Song Gao
4da72d4306
target/loongarch: Implement xvseq xvsle xvslt
...
This patch includes:
- XVSEQ[I].{B/H/W/D};
- XVSLE[I].{B/H/W/D}[U];
- XVSLT[I].{B/H/W/D/}[U].
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-49-gaosong@loongson.cn >
2023-09-20 14:33:42 +08:00
Song Gao
60df31a207
target/loongarch: Implement LASX fpu fcvt instructions
...
This patch includes:
- XVFCVT{L/H}.{S.H/D.S};
- XVFCVT.{H.S/S.D};
- XVFRINT[{RNE/RZ/RP/RM}].{S/D};
- XVFTINT[{RNE/RZ/RP/RM}].{W.S/L.D};
- XVFTINT[RZ].{WU.S/LU.D};
- XVFTINT[{RNE/RZ/RP/RM}].W.D;
- XVFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S;
- XVFFINT.{S.W/D.L}[U];
- X[CVFFINT.S.L, VFFINT{L/H}.D.W.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-48-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
c9caf1587a
target/loongarch: Implement LASX fpu arith instructions
...
This patch includes:
- XVF{ADD/SUB/MUL/DIV}.{S/D};
- XVF{MADD/MSUB/NMADD/NMSUB}.{S/D};
- XVF{MAX/MIN}.{S/D};
- XVF{MAXA/MINA}.{S/D};
- XVFLOGB.{S/D};
- XVFCLASS.{S/D};
- XVF{SQRT/RECIP/RSQRT}.{S/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-47-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
abee168ea3
target/loongarch: Implement xvfrstp
...
This patch includes:
- XVFRSTP[I].{B/H}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-46-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
1b3e242f72
target/loongarch: Implement xvbitclr xvbitset xvbitrev
...
This patch includes:
- XVBITCLR[I].{B/H/W/D};
- XVBITSET[I].{B/H/W/D};
- XVBITREV[I].{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-45-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
956dec74b7
target/loongarch: Implement xvpcnt
...
This patch includes:
- VPCNT.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-44-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
12ad133f20
target/loongarch: Implement xvclo xvclz
...
This patch includes:
- XVCLO.{B/H/W/D};
- XVCLZ.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-43-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
77fca79428
target/loongarch: Implement xvssrlrn xvssrarn
...
This patch includes:
- XVSSRLRN.{B.H/H.W/W.D};
- XVSSRARN.{B.H/H.W/W.D};
- XVSSRLRN.{BU.H/HU.W/WU.D};
- XVSSRARN.{BU.H/HU.W/WU.D};
- XVSSRLRNI.{B.H/H.W/W.D/D.Q};
- XVSSRARNI.{B.H/H.W/W.D/D.Q};
- XVSSRLRNI.{BU.H/HU.W/WU.D/DU.Q};
- XVSSRARNI.{BU.H/HU.W/WU.D/DU.Q}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-42-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
6256c8caeb
target/loongarch: Implement xvssrln xvssran
...
This patch includes:
- XVSSRLN.{B.H/H.W/W.D};
- XVSSRAN.{B.H/H.W/W.D};
- XVSSRLN.{BU.H/HU.W/WU.D};
- XVSSRAN.{BU.H/HU.W/WU.D};
- XVSSRLNI.{B.H/H.W/W.D/D.Q};
- XVSSRANI.{B.H/H.W/W.D/D.Q};
- XVSSRLNI.{BU.H/HU.W/WU.D/DU.Q};
- XVSSRANI.{BU.H/HU.W/WU.D/DU.Q}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-41-gaosong@loongson.cn >
2023-09-20 14:33:41 +08:00
Song Gao
c50ce38a47
target/loongarch: Implement xvsrlrn xvsrarn
...
This patch includes:
- XVSRLRN.{B.H/H.W/W.D};
- XVSRARN.{B.H/H.W/W.D};
- XVSRLRNI.{B.H/H.W/W.D/D.Q};
- XVSRARNI.{B.H/H.W/W.D/D.Q}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-40-gaosong@loongson.cn >
2023-09-20 14:33:40 +08:00
Song Gao
40c7674e9e
target/loongarch: Implement xvsrln xvsran
...
This patch includes:
- XVSRLN.{B.H/H.W/W.D};
- XVSRAN.{B.H/H.W/W.D};
- XVSRLNI.{B.H/H.W/W.D/D.Q};
- XVSRANI.{B.H/H.W/W.D/D.Q}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-39-gaosong@loongson.cn >
2023-09-20 14:33:40 +08:00
Song Gao
8c272fe8f4
target/loongarch: Implement xvsrlr xvsrar
...
This patch includes:
- XVSRLR[I].{B/H/W/D};
- XVSRAR[I].{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-38-gaosong@loongson.cn >
2023-09-20 14:33:40 +08:00
Song Gao
6567eac7f7
target/loongarch: Implement xvsllwil xvextl
...
This patch includes:
- XVSLLWIL.{H.B/W.H/D.W};
- XVSLLWIL.{HU.BU/WU.HU/DU.WU};
- XVEXTL.Q.D, VEXTL.QU.DU.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-37-gaosong@loongson.cn >
2023-09-20 14:33:40 +08:00
Song Gao
ad6dc7189a
target/loongarch: Implement xvsll xvsrl xvsra xvrotr
...
This patch includes:
- XVSLL[I].{B/H/W/D};
- XVSRL[I].{B/H/W/D};
- XVSRA[I].{B/H/W/D};
- XVROTR[I].{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-36-gaosong@loongson.cn >
2023-09-20 14:33:40 +08:00
Song Gao
4472a45a08
target/loongarch: Implement LASX logic instructions
...
This patch includes:
- XV{AND/OR/XOR/NOR/ANDN/ORN}.V;
- XV{AND/OR/XOR/NOR}I.B.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-35-gaosong@loongson.cn >
2023-09-20 14:33:40 +08:00
Song Gao
a59098e311
target/loongarch: Implement xvldi
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This patch includes:
- XVLDI.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-34-gaosong@loongson.cn >
2023-09-20 14:32:40 +08:00
Song Gao
97074674a9
target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz
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This patch includes:
- XVMSKLTZ.{B/H/W/D};
- XVMSKGEZ.B;
- XVMSKNZ.B.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-33-gaosong@loongson.cn >
2023-09-20 11:43:14 +08:00
Song Gao
3a2752179a
target/loongarch: Implement xvsigncov
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This patch includes:
- XVSIGNCOV.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-32-gaosong@loongson.cn >
2023-09-20 11:43:14 +08:00
Song Gao
790acb2a43
target/loongarch: Implement vext2xv
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This patch includes:
- VEXT2XV.{H/W/D}.B, VEXT2XV.{HU/WU/DU}.BU;
- VEXT2XV.{W/D}.B, VEXT2XV.{WU/DU}.HU;
- VEXT2XV.D.W, VEXT2XV.DU.WU.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-31-gaosong@loongson.cn >
2023-09-20 11:43:13 +08:00
Song Gao
f0db0beb80
target/loongarch: Implement xvexth
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This patch includes:
- XVEXTH.{H.B/W.H/D.W/Q.D};
- XVEXTH.{HU.BU/WU.HU/DU.WU/QU.DU}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-30-gaosong@loongson.cn >
2023-09-20 11:43:13 +08:00
Song Gao
e5c7f0315e
target/loongarch: Implement xvsat
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This patch includes:
- XVSAT.{B/H/W/D}[U].
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-29-gaosong@loongson.cn >
2023-09-20 11:43:13 +08:00
Song Gao
abb693de0a
target/loongarch; Implement xvdiv/xvmod
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This patch includes:
- XVDIV.{B/H/W/D}[U];
- XVMOD.{B/H/W/D}[U].
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-28-gaosong@loongson.cn >
2023-09-20 11:43:13 +08:00
Song Gao
3f450c17d0
target/loongarch: Implement xvmadd/xvmsub/xvmaddw{ev/od}
...
This patch includes:
- XVMADD.{B/H/W/D};
- XVMSUB.{B/H/W/D};
- XVMADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVMADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-27-gaosong@loongson.cn >
2023-09-20 11:43:13 +08:00
Song Gao
342dc1cfcb
target/loongarch: Implement xvmul/xvmuh/xvmulw{ev/od}
...
This patch includes:
- XVMUL.{B/H/W/D};
- XVMUH.{B/H/W/D}[U];
- XVMULW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVMULW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.
Signed-off-by: Song Gao <gaosong@loongson.cn >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20230914022645.1151356-26-gaosong@loongson.cn >
2023-09-20 11:43:13 +08:00