Richard Henderson
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4a09d0bb34
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target/openrisc: Rename the cpu from or32 to or1k
This is in keeping with the toolchain and or1ksim.
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-02-14 08:14:58 +11:00 |
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Sebastian Macke
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14a650ec25
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target-openrisc: Correct carry flag check of l.addc and l.addic test cases
The test cases did not correctly test for the carry flag.
Signed-off-by: Sebastian Macke <sebastian@macke.de>
Reviewed-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Jia Liu <proljc@gmail.com>
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2013-11-20 21:47:46 +08:00 |
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Jia Liu
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d901eff3e6
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target-or32: Add testcases
Add testcases for OpenRISC.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:13:06 +00:00 |
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