Compare commits
30 Commits
pull-input
...
stable-1.3
Author | SHA1 | Date | |
---|---|---|---|
|
04024dea26 | ||
|
1bd4397e8d | ||
|
e76672424d | ||
|
df50a7e0cb | ||
|
90c96d33c4 | ||
|
4ee28799d4 | ||
|
563068a8b2 | ||
|
cdb483457c | ||
|
9d173df553 | ||
|
204dd38c2d | ||
|
86bab45948 | ||
|
006c747440 | ||
|
f042cca009 | ||
|
1205b8080f | ||
|
ff0c079c14 | ||
|
d745511fc9 | ||
|
5afd0ecaa6 | ||
|
c4cd5b0f6d | ||
|
7ca2496588 | ||
|
bfae9374f1 | ||
|
b68c48ff01 | ||
|
36fd8179b6 | ||
|
0bc5f4ad63 | ||
|
37e1428cc7 | ||
|
518799a3e7 | ||
|
16c5fe49de | ||
|
f1a2195ec3 | ||
|
3b4fc1f9d2 | ||
|
d67d95f24e | ||
|
0a7ad69a0f |
@@ -264,5 +264,6 @@ bool aio_poll(AioContext *ctx, bool blocking)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return progress;
|
assert(progress || busy);
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
@@ -214,5 +214,6 @@ bool aio_poll(AioContext *ctx, bool blocking)
|
|||||||
events[ret - WAIT_OBJECT_0] = events[--count];
|
events[ret - WAIT_OBJECT_0] = events[--count];
|
||||||
}
|
}
|
||||||
|
|
||||||
return progress;
|
assert(progress || busy);
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
18
arch_init.c
18
arch_init.c
@@ -535,9 +535,13 @@ static void sort_ram_list(void)
|
|||||||
|
|
||||||
static void migration_end(void)
|
static void migration_end(void)
|
||||||
{
|
{
|
||||||
memory_global_dirty_log_stop();
|
if (migration_bitmap) {
|
||||||
|
memory_global_dirty_log_stop();
|
||||||
|
g_free(migration_bitmap);
|
||||||
|
migration_bitmap = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
if (migrate_use_xbzrle()) {
|
if (XBZRLE.cache) {
|
||||||
cache_fini(XBZRLE.cache);
|
cache_fini(XBZRLE.cache);
|
||||||
g_free(XBZRLE.cache);
|
g_free(XBZRLE.cache);
|
||||||
g_free(XBZRLE.encoded_buf);
|
g_free(XBZRLE.encoded_buf);
|
||||||
@@ -568,7 +572,7 @@ static int ram_save_setup(QEMUFile *f, void *opaque)
|
|||||||
int64_t ram_pages = last_ram_offset() >> TARGET_PAGE_BITS;
|
int64_t ram_pages = last_ram_offset() >> TARGET_PAGE_BITS;
|
||||||
|
|
||||||
migration_bitmap = bitmap_new(ram_pages);
|
migration_bitmap = bitmap_new(ram_pages);
|
||||||
bitmap_set(migration_bitmap, 1, ram_pages);
|
bitmap_set(migration_bitmap, 0, ram_pages);
|
||||||
migration_dirty_pages = ram_pages;
|
migration_dirty_pages = ram_pages;
|
||||||
|
|
||||||
bytes_transferred = 0;
|
bytes_transferred = 0;
|
||||||
@@ -689,13 +693,10 @@ static int ram_save_complete(QEMUFile *f, void *opaque)
|
|||||||
}
|
}
|
||||||
bytes_transferred += bytes_sent;
|
bytes_transferred += bytes_sent;
|
||||||
}
|
}
|
||||||
memory_global_dirty_log_stop();
|
migration_end();
|
||||||
|
|
||||||
qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
|
qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
|
||||||
|
|
||||||
g_free(migration_bitmap);
|
|
||||||
migration_bitmap = NULL;
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -840,7 +841,8 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id)
|
|||||||
memset(host, ch, TARGET_PAGE_SIZE);
|
memset(host, ch, TARGET_PAGE_SIZE);
|
||||||
#ifndef _WIN32
|
#ifndef _WIN32
|
||||||
if (ch == 0 &&
|
if (ch == 0 &&
|
||||||
(!kvm_enabled() || kvm_has_sync_mmu())) {
|
(!kvm_enabled() || kvm_has_sync_mmu()) &&
|
||||||
|
getpagesize() <= TARGET_PAGE_SIZE) {
|
||||||
qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED);
|
qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@@ -456,15 +456,7 @@ static ssize_t handle_aiocb_ioctl(RawPosixAIOData *aiocb)
|
|||||||
return -errno;
|
return -errno;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
return 0;
|
||||||
* This looks weird, but the aio code only considers a request
|
|
||||||
* successful if it has written the full number of bytes.
|
|
||||||
*
|
|
||||||
* Now we overload aio_nbytes as aio_ioctl_cmd for the ioctl command,
|
|
||||||
* so in fact we return the ioctl command here to make posix_aio_read()
|
|
||||||
* happy..
|
|
||||||
*/
|
|
||||||
return aiocb->aio_nbytes;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t handle_aiocb_flush(RawPosixAIOData *aiocb)
|
static ssize_t handle_aiocb_flush(RawPosixAIOData *aiocb)
|
||||||
|
@@ -84,11 +84,11 @@ static void win32_aio_process_completion(QEMUWin32AIOState *s,
|
|||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; i < qiov->niov; ++i) {
|
for (i = 0; i < qiov->niov; ++i) {
|
||||||
memcpy(p, qiov->iov[i].iov_base, qiov->iov[i].iov_len);
|
memcpy(qiov->iov[i].iov_base, p, qiov->iov[i].iov_len);
|
||||||
p += qiov->iov[i].iov_len;
|
p += qiov->iov[i].iov_len;
|
||||||
}
|
}
|
||||||
g_free(waiocb->buf);
|
|
||||||
}
|
}
|
||||||
|
qemu_vfree(waiocb->buf);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@@ -66,9 +66,9 @@ static ssize_t buffered_flush(QEMUFileBuffered *s)
|
|||||||
DPRINTF("flushing %zu byte(s) of data\n", s->buffer_size);
|
DPRINTF("flushing %zu byte(s) of data\n", s->buffer_size);
|
||||||
|
|
||||||
while (s->bytes_xfer < s->xfer_limit && offset < s->buffer_size) {
|
while (s->bytes_xfer < s->xfer_limit && offset < s->buffer_size) {
|
||||||
|
size_t to_send = MIN(s->buffer_size - offset, s->xfer_limit - s->bytes_xfer);
|
||||||
ret = migrate_fd_put_buffer(s->migration_state, s->buffer + offset,
|
ret = migrate_fd_put_buffer(s->migration_state, s->buffer + offset,
|
||||||
s->buffer_size - offset);
|
to_send);
|
||||||
if (ret == -EAGAIN) {
|
if (ret == -EAGAIN) {
|
||||||
DPRINTF("backend not ready, freezing\n");
|
DPRINTF("backend not ready, freezing\n");
|
||||||
ret = 0;
|
ret = 0;
|
||||||
|
@@ -61,6 +61,8 @@ static int debugflags = DBGBIT(TXERR) | DBGBIT(GENERAL);
|
|||||||
|
|
||||||
/* this is the size past which hardware will drop packets when setting LPE=0 */
|
/* this is the size past which hardware will drop packets when setting LPE=0 */
|
||||||
#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
|
#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
|
||||||
|
/* this is the size past which hardware will drop packets when setting LPE=1 */
|
||||||
|
#define MAXIMUM_ETHERNET_LPE_SIZE 16384
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* HW models:
|
* HW models:
|
||||||
@@ -809,8 +811,9 @@ e1000_receive(NetClientState *nc, const uint8_t *buf, size_t size)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Discard oversized packets if !LPE and !SBP. */
|
/* Discard oversized packets if !LPE and !SBP. */
|
||||||
if (size > MAXIMUM_ETHERNET_VLAN_SIZE
|
if ((size > MAXIMUM_ETHERNET_LPE_SIZE ||
|
||||||
&& !(s->mac_reg[RCTL] & E1000_RCTL_LPE)
|
(size > MAXIMUM_ETHERNET_VLAN_SIZE
|
||||||
|
&& !(s->mac_reg[RCTL] & E1000_RCTL_LPE)))
|
||||||
&& !(s->mac_reg[RCTL] & E1000_RCTL_SBP)) {
|
&& !(s->mac_reg[RCTL] & E1000_RCTL_SBP)) {
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
|
@@ -1025,6 +1025,19 @@ static bool assigned_dev_msix_masked(MSIXTableEntry *entry)
|
|||||||
return (entry->ctrl & cpu_to_le32(0x1)) != 0;
|
return (entry->ctrl & cpu_to_le32(0x1)) != 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* When MSI-X is first enabled the vector table typically has all the
|
||||||
|
* vectors masked, so we can't use that as the obvious test to figure out
|
||||||
|
* how many vectors to initially enable. Instead we look at the data field
|
||||||
|
* because this is what worked for pci-assign for a long time. This makes
|
||||||
|
* sure the physical MSI-X state tracks the guest's view, which is important
|
||||||
|
* for some VF/PF and PF/fw communication channels.
|
||||||
|
*/
|
||||||
|
static bool assigned_dev_msix_skipped(MSIXTableEntry *entry)
|
||||||
|
{
|
||||||
|
return !entry->data;
|
||||||
|
}
|
||||||
|
|
||||||
static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev)
|
static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev)
|
||||||
{
|
{
|
||||||
AssignedDevice *adev = DO_UPCAST(AssignedDevice, dev, pci_dev);
|
AssignedDevice *adev = DO_UPCAST(AssignedDevice, dev, pci_dev);
|
||||||
@@ -1035,7 +1048,7 @@ static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev)
|
|||||||
|
|
||||||
/* Get the usable entry number for allocating */
|
/* Get the usable entry number for allocating */
|
||||||
for (i = 0; i < adev->msix_max; i++, entry++) {
|
for (i = 0; i < adev->msix_max; i++, entry++) {
|
||||||
if (assigned_dev_msix_masked(entry)) {
|
if (assigned_dev_msix_skipped(entry)) {
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
entries_nr++;
|
entries_nr++;
|
||||||
@@ -1064,7 +1077,7 @@ static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev)
|
|||||||
for (i = 0; i < adev->msix_max; i++, entry++) {
|
for (i = 0; i < adev->msix_max; i++, entry++) {
|
||||||
adev->msi_virq[i] = -1;
|
adev->msi_virq[i] = -1;
|
||||||
|
|
||||||
if (assigned_dev_msix_masked(entry)) {
|
if (assigned_dev_msix_skipped(entry)) {
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@@ -113,11 +113,12 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
|
|||||||
qxl->guest_primary.bits_pp);
|
qxl->guest_primary.bits_pp);
|
||||||
if (qxl->guest_primary.qxl_stride > 0) {
|
if (qxl->guest_primary.qxl_stride > 0) {
|
||||||
qemu_free_displaysurface(vga->ds);
|
qemu_free_displaysurface(vga->ds);
|
||||||
qemu_create_displaysurface_from(qxl->guest_primary.surface.width,
|
vga->ds->surface = qemu_create_displaysurface_from
|
||||||
qxl->guest_primary.surface.height,
|
(qxl->guest_primary.surface.width,
|
||||||
qxl->guest_primary.bits_pp,
|
qxl->guest_primary.surface.height,
|
||||||
qxl->guest_primary.abs_stride,
|
qxl->guest_primary.bits_pp,
|
||||||
qxl->guest_primary.data);
|
qxl->guest_primary.abs_stride,
|
||||||
|
qxl->guest_primary.data);
|
||||||
} else {
|
} else {
|
||||||
qemu_resize_displaysurface(vga->ds,
|
qemu_resize_displaysurface(vga->ds,
|
||||||
qxl->guest_primary.surface.width,
|
qxl->guest_primary.surface.width,
|
||||||
|
20
hw/qxl.c
20
hw/qxl.c
@@ -37,33 +37,25 @@
|
|||||||
*/
|
*/
|
||||||
#undef SPICE_RING_PROD_ITEM
|
#undef SPICE_RING_PROD_ITEM
|
||||||
#define SPICE_RING_PROD_ITEM(qxl, r, ret) { \
|
#define SPICE_RING_PROD_ITEM(qxl, r, ret) { \
|
||||||
typeof(r) start = r; \
|
|
||||||
typeof(r) end = r + 1; \
|
|
||||||
uint32_t prod = (r)->prod & SPICE_RING_INDEX_MASK(r); \
|
uint32_t prod = (r)->prod & SPICE_RING_INDEX_MASK(r); \
|
||||||
typeof(&(r)->items[prod]) m_item = &(r)->items[prod]; \
|
if (prod >= ARRAY_SIZE((r)->items)) { \
|
||||||
if (!((uint8_t*)m_item >= (uint8_t*)(start) && (uint8_t*)(m_item + 1) <= (uint8_t*)(end))) { \
|
|
||||||
qxl_set_guest_bug(qxl, "SPICE_RING_PROD_ITEM indices mismatch " \
|
qxl_set_guest_bug(qxl, "SPICE_RING_PROD_ITEM indices mismatch " \
|
||||||
"! %p <= %p < %p", (uint8_t *)start, \
|
"%u >= %zu", prod, ARRAY_SIZE((r)->items)); \
|
||||||
(uint8_t *)m_item, (uint8_t *)end); \
|
|
||||||
ret = NULL; \
|
ret = NULL; \
|
||||||
} else { \
|
} else { \
|
||||||
ret = &m_item->el; \
|
ret = &(r)->items[prod].el; \
|
||||||
} \
|
} \
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef SPICE_RING_CONS_ITEM
|
#undef SPICE_RING_CONS_ITEM
|
||||||
#define SPICE_RING_CONS_ITEM(qxl, r, ret) { \
|
#define SPICE_RING_CONS_ITEM(qxl, r, ret) { \
|
||||||
typeof(r) start = r; \
|
|
||||||
typeof(r) end = r + 1; \
|
|
||||||
uint32_t cons = (r)->cons & SPICE_RING_INDEX_MASK(r); \
|
uint32_t cons = (r)->cons & SPICE_RING_INDEX_MASK(r); \
|
||||||
typeof(&(r)->items[cons]) m_item = &(r)->items[cons]; \
|
if (cons >= ARRAY_SIZE((r)->items)) { \
|
||||||
if (!((uint8_t*)m_item >= (uint8_t*)(start) && (uint8_t*)(m_item + 1) <= (uint8_t*)(end))) { \
|
|
||||||
qxl_set_guest_bug(qxl, "SPICE_RING_CONS_ITEM indices mismatch " \
|
qxl_set_guest_bug(qxl, "SPICE_RING_CONS_ITEM indices mismatch " \
|
||||||
"! %p <= %p < %p", (uint8_t *)start, \
|
"%u >= %zu", cons, ARRAY_SIZE((r)->items)); \
|
||||||
(uint8_t *)m_item, (uint8_t *)end); \
|
|
||||||
ret = NULL; \
|
ret = NULL; \
|
||||||
} else { \
|
} else { \
|
||||||
ret = &m_item->el; \
|
ret = &(r)->items[cons].el; \
|
||||||
} \
|
} \
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@@ -275,7 +275,7 @@ static void vfio_enable_intx_kvm(VFIODevice *vdev)
|
|||||||
int ret, argsz;
|
int ret, argsz;
|
||||||
int32_t *pfd;
|
int32_t *pfd;
|
||||||
|
|
||||||
if (!kvm_irqchip_in_kernel() ||
|
if (!kvm_irqfds_enabled() ||
|
||||||
vdev->intx.route.mode != PCI_INTX_ENABLED ||
|
vdev->intx.route.mode != PCI_INTX_ENABLED ||
|
||||||
!kvm_check_extension(kvm_state, KVM_CAP_IRQFD_RESAMPLE)) {
|
!kvm_check_extension(kvm_state, KVM_CAP_IRQFD_RESAMPLE)) {
|
||||||
return;
|
return;
|
||||||
@@ -438,7 +438,8 @@ static int vfio_enable_intx(VFIODevice *vdev)
|
|||||||
* Only conditional to avoid generating error messages on platforms
|
* Only conditional to avoid generating error messages on platforms
|
||||||
* where we won't actually use the result anyway.
|
* where we won't actually use the result anyway.
|
||||||
*/
|
*/
|
||||||
if (kvm_check_extension(kvm_state, KVM_CAP_IRQFD_RESAMPLE)) {
|
if (kvm_irqfds_enabled() &&
|
||||||
|
kvm_check_extension(kvm_state, KVM_CAP_IRQFD_RESAMPLE)) {
|
||||||
vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev,
|
vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev,
|
||||||
vdev->intx.pin);
|
vdev->intx.pin);
|
||||||
}
|
}
|
||||||
@@ -561,8 +562,8 @@ static int vfio_enable_vectors(VFIODevice *vdev, bool msix)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int vfio_msix_vector_use(PCIDevice *pdev,
|
static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr,
|
||||||
unsigned int nr, MSIMessage msg)
|
MSIMessage *msg, IOHandler *handler)
|
||||||
{
|
{
|
||||||
VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
|
VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
|
||||||
VFIOMSIVector *vector;
|
VFIOMSIVector *vector;
|
||||||
@@ -586,7 +587,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev,
|
|||||||
* Attempt to enable route through KVM irqchip,
|
* Attempt to enable route through KVM irqchip,
|
||||||
* default to userspace handling if unavailable.
|
* default to userspace handling if unavailable.
|
||||||
*/
|
*/
|
||||||
vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
|
vector->virq = msg ? kvm_irqchip_add_msi_route(kvm_state, *msg) : -1;
|
||||||
if (vector->virq < 0 ||
|
if (vector->virq < 0 ||
|
||||||
kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
|
kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
|
||||||
vector->virq) < 0) {
|
vector->virq) < 0) {
|
||||||
@@ -595,7 +596,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev,
|
|||||||
vector->virq = -1;
|
vector->virq = -1;
|
||||||
}
|
}
|
||||||
qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
|
qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
|
||||||
vfio_msi_interrupt, NULL, vector);
|
handler, NULL, vector);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -638,6 +639,12 @@ static int vfio_msix_vector_use(PCIDevice *pdev,
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int vfio_msix_vector_use(PCIDevice *pdev,
|
||||||
|
unsigned int nr, MSIMessage msg)
|
||||||
|
{
|
||||||
|
return vfio_msix_vector_do_use(pdev, nr, &msg, vfio_msi_interrupt);
|
||||||
|
}
|
||||||
|
|
||||||
static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
|
static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
|
||||||
{
|
{
|
||||||
VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
|
VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
|
||||||
@@ -696,6 +703,22 @@ static void vfio_enable_msix(VFIODevice *vdev)
|
|||||||
|
|
||||||
vdev->interrupt = VFIO_INT_MSIX;
|
vdev->interrupt = VFIO_INT_MSIX;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Some communication channels between VF & PF or PF & fw rely on the
|
||||||
|
* physical state of the device and expect that enabling MSI-X from the
|
||||||
|
* guest enables the same on the host. When our guest is Linux, the
|
||||||
|
* guest driver call to pci_enable_msix() sets the enabling bit in the
|
||||||
|
* MSI-X capability, but leaves the vector table masked. We therefore
|
||||||
|
* can't rely on a vector_use callback (from request_irq() in the guest)
|
||||||
|
* to switch the physical device into MSI-X mode because that may come a
|
||||||
|
* long time after pci_enable_msix(). This code enables vector 0 with
|
||||||
|
* triggering to userspace, then immediately release the vector, leaving
|
||||||
|
* the physical device with no vectors enabled, but MSI-X enabled, just
|
||||||
|
* like the guest view.
|
||||||
|
*/
|
||||||
|
vfio_msix_vector_do_use(&vdev->pdev, 0, NULL, NULL);
|
||||||
|
vfio_msix_vector_release(&vdev->pdev, 0);
|
||||||
|
|
||||||
if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
|
if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
|
||||||
vfio_msix_vector_release)) {
|
vfio_msix_vector_release)) {
|
||||||
error_report("vfio: msix_set_vector_notifiers failed\n");
|
error_report("vfio: msix_set_vector_notifiers failed\n");
|
||||||
@@ -1814,13 +1837,13 @@ static int vfio_get_device(VFIOGroup *group, const char *name, VFIODevice *vdev)
|
|||||||
error_report("Warning, device %s does not support reset\n", name);
|
error_report("Warning, device %s does not support reset\n", name);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (dev_info.num_regions != VFIO_PCI_NUM_REGIONS) {
|
if (dev_info.num_regions < VFIO_PCI_CONFIG_REGION_INDEX + 1) {
|
||||||
error_report("vfio: unexpected number of io regions %u\n",
|
error_report("vfio: unexpected number of io regions %u\n",
|
||||||
dev_info.num_regions);
|
dev_info.num_regions);
|
||||||
goto error;
|
goto error;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (dev_info.num_irqs != VFIO_PCI_NUM_IRQS) {
|
if (dev_info.num_irqs < VFIO_PCI_MSIX_IRQ_INDEX + 1) {
|
||||||
error_report("vfio: unexpected number of irqs %u\n", dev_info.num_irqs);
|
error_report("vfio: unexpected number of irqs %u\n", dev_info.num_irqs);
|
||||||
goto error;
|
goto error;
|
||||||
}
|
}
|
||||||
|
2
hw/vga.c
2
hw/vga.c
@@ -2413,7 +2413,7 @@ void ppm_save(const char *filename, struct DisplaySurface *ds, Error **errp)
|
|||||||
}
|
}
|
||||||
linebuf = qemu_pixman_linebuf_create(PIXMAN_BE_r8g8b8, width);
|
linebuf = qemu_pixman_linebuf_create(PIXMAN_BE_r8g8b8, width);
|
||||||
for (y = 0; y < height; y++) {
|
for (y = 0; y < height; y++) {
|
||||||
qemu_pixman_linebuf_fill(linebuf, ds->image, width, y);
|
qemu_pixman_linebuf_fill(linebuf, ds->image, width, 0, y);
|
||||||
clearerr(f);
|
clearerr(f);
|
||||||
ret = fwrite(pixman_image_get_data(linebuf), 1,
|
ret = fwrite(pixman_image_get_data(linebuf), 1,
|
||||||
pixman_image_get_stride(linebuf), f);
|
pixman_image_get_stride(linebuf), f);
|
||||||
|
@@ -113,6 +113,31 @@ struct XenBlkDev {
|
|||||||
|
|
||||||
/* ------------------------------------------------------------- */
|
/* ------------------------------------------------------------- */
|
||||||
|
|
||||||
|
static void ioreq_reset(struct ioreq *ioreq)
|
||||||
|
{
|
||||||
|
memset(&ioreq->req, 0, sizeof(ioreq->req));
|
||||||
|
ioreq->status = 0;
|
||||||
|
ioreq->start = 0;
|
||||||
|
ioreq->presync = 0;
|
||||||
|
ioreq->postsync = 0;
|
||||||
|
ioreq->mapped = 0;
|
||||||
|
|
||||||
|
memset(ioreq->domids, 0, sizeof(ioreq->domids));
|
||||||
|
memset(ioreq->refs, 0, sizeof(ioreq->refs));
|
||||||
|
ioreq->prot = 0;
|
||||||
|
memset(ioreq->page, 0, sizeof(ioreq->page));
|
||||||
|
ioreq->pages = NULL;
|
||||||
|
|
||||||
|
ioreq->aio_inflight = 0;
|
||||||
|
ioreq->aio_errors = 0;
|
||||||
|
|
||||||
|
ioreq->blkdev = NULL;
|
||||||
|
memset(&ioreq->list, 0, sizeof(ioreq->list));
|
||||||
|
memset(&ioreq->acct, 0, sizeof(ioreq->acct));
|
||||||
|
|
||||||
|
qemu_iovec_reset(&ioreq->v);
|
||||||
|
}
|
||||||
|
|
||||||
static struct ioreq *ioreq_start(struct XenBlkDev *blkdev)
|
static struct ioreq *ioreq_start(struct XenBlkDev *blkdev)
|
||||||
{
|
{
|
||||||
struct ioreq *ioreq = NULL;
|
struct ioreq *ioreq = NULL;
|
||||||
@@ -130,7 +155,6 @@ static struct ioreq *ioreq_start(struct XenBlkDev *blkdev)
|
|||||||
/* get one from freelist */
|
/* get one from freelist */
|
||||||
ioreq = QLIST_FIRST(&blkdev->freelist);
|
ioreq = QLIST_FIRST(&blkdev->freelist);
|
||||||
QLIST_REMOVE(ioreq, list);
|
QLIST_REMOVE(ioreq, list);
|
||||||
qemu_iovec_reset(&ioreq->v);
|
|
||||||
}
|
}
|
||||||
QLIST_INSERT_HEAD(&blkdev->inflight, ioreq, list);
|
QLIST_INSERT_HEAD(&blkdev->inflight, ioreq, list);
|
||||||
blkdev->requests_inflight++;
|
blkdev->requests_inflight++;
|
||||||
@@ -154,7 +178,7 @@ static void ioreq_release(struct ioreq *ioreq, bool finish)
|
|||||||
struct XenBlkDev *blkdev = ioreq->blkdev;
|
struct XenBlkDev *blkdev = ioreq->blkdev;
|
||||||
|
|
||||||
QLIST_REMOVE(ioreq, list);
|
QLIST_REMOVE(ioreq, list);
|
||||||
memset(ioreq, 0, sizeof(*ioreq));
|
ioreq_reset(ioreq);
|
||||||
ioreq->blkdev = blkdev;
|
ioreq->blkdev = blkdev;
|
||||||
QLIST_INSERT_HEAD(&blkdev->freelist, ioreq, list);
|
QLIST_INSERT_HEAD(&blkdev->freelist, ioreq, list);
|
||||||
if (finish) {
|
if (finish) {
|
||||||
|
@@ -671,7 +671,8 @@ static int xen_pt_initfn(PCIDevice *d)
|
|||||||
s->is_virtfn = s->real_device.is_virtfn;
|
s->is_virtfn = s->real_device.is_virtfn;
|
||||||
if (s->is_virtfn) {
|
if (s->is_virtfn) {
|
||||||
XEN_PT_LOG(d, "%04x:%02x:%02x.%d is a SR-IOV Virtual Function\n",
|
XEN_PT_LOG(d, "%04x:%02x:%02x.%d is a SR-IOV Virtual Function\n",
|
||||||
s->real_device.domain, bus, slot, func);
|
s->real_device.domain, s->real_device.bus,
|
||||||
|
s->real_device.dev, s->real_device.func);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initialize virtualized PCI configuration (Extended 256 Bytes) */
|
/* Initialize virtualized PCI configuration (Extended 256 Bytes) */
|
||||||
@@ -752,7 +753,7 @@ out:
|
|||||||
memory_listener_register(&s->memory_listener, &address_space_memory);
|
memory_listener_register(&s->memory_listener, &address_space_memory);
|
||||||
memory_listener_register(&s->io_listener, &address_space_io);
|
memory_listener_register(&s->io_listener, &address_space_io);
|
||||||
XEN_PT_LOG(d, "Real physical device %02x:%02x.%d registered successfuly!\n",
|
XEN_PT_LOG(d, "Real physical device %02x:%02x.%d registered successfuly!\n",
|
||||||
bus, slot, func);
|
s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@@ -321,7 +321,7 @@ static int xen_pt_msix_update_one(XenPCIPassthroughState *s, int entry_nr)
|
|||||||
|
|
||||||
pirq = entry->pirq;
|
pirq = entry->pirq;
|
||||||
|
|
||||||
rc = msi_msix_setup(s, entry->data, entry->data, &pirq, true, entry_nr,
|
rc = msi_msix_setup(s, entry->addr, entry->data, &pirq, true, entry_nr,
|
||||||
entry->pirq == XEN_PT_UNASSIGNED_PIRQ);
|
entry->pirq == XEN_PT_UNASSIGNED_PIRQ);
|
||||||
if (rc) {
|
if (rc) {
|
||||||
return rc;
|
return rc;
|
||||||
|
Binary file not shown.
BIN
pc-bios/bios.bin
BIN
pc-bios/bios.bin
Binary file not shown.
BIN
pc-bios/q35-acpi-dsdt.aml
Normal file
BIN
pc-bios/q35-acpi-dsdt.aml
Normal file
Binary file not shown.
@@ -177,16 +177,14 @@ bool aio_pending(AioContext *ctx);
|
|||||||
* aio as a result of executing I/O completion or bh callbacks.
|
* aio as a result of executing I/O completion or bh callbacks.
|
||||||
*
|
*
|
||||||
* If there is no pending AIO operation or completion (bottom half),
|
* If there is no pending AIO operation or completion (bottom half),
|
||||||
* return false. If there are pending bottom halves, return true.
|
* return false. If there are pending AIO operations of bottom halves,
|
||||||
|
* return true.
|
||||||
*
|
*
|
||||||
* If there are no pending bottom halves, but there are pending AIO
|
* If there are no pending bottom halves, but there are pending AIO
|
||||||
* operations, it may not be possible to make any progress without
|
* operations, it may not be possible to make any progress without
|
||||||
* blocking. If @blocking is true, this function will wait until one
|
* blocking. If @blocking is true, this function will wait until one
|
||||||
* or more AIO events have completed, to ensure something has moved
|
* or more AIO events have completed, to ensure something has moved
|
||||||
* before returning.
|
* before returning.
|
||||||
*
|
|
||||||
* If @blocking is false, this function will also return false if the
|
|
||||||
* function cannot make any progress without blocking.
|
|
||||||
*/
|
*/
|
||||||
bool aio_poll(AioContext *ctx, bool blocking);
|
bool aio_poll(AioContext *ctx, bool blocking);
|
||||||
|
|
||||||
|
@@ -52,10 +52,10 @@ pixman_image_t *qemu_pixman_linebuf_create(pixman_format_code_t format,
|
|||||||
}
|
}
|
||||||
|
|
||||||
void qemu_pixman_linebuf_fill(pixman_image_t *linebuf, pixman_image_t *fb,
|
void qemu_pixman_linebuf_fill(pixman_image_t *linebuf, pixman_image_t *fb,
|
||||||
int width, int y)
|
int width, int x, int y)
|
||||||
{
|
{
|
||||||
pixman_image_composite(PIXMAN_OP_SRC, fb, NULL, linebuf,
|
pixman_image_composite(PIXMAN_OP_SRC, fb, NULL, linebuf,
|
||||||
0, y, 0, 0, 0, 0, width, 1);
|
x, y, 0, 0, 0, 0, width, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
pixman_image_t *qemu_pixman_mirror_create(pixman_format_code_t format,
|
pixman_image_t *qemu_pixman_mirror_create(pixman_format_code_t format,
|
||||||
|
@@ -31,7 +31,7 @@ pixman_format_code_t qemu_pixman_get_format(PixelFormat *pf);
|
|||||||
pixman_image_t *qemu_pixman_linebuf_create(pixman_format_code_t format,
|
pixman_image_t *qemu_pixman_linebuf_create(pixman_format_code_t format,
|
||||||
int width);
|
int width);
|
||||||
void qemu_pixman_linebuf_fill(pixman_image_t *linebuf, pixman_image_t *fb,
|
void qemu_pixman_linebuf_fill(pixman_image_t *linebuf, pixman_image_t *fb,
|
||||||
int width, int y);
|
int width, int x, int y);
|
||||||
pixman_image_t *qemu_pixman_mirror_create(pixman_format_code_t format,
|
pixman_image_t *qemu_pixman_mirror_create(pixman_format_code_t format,
|
||||||
pixman_image_t *image);
|
pixman_image_t *image);
|
||||||
void qemu_pixman_image_unref(pixman_image_t *image);
|
void qemu_pixman_image_unref(pixman_image_t *image);
|
||||||
|
@@ -122,7 +122,7 @@ void qemu_sem_init(QemuSemaphore *sem, int init)
|
|||||||
{
|
{
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
#if defined(__OpenBSD__) || defined(__APPLE__) || defined(__NetBSD__)
|
#if defined(__APPLE__) || defined(__NetBSD__)
|
||||||
rc = pthread_mutex_init(&sem->lock, NULL);
|
rc = pthread_mutex_init(&sem->lock, NULL);
|
||||||
if (rc != 0) {
|
if (rc != 0) {
|
||||||
error_exit(rc, __func__);
|
error_exit(rc, __func__);
|
||||||
@@ -147,7 +147,7 @@ void qemu_sem_destroy(QemuSemaphore *sem)
|
|||||||
{
|
{
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
#if defined(__OpenBSD__) || defined(__APPLE__) || defined(__NetBSD__)
|
#if defined(__APPLE__) || defined(__NetBSD__)
|
||||||
rc = pthread_cond_destroy(&sem->cond);
|
rc = pthread_cond_destroy(&sem->cond);
|
||||||
if (rc < 0) {
|
if (rc < 0) {
|
||||||
error_exit(rc, __func__);
|
error_exit(rc, __func__);
|
||||||
@@ -168,7 +168,7 @@ void qemu_sem_post(QemuSemaphore *sem)
|
|||||||
{
|
{
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
#if defined(__OpenBSD__) || defined(__APPLE__) || defined(__NetBSD__)
|
#if defined(__APPLE__) || defined(__NetBSD__)
|
||||||
pthread_mutex_lock(&sem->lock);
|
pthread_mutex_lock(&sem->lock);
|
||||||
if (sem->count == INT_MAX) {
|
if (sem->count == INT_MAX) {
|
||||||
rc = EINVAL;
|
rc = EINVAL;
|
||||||
@@ -206,13 +206,14 @@ int qemu_sem_timedwait(QemuSemaphore *sem, int ms)
|
|||||||
int rc;
|
int rc;
|
||||||
struct timespec ts;
|
struct timespec ts;
|
||||||
|
|
||||||
#if defined(__OpenBSD__) || defined(__APPLE__) || defined(__NetBSD__)
|
#if defined(__APPLE__) || defined(__NetBSD__)
|
||||||
compute_abs_deadline(&ts, ms);
|
compute_abs_deadline(&ts, ms);
|
||||||
pthread_mutex_lock(&sem->lock);
|
pthread_mutex_lock(&sem->lock);
|
||||||
--sem->count;
|
--sem->count;
|
||||||
while (sem->count < 0) {
|
while (sem->count < 0) {
|
||||||
rc = pthread_cond_timedwait(&sem->cond, &sem->lock, &ts);
|
rc = pthread_cond_timedwait(&sem->cond, &sem->lock, &ts);
|
||||||
if (rc == ETIMEDOUT) {
|
if (rc == ETIMEDOUT) {
|
||||||
|
++sem->count;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (rc != 0) {
|
if (rc != 0) {
|
||||||
@@ -248,7 +249,7 @@ int qemu_sem_timedwait(QemuSemaphore *sem, int ms)
|
|||||||
|
|
||||||
void qemu_sem_wait(QemuSemaphore *sem)
|
void qemu_sem_wait(QemuSemaphore *sem)
|
||||||
{
|
{
|
||||||
#if defined(__OpenBSD__) || defined(__APPLE__) || defined(__NetBSD__)
|
#if defined(__APPLE__) || defined(__NetBSD__)
|
||||||
pthread_mutex_lock(&sem->lock);
|
pthread_mutex_lock(&sem->lock);
|
||||||
--sem->count;
|
--sem->count;
|
||||||
while (sem->count < 0) {
|
while (sem->count < 0) {
|
||||||
|
@@ -12,7 +12,7 @@ struct QemuCond {
|
|||||||
};
|
};
|
||||||
|
|
||||||
struct QemuSemaphore {
|
struct QemuSemaphore {
|
||||||
#if defined(__OpenBSD__) || defined(__APPLE__) || defined(__NetBSD__)
|
#if defined(__APPLE__) || defined(__NetBSD__)
|
||||||
pthread_mutex_t lock;
|
pthread_mutex_t lock;
|
||||||
pthread_cond_t cond;
|
pthread_cond_t cond;
|
||||||
int count;
|
int count;
|
||||||
|
Submodule roms/seabios updated: b1c35f2b28...a810e4e72a
@@ -3152,7 +3152,7 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong rs, \
|
|||||||
\
|
\
|
||||||
filter = ((int32_t)0x01 << size) - 1; \
|
filter = ((int32_t)0x01 << size) - 1; \
|
||||||
filter = filter << pos; \
|
filter = filter << pos; \
|
||||||
temprs = rs & filter; \
|
temprs = (rs << pos) & filter; \
|
||||||
temprt = rt & ~filter; \
|
temprt = rt & ~filter; \
|
||||||
temp = temprs | temprt; \
|
temp = temprs | temprt; \
|
||||||
\
|
\
|
||||||
@@ -3814,17 +3814,18 @@ void helper_shilo(target_ulong ac, target_ulong rs, CPUMIPSState *env)
|
|||||||
|
|
||||||
rs5_0 = rs & 0x3F;
|
rs5_0 = rs & 0x3F;
|
||||||
rs5_0 = (int8_t)(rs5_0 << 2) >> 2;
|
rs5_0 = (int8_t)(rs5_0 << 2) >> 2;
|
||||||
rs5_0 = MIPSDSP_ABS(rs5_0);
|
|
||||||
|
if (unlikely(rs5_0 == 0)) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
acc = (((uint64_t)env->active_tc.HI[ac] << 32) & MIPSDSP_LHI) |
|
acc = (((uint64_t)env->active_tc.HI[ac] << 32) & MIPSDSP_LHI) |
|
||||||
((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO);
|
((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO);
|
||||||
if (rs5_0 == 0) {
|
|
||||||
temp = acc;
|
if (rs5_0 > 0) {
|
||||||
|
temp = acc >> rs5_0;
|
||||||
} else {
|
} else {
|
||||||
if (rs5_0 > 0) {
|
temp = acc << -rs5_0;
|
||||||
temp = acc >> rs5_0;
|
|
||||||
} else {
|
|
||||||
temp = acc << rs5_0;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
env->active_tc.HI[ac] = (target_ulong)(int32_t)((temp & MIPSDSP_LHI) >> 32);
|
env->active_tc.HI[ac] = (target_ulong)(int32_t)((temp & MIPSDSP_LHI) >> 32);
|
||||||
|
@@ -486,7 +486,8 @@ static int get_physical_addr_mmu(CPUXtensaState *env, bool update_tlb,
|
|||||||
INST_FETCH_PRIVILEGE_CAUSE;
|
INST_FETCH_PRIVILEGE_CAUSE;
|
||||||
}
|
}
|
||||||
|
|
||||||
*access = mmu_attr_to_access(entry->attr);
|
*access = mmu_attr_to_access(entry->attr) &
|
||||||
|
~(dtlb ? PAGE_EXEC : PAGE_READ | PAGE_WRITE);
|
||||||
if (!is_access_granted(*access, is_write)) {
|
if (!is_access_granted(*access, is_write)) {
|
||||||
return dtlb ?
|
return dtlb ?
|
||||||
(is_write ?
|
(is_write ?
|
||||||
|
@@ -2962,7 +2962,11 @@ static void gen_intermediate_code_internal(
|
|||||||
gen_icount_end(tb, insn_count);
|
gen_icount_end(tb, insn_count);
|
||||||
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
|
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
|
||||||
|
|
||||||
if (!search_pc) {
|
if (search_pc) {
|
||||||
|
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||||
|
memset(gen_opc_instr_start + lj + 1, 0,
|
||||||
|
(j - lj) * sizeof(gen_opc_instr_start[0]));
|
||||||
|
} else {
|
||||||
tb->size = dc.pc - pc_start;
|
tb->size = dc.pc - pc_start;
|
||||||
tb->icount = insn_count;
|
tb->icount = insn_count;
|
||||||
}
|
}
|
||||||
|
@@ -1145,7 +1145,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
|
|||||||
TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
|
TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
|
||||||
/* We assume that the offset is contained within 20 bits. */
|
/* We assume that the offset is contained within 20 bits. */
|
||||||
tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read);
|
tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read);
|
||||||
assert(tlb_offset & ~0xfffff == 0);
|
assert((tlb_offset & ~0xfffff) == 0);
|
||||||
if (tlb_offset > 0xfff) {
|
if (tlb_offset > 0xfff) {
|
||||||
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
|
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
|
||||||
0xa00 | (tlb_offset >> 12));
|
0xa00 | (tlb_offset >> 12));
|
||||||
@@ -1354,7 +1354,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
|
|||||||
TCG_AREG0, TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
|
TCG_AREG0, TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
|
||||||
/* We assume that the offset is contained within 20 bits. */
|
/* We assume that the offset is contained within 20 bits. */
|
||||||
tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
|
tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
|
||||||
assert(tlb_offset & ~0xfffff == 0);
|
assert((tlb_offset & ~0xfffff) == 0);
|
||||||
if (tlb_offset > 0xfff) {
|
if (tlb_offset > 0xfff) {
|
||||||
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
|
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
|
||||||
0xa00 | (tlb_offset >> 12));
|
0xa00 | (tlb_offset >> 12));
|
||||||
|
@@ -10,7 +10,7 @@ int main()
|
|||||||
dsp = 0x305;
|
dsp = 0x305;
|
||||||
rt = 0x12345678;
|
rt = 0x12345678;
|
||||||
rs = 0x87654321;
|
rs = 0x87654321;
|
||||||
result = 0x12345338;
|
result = 0x12345438;
|
||||||
__asm
|
__asm
|
||||||
("wrdsp %2, 0x03\n\t"
|
("wrdsp %2, 0x03\n\t"
|
||||||
"insv %0, %1\n\t"
|
"insv %0, %1\n\t"
|
||||||
|
@@ -23,5 +23,23 @@ int main()
|
|||||||
assert(ach == resulth);
|
assert(ach == resulth);
|
||||||
assert(acl == resultl);
|
assert(acl == resultl);
|
||||||
|
|
||||||
|
|
||||||
|
ach = 0x1;
|
||||||
|
acl = 0x80000000;
|
||||||
|
|
||||||
|
resulth = 0x3;
|
||||||
|
resultl = 0x0;
|
||||||
|
|
||||||
|
__asm
|
||||||
|
("mthi %0, $ac1\n\t"
|
||||||
|
"mtlo %1, $ac1\n\t"
|
||||||
|
"shilo $ac1, -1\n\t"
|
||||||
|
"mfhi %0, $ac1\n\t"
|
||||||
|
"mflo %1, $ac1\n\t"
|
||||||
|
: "+r"(ach), "+r"(acl)
|
||||||
|
);
|
||||||
|
assert(ach == resulth);
|
||||||
|
assert(acl == resultl);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@@ -25,5 +25,25 @@ int main()
|
|||||||
assert(ach == resulth);
|
assert(ach == resulth);
|
||||||
assert(acl == resultl);
|
assert(acl == resultl);
|
||||||
|
|
||||||
|
|
||||||
|
rs = 0xffffffff;
|
||||||
|
ach = 0x1;
|
||||||
|
acl = 0x80000000;
|
||||||
|
|
||||||
|
resulth = 0x3;
|
||||||
|
resultl = 0x0;
|
||||||
|
|
||||||
|
__asm
|
||||||
|
("mthi %0, $ac1\n\t"
|
||||||
|
"mtlo %1, $ac1\n\t"
|
||||||
|
"shilov $ac1, %2\n\t"
|
||||||
|
"mfhi %0, $ac1\n\t"
|
||||||
|
"mflo %1, $ac1\n\t"
|
||||||
|
: "+r"(ach), "+r"(acl)
|
||||||
|
: "r"(rs)
|
||||||
|
);
|
||||||
|
assert(ach == resulth);
|
||||||
|
assert(acl == resultl);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@@ -315,13 +315,13 @@ static void test_wait_event_notifier_noflush(void)
|
|||||||
event_notifier_set(&data.e);
|
event_notifier_set(&data.e);
|
||||||
g_assert(aio_poll(ctx, false));
|
g_assert(aio_poll(ctx, false));
|
||||||
g_assert_cmpint(data.n, ==, 1);
|
g_assert_cmpint(data.n, ==, 1);
|
||||||
g_assert(!aio_poll(ctx, false));
|
g_assert(aio_poll(ctx, false));
|
||||||
g_assert_cmpint(data.n, ==, 1);
|
g_assert_cmpint(data.n, ==, 1);
|
||||||
|
|
||||||
event_notifier_set(&data.e);
|
event_notifier_set(&data.e);
|
||||||
g_assert(aio_poll(ctx, false));
|
g_assert(aio_poll(ctx, false));
|
||||||
g_assert_cmpint(data.n, ==, 2);
|
g_assert_cmpint(data.n, ==, 2);
|
||||||
g_assert(!aio_poll(ctx, false));
|
g_assert(aio_poll(ctx, false));
|
||||||
g_assert_cmpint(data.n, ==, 2);
|
g_assert_cmpint(data.n, ==, 2);
|
||||||
|
|
||||||
event_notifier_set(&dummy.e);
|
event_notifier_set(&dummy.e);
|
||||||
|
@@ -732,6 +732,8 @@ int qemu_spice_add_interface(SpiceBaseInstance *sin)
|
|||||||
*/
|
*/
|
||||||
spice_server = spice_server_new();
|
spice_server = spice_server_new();
|
||||||
spice_server_init(spice_server, &core_interface);
|
spice_server_init(spice_server, &core_interface);
|
||||||
|
qemu_add_vm_change_state_handler(vm_change_state_handler,
|
||||||
|
&spice_server);
|
||||||
}
|
}
|
||||||
|
|
||||||
return spice_server_add_interface(spice_server, sin);
|
return spice_server_add_interface(spice_server, sin);
|
||||||
|
@@ -1212,7 +1212,7 @@ static int send_jpeg_rect(VncState *vs, int x, int y, int w, int h, int quality)
|
|||||||
buf = (uint8_t *)pixman_image_get_data(linebuf);
|
buf = (uint8_t *)pixman_image_get_data(linebuf);
|
||||||
row[0] = buf;
|
row[0] = buf;
|
||||||
for (dy = 0; dy < h; dy++) {
|
for (dy = 0; dy < h; dy++) {
|
||||||
qemu_pixman_linebuf_fill(linebuf, vs->vd->server, w, dy);
|
qemu_pixman_linebuf_fill(linebuf, vs->vd->server, w, x, y + dy);
|
||||||
jpeg_write_scanlines(&cinfo, row, 1);
|
jpeg_write_scanlines(&cinfo, row, 1);
|
||||||
}
|
}
|
||||||
qemu_pixman_image_unref(linebuf);
|
qemu_pixman_image_unref(linebuf);
|
||||||
@@ -1356,7 +1356,7 @@ static int send_png_rect(VncState *vs, int x, int y, int w, int h,
|
|||||||
if (color_type == PNG_COLOR_TYPE_PALETTE) {
|
if (color_type == PNG_COLOR_TYPE_PALETTE) {
|
||||||
memcpy(buf, vs->tight.tight.buffer + (dy * w), w);
|
memcpy(buf, vs->tight.tight.buffer + (dy * w), w);
|
||||||
} else {
|
} else {
|
||||||
qemu_pixman_linebuf_fill(linebuf, vs->vd->server, w, dy);
|
qemu_pixman_linebuf_fill(linebuf, vs->vd->server, w, x, y + dy);
|
||||||
}
|
}
|
||||||
png_write_row(png_ptr, buf);
|
png_write_row(png_ptr, buf);
|
||||||
}
|
}
|
||||||
|
2
ui/vnc.c
2
ui/vnc.c
@@ -2569,7 +2569,7 @@ static int vnc_refresh_server_surface(VncDisplay *vd)
|
|||||||
uint8_t *server_ptr;
|
uint8_t *server_ptr;
|
||||||
|
|
||||||
if (vd->guest.format != VNC_SERVER_FB_FORMAT) {
|
if (vd->guest.format != VNC_SERVER_FB_FORMAT) {
|
||||||
qemu_pixman_linebuf_fill(tmpbuf, vd->guest.fb, width, y);
|
qemu_pixman_linebuf_fill(tmpbuf, vd->guest.fb, width, 0, y);
|
||||||
guest_ptr = (uint8_t *)pixman_image_get_data(tmpbuf);
|
guest_ptr = (uint8_t *)pixman_image_get_data(tmpbuf);
|
||||||
} else {
|
} else {
|
||||||
guest_ptr = guest_row;
|
guest_ptr = guest_row;
|
||||||
|
@@ -292,7 +292,8 @@ static int xen_add_to_physmap(XenIOState *state,
|
|||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
go_physmap:
|
go_physmap:
|
||||||
DPRINTF("mapping vram to %llx - %llx\n", start_addr, start_addr + size);
|
DPRINTF("mapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx"\n",
|
||||||
|
start_addr, start_addr + size);
|
||||||
|
|
||||||
pfn = phys_offset >> TARGET_PAGE_BITS;
|
pfn = phys_offset >> TARGET_PAGE_BITS;
|
||||||
start_gpfn = start_addr >> TARGET_PAGE_BITS;
|
start_gpfn = start_addr >> TARGET_PAGE_BITS;
|
||||||
@@ -365,8 +366,8 @@ static int xen_remove_from_physmap(XenIOState *state,
|
|||||||
phys_offset = physmap->phys_offset;
|
phys_offset = physmap->phys_offset;
|
||||||
size = physmap->size;
|
size = physmap->size;
|
||||||
|
|
||||||
DPRINTF("unmapping vram to %llx - %llx, from %llx\n",
|
DPRINTF("unmapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx", from ",
|
||||||
phys_offset, phys_offset + size, start_addr);
|
"%"HWADDR_PRIx"\n", phys_offset, phys_offset + size, start_addr);
|
||||||
|
|
||||||
size >>= TARGET_PAGE_BITS;
|
size >>= TARGET_PAGE_BITS;
|
||||||
start_addr >>= TARGET_PAGE_BITS;
|
start_addr >>= TARGET_PAGE_BITS;
|
||||||
|
Reference in New Issue
Block a user