Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <caa478c8987d6042434bb9582017cdf0ea192208.1545246859.git.alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
		
			
				
	
	
		
			654 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			654 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* General "disassemble this chunk" code.  Used for debugging. */
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "disas/bfd.h"
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#include "elf.h"
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#include "cpu.h"
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#include "disas/disas.h"
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#include "disas/capstone.h"
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typedef struct CPUDebug {
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    struct disassemble_info info;
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    CPUState *cpu;
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} CPUDebug;
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/* Filled in by elfload.c.  Simplistic, but will do for now. */
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struct syminfo *syminfos = NULL;
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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   Transfer them to myaddr.  */
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int
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buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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                   struct disassemble_info *info)
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{
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    if (memaddr < info->buffer_vma
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        || memaddr + length > info->buffer_vma + info->buffer_length)
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        /* Out of bounds.  Use EIO because GDB uses it.  */
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        return EIO;
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    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
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    return 0;
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}
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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   Transfer them to myaddr.  */
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static int
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target_read_memory (bfd_vma memaddr,
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                    bfd_byte *myaddr,
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                    int length,
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                    struct disassemble_info *info)
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{
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    CPUDebug *s = container_of(info, CPUDebug, info);
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    cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
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    return 0;
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}
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/* Print an error message.  We can assume that this is in response to
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   an error return from buffer_read_memory.  */
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void
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perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
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{
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  if (status != EIO)
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    /* Can't happen.  */
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    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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  else
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    /* Actually, address between memaddr and memaddr + len was
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       out of bounds.  */
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    (*info->fprintf_func) (info->stream,
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			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
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}
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/* This could be in a separate file, to save minuscule amounts of space
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   in statically linked executables.  */
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/* Just print the address is hex.  This is included for completeness even
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   though both GDB and objdump provide their own (to print symbolic
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   addresses).  */
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void
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generic_print_address (bfd_vma addr, struct disassemble_info *info)
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{
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    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
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}
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/* Print address in hex, truncated to the width of a host virtual address. */
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static void
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generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
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{
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    uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
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    generic_print_address(addr & mask, info);
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}
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/* Just return the given address.  */
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int
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generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
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{
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  return 1;
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}
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bfd_vma bfd_getl64 (const bfd_byte *addr)
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{
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  unsigned long long v;
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  v = (unsigned long long) addr[0];
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  v |= (unsigned long long) addr[1] << 8;
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  v |= (unsigned long long) addr[2] << 16;
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  v |= (unsigned long long) addr[3] << 24;
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  v |= (unsigned long long) addr[4] << 32;
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  v |= (unsigned long long) addr[5] << 40;
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  v |= (unsigned long long) addr[6] << 48;
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  v |= (unsigned long long) addr[7] << 56;
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getl32 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0];
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  v |= (unsigned long) addr[1] << 8;
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  v |= (unsigned long) addr[2] << 16;
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  v |= (unsigned long) addr[3] << 24;
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getb32 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0] << 24;
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  v |= (unsigned long) addr[1] << 16;
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  v |= (unsigned long) addr[2] << 8;
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  v |= (unsigned long) addr[3];
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getl16 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0];
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  v |= (unsigned long) addr[1] << 8;
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  return (bfd_vma) v;
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}
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bfd_vma bfd_getb16 (const bfd_byte *addr)
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{
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  unsigned long v;
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  v = (unsigned long) addr[0] << 24;
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  v |= (unsigned long) addr[1] << 16;
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  return (bfd_vma) v;
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}
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static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
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                              const char *prefix)
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{
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    int i, n = info->buffer_length;
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    uint8_t *buf = g_malloc(n);
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    info->read_memory_func(pc, buf, n, info);
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    for (i = 0; i < n; ++i) {
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        if (i % 32 == 0) {
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            info->fprintf_func(info->stream, "\n%s: ", prefix);
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        }
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        info->fprintf_func(info->stream, "%02x", buf[i]);
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    }
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    g_free(buf);
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    return n;
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}
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static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
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{
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    return print_insn_objdump(pc, info, "OBJD-H");
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}
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static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
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{
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    return print_insn_objdump(pc, info, "OBJD-T");
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}
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#ifdef CONFIG_CAPSTONE
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/* Temporary storage for the capstone library.  This will be alloced via
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   malloc with a size private to the library; thus there's no reason not
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   to share this across calls and across host vs target disassembly.  */
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static __thread cs_insn *cap_insn;
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/* Initialize the Capstone library.  */
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/* ??? It would be nice to cache this.  We would need one handle for the
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   host and one for the target.  For most targets we can reset specific
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   parameters via cs_option(CS_OPT_MODE, new_mode), but we cannot change
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   CS_ARCH_* in this way.  Thus we would need to be able to close and
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   re-open the target handle with a different arch for the target in order
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   to handle AArch64 vs AArch32 mode switching.  */
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static cs_err cap_disas_start(disassemble_info *info, csh *handle)
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{
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    cs_mode cap_mode = info->cap_mode;
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    cs_err err;
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    cap_mode += (info->endian == BFD_ENDIAN_BIG ? CS_MODE_BIG_ENDIAN
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                 : CS_MODE_LITTLE_ENDIAN);
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    err = cs_open(info->cap_arch, cap_mode, handle);
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    if (err != CS_ERR_OK) {
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        return err;
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    }
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    /* ??? There probably ought to be a better place to put this.  */
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    if (info->cap_arch == CS_ARCH_X86) {
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        /* We don't care about errors (if for some reason the library
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           is compiled without AT&T syntax); the user will just have
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           to deal with the Intel syntax.  */
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        cs_option(*handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);
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    }
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    /* "Disassemble" unknown insns as ".byte W,X,Y,Z".  */
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    cs_option(*handle, CS_OPT_SKIPDATA, CS_OPT_ON);
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    /* Allocate temp space for cs_disasm_iter.  */
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    if (cap_insn == NULL) {
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        cap_insn = cs_malloc(*handle);
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        if (cap_insn == NULL) {
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            cs_close(handle);
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            return CS_ERR_MEM;
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        }
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    }
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    return CS_ERR_OK;
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}
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static void cap_dump_insn_units(disassemble_info *info, cs_insn *insn,
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                                int i, int n)
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{
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    fprintf_function print = info->fprintf_func;
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    FILE *stream = info->stream;
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    switch (info->cap_insn_unit) {
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    case 4:
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        if (info->endian == BFD_ENDIAN_BIG) {
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            for (; i < n; i += 4) {
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                print(stream, " %08x", ldl_be_p(insn->bytes + i));
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            }
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        } else {
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            for (; i < n; i += 4) {
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                print(stream, " %08x", ldl_le_p(insn->bytes + i));
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            }
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        }
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        break;
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    case 2:
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        if (info->endian == BFD_ENDIAN_BIG) {
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            for (; i < n; i += 2) {
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                print(stream, " %04x", lduw_be_p(insn->bytes + i));
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            }
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        } else {
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            for (; i < n; i += 2) {
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                print(stream, " %04x", lduw_le_p(insn->bytes + i));
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            }
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        }
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        break;
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    default:
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        for (; i < n; i++) {
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            print(stream, " %02x", insn->bytes[i]);
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        }
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        break;
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    }
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}
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static void cap_dump_insn(disassemble_info *info, cs_insn *insn)
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{
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    fprintf_function print = info->fprintf_func;
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    int i, n, split;
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    print(info->stream, "0x%08" PRIx64 ": ", insn->address);
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    n = insn->size;
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    split = info->cap_insn_split;
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    /* Dump the first SPLIT bytes of the instruction.  */
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    cap_dump_insn_units(info, insn, 0, MIN(n, split));
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    /* Add padding up to SPLIT so that mnemonics line up.  */
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    if (n < split) {
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        int width = (split - n) / info->cap_insn_unit;
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        width *= (2 * info->cap_insn_unit + 1);
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        print(info->stream, "%*s", width, "");
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    }
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    /* Print the actual instruction.  */
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    print(info->stream, "  %-8s %s\n", insn->mnemonic, insn->op_str);
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    /* Dump any remaining part of the insn on subsequent lines.  */
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    for (i = split; i < n; i += split) {
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        print(info->stream, "0x%08" PRIx64 ": ", insn->address + i);
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        cap_dump_insn_units(info, insn, i, MIN(n, i + split));
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        print(info->stream, "\n");
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    }
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}
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/* Disassemble SIZE bytes at PC for the target.  */
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static bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t size)
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{
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    uint8_t cap_buf[1024];
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    csh handle;
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    cs_insn *insn;
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    size_t csize = 0;
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    if (cap_disas_start(info, &handle) != CS_ERR_OK) {
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        return false;
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    }
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    insn = cap_insn;
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    while (1) {
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        size_t tsize = MIN(sizeof(cap_buf) - csize, size);
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        const uint8_t *cbuf = cap_buf;
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        target_read_memory(pc + csize, cap_buf + csize, tsize, info);
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        csize += tsize;
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        size -= tsize;
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        while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {
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           cap_dump_insn(info, insn);
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        }
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        /* If the target memory is not consumed, go back for more... */
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        if (size != 0) {
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            /* ... taking care to move any remaining fractional insn
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               to the beginning of the buffer.  */
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            if (csize != 0) {
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                memmove(cap_buf, cbuf, csize);
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            }
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            continue;
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        }
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        /* Since the target memory is consumed, we should not have
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           a remaining fractional insn.  */
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        if (csize != 0) {
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            (*info->fprintf_func)(info->stream,
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                "Disassembler disagrees with translator "
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                "over instruction decoding\n"
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                "Please report this to qemu-devel@nongnu.org\n");
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        }
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        break;
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    }
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    cs_close(&handle);
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    return true;
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}
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/* Disassemble SIZE bytes at CODE for the host.  */
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static bool cap_disas_host(disassemble_info *info, void *code, size_t size)
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{
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    csh handle;
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    const uint8_t *cbuf;
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    cs_insn *insn;
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    uint64_t pc;
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    if (cap_disas_start(info, &handle) != CS_ERR_OK) {
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        return false;
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    }
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    insn = cap_insn;
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    cbuf = code;
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    pc = (uintptr_t)code;
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    while (cs_disasm_iter(handle, &cbuf, &size, &pc, insn)) {
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       cap_dump_insn(info, insn);
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    }
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    if (size != 0) {
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        (*info->fprintf_func)(info->stream,
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            "Disassembler disagrees with TCG over instruction encoding\n"
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            "Please report this to qemu-devel@nongnu.org\n");
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    }
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    cs_close(&handle);
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    return true;
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}
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#if !defined(CONFIG_USER_ONLY)
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/* Disassemble COUNT insns at PC for the target.  */
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static bool cap_disas_monitor(disassemble_info *info, uint64_t pc, int count)
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{
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    uint8_t cap_buf[32];
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    csh handle;
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    cs_insn *insn;
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    size_t csize = 0;
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    if (cap_disas_start(info, &handle) != CS_ERR_OK) {
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        return false;
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    }
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    insn = cap_insn;
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    while (1) {
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        /* We want to read memory for one insn, but generically we do not
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           know how much memory that is.  We have a small buffer which is
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           known to be sufficient for all supported targets.  Try to not
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           read beyond the page, Just In Case.  For even more simplicity,
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           ignore the actual target page size and use a 1k boundary.  If
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           that turns out to be insufficient, we'll come back around the
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           loop and read more.  */
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        uint64_t epc = QEMU_ALIGN_UP(pc + csize + 1, 1024);
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        size_t tsize = MIN(sizeof(cap_buf) - csize, epc - pc);
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        const uint8_t *cbuf = cap_buf;
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        /* Make certain that we can make progress.  */
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        assert(tsize != 0);
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        info->read_memory_func(pc, cap_buf + csize, tsize, info);
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        csize += tsize;
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        if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {
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            cap_dump_insn(info, insn);
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            if (--count <= 0) {
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                break;
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            }
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        }
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        memmove(cap_buf, cbuf, csize);
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    }
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    cs_close(&handle);
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    return true;
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}
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#endif /* !CONFIG_USER_ONLY */
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#else
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# define cap_disas_target(i, p, s)  false
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# define cap_disas_host(i, p, s)  false
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# define cap_disas_monitor(i, p, c)  false
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#endif /* CONFIG_CAPSTONE */
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/* Disassemble this for me please... (debugging).  */
 | 
						|
void target_disas(FILE *out, CPUState *cpu, target_ulong code,
 | 
						|
                  target_ulong size)
 | 
						|
{
 | 
						|
    CPUClass *cc = CPU_GET_CLASS(cpu);
 | 
						|
    target_ulong pc;
 | 
						|
    int count;
 | 
						|
    CPUDebug s;
 | 
						|
 | 
						|
    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 | 
						|
 | 
						|
    s.cpu = cpu;
 | 
						|
    s.info.read_memory_func = target_read_memory;
 | 
						|
    s.info.buffer_vma = code;
 | 
						|
    s.info.buffer_length = size;
 | 
						|
    s.info.print_address_func = generic_print_address;
 | 
						|
    s.info.cap_arch = -1;
 | 
						|
    s.info.cap_mode = 0;
 | 
						|
    s.info.cap_insn_unit = 4;
 | 
						|
    s.info.cap_insn_split = 4;
 | 
						|
 | 
						|
#ifdef TARGET_WORDS_BIGENDIAN
 | 
						|
    s.info.endian = BFD_ENDIAN_BIG;
 | 
						|
#else
 | 
						|
    s.info.endian = BFD_ENDIAN_LITTLE;
 | 
						|
#endif
 | 
						|
 | 
						|
    if (cc->disas_set_info) {
 | 
						|
        cc->disas_set_info(cpu, &s.info);
 | 
						|
    }
 | 
						|
 | 
						|
    if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {
 | 
						|
        return;
 | 
						|
    }
 | 
						|
 | 
						|
    if (s.info.print_insn == NULL) {
 | 
						|
        s.info.print_insn = print_insn_od_target;
 | 
						|
    }
 | 
						|
 | 
						|
    for (pc = code; size > 0; pc += count, size -= count) {
 | 
						|
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
 | 
						|
	count = s.info.print_insn(pc, &s.info);
 | 
						|
	fprintf(out, "\n");
 | 
						|
	if (count < 0)
 | 
						|
	    break;
 | 
						|
        if (size < count) {
 | 
						|
            fprintf(out,
 | 
						|
                    "Disassembler disagrees with translator over instruction "
 | 
						|
                    "decoding\n"
 | 
						|
                    "Please report this to qemu-devel@nongnu.org\n");
 | 
						|
            break;
 | 
						|
        }
 | 
						|
    }
 | 
						|
}
 | 
						|
 | 
						|
/* Disassemble this for me please... (debugging). */
 | 
						|
void disas(FILE *out, void *code, unsigned long size)
 | 
						|
{
 | 
						|
    uintptr_t pc;
 | 
						|
    int count;
 | 
						|
    CPUDebug s;
 | 
						|
    int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
 | 
						|
 | 
						|
    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 | 
						|
    s.info.print_address_func = generic_print_host_address;
 | 
						|
 | 
						|
    s.info.buffer = code;
 | 
						|
    s.info.buffer_vma = (uintptr_t)code;
 | 
						|
    s.info.buffer_length = size;
 | 
						|
    s.info.cap_arch = -1;
 | 
						|
    s.info.cap_mode = 0;
 | 
						|
    s.info.cap_insn_unit = 4;
 | 
						|
    s.info.cap_insn_split = 4;
 | 
						|
 | 
						|
#ifdef HOST_WORDS_BIGENDIAN
 | 
						|
    s.info.endian = BFD_ENDIAN_BIG;
 | 
						|
#else
 | 
						|
    s.info.endian = BFD_ENDIAN_LITTLE;
 | 
						|
#endif
 | 
						|
#if defined(CONFIG_TCG_INTERPRETER)
 | 
						|
    print_insn = print_insn_tci;
 | 
						|
#elif defined(__i386__)
 | 
						|
    s.info.mach = bfd_mach_i386_i386;
 | 
						|
    print_insn = print_insn_i386;
 | 
						|
    s.info.cap_arch = CS_ARCH_X86;
 | 
						|
    s.info.cap_mode = CS_MODE_32;
 | 
						|
    s.info.cap_insn_unit = 1;
 | 
						|
    s.info.cap_insn_split = 8;
 | 
						|
#elif defined(__x86_64__)
 | 
						|
    s.info.mach = bfd_mach_x86_64;
 | 
						|
    print_insn = print_insn_i386;
 | 
						|
    s.info.cap_arch = CS_ARCH_X86;
 | 
						|
    s.info.cap_mode = CS_MODE_64;
 | 
						|
    s.info.cap_insn_unit = 1;
 | 
						|
    s.info.cap_insn_split = 8;
 | 
						|
#elif defined(_ARCH_PPC)
 | 
						|
    s.info.disassembler_options = (char *)"any";
 | 
						|
    print_insn = print_insn_ppc;
 | 
						|
    s.info.cap_arch = CS_ARCH_PPC;
 | 
						|
# ifdef _ARCH_PPC64
 | 
						|
    s.info.cap_mode = CS_MODE_64;
 | 
						|
# endif
 | 
						|
#elif defined(__riscv) && defined(CONFIG_RISCV_DIS)
 | 
						|
#if defined(_ILP32) || (__riscv_xlen == 32)
 | 
						|
    print_insn = print_insn_riscv32;
 | 
						|
#elif defined(_LP64)
 | 
						|
    print_insn = print_insn_riscv64;
 | 
						|
#else
 | 
						|
#error unsupported RISC-V ABI
 | 
						|
#endif
 | 
						|
#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
 | 
						|
    print_insn = print_insn_arm_a64;
 | 
						|
    s.info.cap_arch = CS_ARCH_ARM64;
 | 
						|
#elif defined(__alpha__)
 | 
						|
    print_insn = print_insn_alpha;
 | 
						|
#elif defined(__sparc__)
 | 
						|
    print_insn = print_insn_sparc;
 | 
						|
    s.info.mach = bfd_mach_sparc_v9b;
 | 
						|
#elif defined(__arm__)
 | 
						|
    print_insn = print_insn_arm;
 | 
						|
    s.info.cap_arch = CS_ARCH_ARM;
 | 
						|
    /* TCG only generates code for arm mode.  */
 | 
						|
#elif defined(__MIPSEB__)
 | 
						|
    print_insn = print_insn_big_mips;
 | 
						|
#elif defined(__MIPSEL__)
 | 
						|
    print_insn = print_insn_little_mips;
 | 
						|
#elif defined(__m68k__)
 | 
						|
    print_insn = print_insn_m68k;
 | 
						|
#elif defined(__s390__)
 | 
						|
    print_insn = print_insn_s390;
 | 
						|
#elif defined(__hppa__)
 | 
						|
    print_insn = print_insn_hppa;
 | 
						|
#endif
 | 
						|
 | 
						|
    if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {
 | 
						|
        return;
 | 
						|
    }
 | 
						|
 | 
						|
    if (print_insn == NULL) {
 | 
						|
        print_insn = print_insn_od_host;
 | 
						|
    }
 | 
						|
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
 | 
						|
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
 | 
						|
        count = print_insn(pc, &s.info);
 | 
						|
	fprintf(out, "\n");
 | 
						|
	if (count < 0)
 | 
						|
	    break;
 | 
						|
    }
 | 
						|
}
 | 
						|
 | 
						|
/* Look up symbol for debugging purpose.  Returns "" if unknown. */
 | 
						|
const char *lookup_symbol(target_ulong orig_addr)
 | 
						|
{
 | 
						|
    const char *symbol = "";
 | 
						|
    struct syminfo *s;
 | 
						|
 | 
						|
    for (s = syminfos; s; s = s->next) {
 | 
						|
        symbol = s->lookup_symbol(s, orig_addr);
 | 
						|
        if (symbol[0] != '\0') {
 | 
						|
            break;
 | 
						|
        }
 | 
						|
    }
 | 
						|
 | 
						|
    return symbol;
 | 
						|
}
 | 
						|
 | 
						|
#if !defined(CONFIG_USER_ONLY)
 | 
						|
 | 
						|
#include "monitor/monitor.h"
 | 
						|
 | 
						|
static int
 | 
						|
physical_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
 | 
						|
                     struct disassemble_info *info)
 | 
						|
{
 | 
						|
    CPUDebug *s = container_of(info, CPUDebug, info);
 | 
						|
 | 
						|
    address_space_read(s->cpu->as, memaddr, MEMTXATTRS_UNSPECIFIED,
 | 
						|
                       myaddr, length);
 | 
						|
    return 0;
 | 
						|
}
 | 
						|
 | 
						|
/* Disassembler for the monitor.  */
 | 
						|
void monitor_disas(Monitor *mon, CPUState *cpu,
 | 
						|
                   target_ulong pc, int nb_insn, int is_physical)
 | 
						|
{
 | 
						|
    CPUClass *cc = CPU_GET_CLASS(cpu);
 | 
						|
    int count, i;
 | 
						|
    CPUDebug s;
 | 
						|
 | 
						|
    INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
 | 
						|
 | 
						|
    s.cpu = cpu;
 | 
						|
    s.info.read_memory_func
 | 
						|
        = (is_physical ? physical_read_memory : target_read_memory);
 | 
						|
    s.info.print_address_func = generic_print_address;
 | 
						|
    s.info.buffer_vma = pc;
 | 
						|
    s.info.cap_arch = -1;
 | 
						|
    s.info.cap_mode = 0;
 | 
						|
    s.info.cap_insn_unit = 4;
 | 
						|
    s.info.cap_insn_split = 4;
 | 
						|
 | 
						|
#ifdef TARGET_WORDS_BIGENDIAN
 | 
						|
    s.info.endian = BFD_ENDIAN_BIG;
 | 
						|
#else
 | 
						|
    s.info.endian = BFD_ENDIAN_LITTLE;
 | 
						|
#endif
 | 
						|
 | 
						|
    if (cc->disas_set_info) {
 | 
						|
        cc->disas_set_info(cpu, &s.info);
 | 
						|
    }
 | 
						|
 | 
						|
    if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) {
 | 
						|
        return;
 | 
						|
    }
 | 
						|
 | 
						|
    if (!s.info.print_insn) {
 | 
						|
        monitor_printf(mon, "0x" TARGET_FMT_lx
 | 
						|
                       ": Asm output not supported on this arch\n", pc);
 | 
						|
        return;
 | 
						|
    }
 | 
						|
 | 
						|
    for(i = 0; i < nb_insn; i++) {
 | 
						|
	monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
 | 
						|
        count = s.info.print_insn(pc, &s.info);
 | 
						|
	monitor_printf(mon, "\n");
 | 
						|
	if (count < 0)
 | 
						|
	    break;
 | 
						|
        pc += count;
 | 
						|
    }
 | 
						|
}
 | 
						|
#endif
 |