g_new(T, n) is neater than g_malloc(sizeof(T) * n).  It's also safer,
for two reasons.  One, it catches multiplication overflowing size_t.
Two, it returns T * rather than void *, which lets the compiler catch
more type errors.
This commit only touches allocations with size arguments of the form
sizeof(T).
Patch created mechanically with:
    $ spatch --in-place --sp-file scripts/coccinelle/use-g_new-etc.cocci \
	     --macro-file scripts/cocci-macro-file.h FILES...
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20220315144156.1595462-4-armbru@redhat.com>
Reviewed-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
		
	
		
			
				
	
	
		
			299 lines
		
	
	
		
			8.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			299 lines
		
	
	
		
			8.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * QEMU paravirtual RDMA - QP implementation
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 *
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 * Copyright (C) 2018 Oracle
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 * Copyright (C) 2018 Red Hat Inc
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 *
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 * Authors:
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 *     Yuval Shaia <yuval.shaia@oracle.com>
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 *     Marcel Apfelbaum <marcel@redhat.com>
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 *
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 * This work is licensed under the terms of the GNU GPL, version 2 or later.
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 * See the COPYING file in the top-level directory.
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 *
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 */
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#include "qemu/osdep.h"
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#include "../rdma_utils.h"
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#include "../rdma_rm.h"
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#include "../rdma_backend.h"
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#include "trace.h"
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#include "pvrdma.h"
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#include "standard-headers/rdma/vmw_pvrdma-abi.h"
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#include "pvrdma_qp_ops.h"
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typedef struct CompHandlerCtx {
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    PVRDMADev *dev;
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    uint32_t cq_handle;
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    struct pvrdma_cqe cqe;
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} CompHandlerCtx;
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/* Send Queue WQE */
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typedef struct PvrdmaSqWqe {
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    struct pvrdma_sq_wqe_hdr hdr;
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    struct pvrdma_sge sge[];
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} PvrdmaSqWqe;
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/* Recv Queue WQE */
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typedef struct PvrdmaRqWqe {
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    struct pvrdma_rq_wqe_hdr hdr;
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    struct pvrdma_sge sge[];
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} PvrdmaRqWqe;
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/*
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 * 1. Put CQE on send CQ ring
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 * 2. Put CQ number on dsr completion ring
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 * 3. Interrupt host
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 */
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static int pvrdma_post_cqe(PVRDMADev *dev, uint32_t cq_handle,
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                           struct pvrdma_cqe *cqe, struct ibv_wc *wc)
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{
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    struct pvrdma_cqe *cqe1;
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    struct pvrdma_cqne *cqne;
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    PvrdmaRing *ring;
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    RdmaRmCQ *cq = rdma_rm_get_cq(&dev->rdma_dev_res, cq_handle);
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    if (unlikely(!cq)) {
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        return -EINVAL;
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    }
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    ring = (PvrdmaRing *)cq->opaque;
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    /* Step #1: Put CQE on CQ ring */
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    cqe1 = pvrdma_ring_next_elem_write(ring);
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    if (unlikely(!cqe1)) {
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        return -EINVAL;
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    }
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    memset(cqe1, 0, sizeof(*cqe1));
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    cqe1->wr_id = cqe->wr_id;
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    cqe1->qp = cqe->qp ? cqe->qp : wc->qp_num;
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    cqe1->opcode = cqe->opcode;
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    cqe1->status = wc->status;
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    cqe1->byte_len = wc->byte_len;
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    cqe1->src_qp = wc->src_qp;
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    cqe1->wc_flags = wc->wc_flags;
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    cqe1->vendor_err = wc->vendor_err;
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    trace_pvrdma_post_cqe(cq_handle, cq->notify, cqe1->wr_id, cqe1->qp,
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                          cqe1->opcode, cqe1->status, cqe1->byte_len,
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                          cqe1->src_qp, cqe1->wc_flags, cqe1->vendor_err);
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    pvrdma_ring_write_inc(ring);
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    /* Step #2: Put CQ number on dsr completion ring */
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    cqne = pvrdma_ring_next_elem_write(&dev->dsr_info.cq);
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    if (unlikely(!cqne)) {
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        return -EINVAL;
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    }
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    cqne->info = cq_handle;
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    pvrdma_ring_write_inc(&dev->dsr_info.cq);
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    if (cq->notify != CNT_CLEAR) {
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        if (cq->notify == CNT_ARM) {
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            cq->notify = CNT_CLEAR;
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        }
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        post_interrupt(dev, INTR_VEC_CMD_COMPLETION_Q);
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    }
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    return 0;
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}
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static void pvrdma_qp_ops_comp_handler(void *ctx, struct ibv_wc *wc)
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{
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    CompHandlerCtx *comp_ctx = (CompHandlerCtx *)ctx;
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    pvrdma_post_cqe(comp_ctx->dev, comp_ctx->cq_handle, &comp_ctx->cqe, wc);
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    g_free(ctx);
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}
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static void complete_with_error(uint32_t vendor_err, void *ctx)
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{
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    struct ibv_wc wc = {};
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    wc.status = IBV_WC_GENERAL_ERR;
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    wc.vendor_err = vendor_err;
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    pvrdma_qp_ops_comp_handler(ctx, &wc);
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}
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void pvrdma_qp_ops_fini(void)
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{
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    rdma_backend_unregister_comp_handler();
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}
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int pvrdma_qp_ops_init(void)
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{
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    rdma_backend_register_comp_handler(pvrdma_qp_ops_comp_handler);
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    return 0;
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}
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void pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle)
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{
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    RdmaRmQP *qp;
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    PvrdmaSqWqe *wqe;
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    PvrdmaRing *ring;
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    int sgid_idx;
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    union ibv_gid *sgid;
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    qp = rdma_rm_get_qp(&dev->rdma_dev_res, qp_handle);
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    if (unlikely(!qp)) {
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        return;
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    }
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    ring = (PvrdmaRing *)qp->opaque;
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    wqe = (struct PvrdmaSqWqe *)pvrdma_ring_next_elem_read(ring);
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    while (wqe) {
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        CompHandlerCtx *comp_ctx;
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        /* Prepare CQE */
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        comp_ctx = g_new(CompHandlerCtx, 1);
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        comp_ctx->dev = dev;
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        comp_ctx->cq_handle = qp->send_cq_handle;
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        comp_ctx->cqe.wr_id = wqe->hdr.wr_id;
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        comp_ctx->cqe.qp = qp_handle;
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        comp_ctx->cqe.opcode = IBV_WC_SEND;
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        sgid = rdma_rm_get_gid(&dev->rdma_dev_res, wqe->hdr.wr.ud.av.gid_index);
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        if (!sgid) {
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            rdma_error_report("Failed to get gid for idx %d",
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                              wqe->hdr.wr.ud.av.gid_index);
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            complete_with_error(VENDOR_ERR_INV_GID_IDX, comp_ctx);
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            continue;
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        }
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        sgid_idx = rdma_rm_get_backend_gid_index(&dev->rdma_dev_res,
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                                                 &dev->backend_dev,
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                                                 wqe->hdr.wr.ud.av.gid_index);
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        if (sgid_idx <= 0) {
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            rdma_error_report("Failed to get bk sgid_idx for sgid_idx %d",
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                              wqe->hdr.wr.ud.av.gid_index);
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            complete_with_error(VENDOR_ERR_INV_GID_IDX, comp_ctx);
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            continue;
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        }
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        if (wqe->hdr.num_sge > dev->dev_attr.max_sge) {
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            rdma_error_report("Invalid num_sge=%d (max %d)", wqe->hdr.num_sge,
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                              dev->dev_attr.max_sge);
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            complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx);
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            continue;
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        }
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        rdma_backend_post_send(&dev->backend_dev, &qp->backend_qp, qp->qp_type,
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                               (struct ibv_sge *)&wqe->sge[0], wqe->hdr.num_sge,
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                               sgid_idx, sgid,
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                               (union ibv_gid *)wqe->hdr.wr.ud.av.dgid,
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                               wqe->hdr.wr.ud.remote_qpn,
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                               wqe->hdr.wr.ud.remote_qkey, comp_ctx);
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        pvrdma_ring_read_inc(ring);
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        wqe = pvrdma_ring_next_elem_read(ring);
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    }
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}
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void pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle)
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{
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    RdmaRmQP *qp;
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    PvrdmaRqWqe *wqe;
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    PvrdmaRing *ring;
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    qp = rdma_rm_get_qp(&dev->rdma_dev_res, qp_handle);
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    if (unlikely(!qp)) {
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        return;
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    }
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    ring = &((PvrdmaRing *)qp->opaque)[1];
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    wqe = (struct PvrdmaRqWqe *)pvrdma_ring_next_elem_read(ring);
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    while (wqe) {
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        CompHandlerCtx *comp_ctx;
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        /* Prepare CQE */
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        comp_ctx = g_new(CompHandlerCtx, 1);
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        comp_ctx->dev = dev;
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        comp_ctx->cq_handle = qp->recv_cq_handle;
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        comp_ctx->cqe.wr_id = wqe->hdr.wr_id;
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        comp_ctx->cqe.qp = qp_handle;
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        comp_ctx->cqe.opcode = IBV_WC_RECV;
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        if (wqe->hdr.num_sge > dev->dev_attr.max_sge) {
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            rdma_error_report("Invalid num_sge=%d (max %d)", wqe->hdr.num_sge,
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                              dev->dev_attr.max_sge);
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            complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx);
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            continue;
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        }
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        rdma_backend_post_recv(&dev->backend_dev, &qp->backend_qp, qp->qp_type,
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                               (struct ibv_sge *)&wqe->sge[0], wqe->hdr.num_sge,
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                               comp_ctx);
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        pvrdma_ring_read_inc(ring);
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        wqe = pvrdma_ring_next_elem_read(ring);
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    }
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}
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void pvrdma_srq_recv(PVRDMADev *dev, uint32_t srq_handle)
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{
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    RdmaRmSRQ *srq;
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    PvrdmaRqWqe *wqe;
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    PvrdmaRing *ring;
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    srq = rdma_rm_get_srq(&dev->rdma_dev_res, srq_handle);
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    if (unlikely(!srq)) {
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        return;
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    }
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    ring = (PvrdmaRing *)srq->opaque;
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    wqe = (struct PvrdmaRqWqe *)pvrdma_ring_next_elem_read(ring);
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    while (wqe) {
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        CompHandlerCtx *comp_ctx;
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        /* Prepare CQE */
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        comp_ctx = g_new(CompHandlerCtx, 1);
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        comp_ctx->dev = dev;
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        comp_ctx->cq_handle = srq->recv_cq_handle;
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        comp_ctx->cqe.wr_id = wqe->hdr.wr_id;
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        comp_ctx->cqe.qp = 0;
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        comp_ctx->cqe.opcode = IBV_WC_RECV;
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        if (wqe->hdr.num_sge > dev->dev_attr.max_sge) {
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            rdma_error_report("Invalid num_sge=%d (max %d)", wqe->hdr.num_sge,
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                              dev->dev_attr.max_sge);
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            complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx);
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            continue;
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        }
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        rdma_backend_post_srq_recv(&dev->backend_dev, &srq->backend_srq,
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                                   (struct ibv_sge *)&wqe->sge[0],
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                                   wqe->hdr.num_sge,
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                                   comp_ctx);
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        pvrdma_ring_read_inc(ring);
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        wqe = pvrdma_ring_next_elem_read(ring);
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    }
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}
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void pvrdma_cq_poll(RdmaDeviceResources *dev_res, uint32_t cq_handle)
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{
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    RdmaRmCQ *cq;
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    cq = rdma_rm_get_cq(dev_res, cq_handle);
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    if (!cq) {
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        return;
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    }
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    rdma_backend_poll_cq(dev_res, &cq->backend_cq);
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}
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