Files
qemu/target/sparc
Richard Henderson 819f92ec3e target/sparc: Fix FMUL8x16
This instruction has f32 as source1, which alters the
decoding of the register number, which means we've been
passing the wrong data for odd register numbers.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-4-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
(cherry picked from commit 9157dccc7e)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-05-13 09:03:37 +03:00
..
2023-07-25 17:14:07 +03:00
2023-11-05 12:03:17 -08:00
2024-05-13 09:03:37 +03:00
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2024-05-13 09:03:37 +03:00