Cortex-M CPUs with MVE should advertise this fact to gdb, using the org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR register. Presence of this feature also tells gdb to create pseudo-registers Q0..Q7, so we do not need to tell gdb about them separately. Note that unless you have a very recent GDB that includes this fix: http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the individual fields of the VPR register as zero (but showing the whole thing as hex, eg with "print /x $vpr" will give the correct value). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
		
			
				
	
	
		
			20 lines
		
	
	
		
			768 B
		
	
	
	
		
			XML
		
	
	
	
	
	
			
		
		
	
	
			20 lines
		
	
	
		
			768 B
		
	
	
	
		
			XML
		
	
	
	
	
	
<?xml version="1.0"?>
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<!-- Copyright (C) 2021 Free Software Foundation, Inc.
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     Copying and distribution of this file, with or without modification,
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     are permitted in any medium without royalty provided the copyright
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     notice and this notice are preserved.  -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.arm.m-profile-mve">
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  <flags id="vpr_reg" size="4">
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    <!-- ARMv8.1-M and MVE: Unprivileged and privileged Access.  -->
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    <field name="P0" start="0" end="15"/>
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    <!-- ARMv8.1-M: Privileged Access only.  -->
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    <field name="MASK01" start="16" end="19"/>
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    <!-- ARMv8.1-M: Privileged Access only.  -->
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    <field name="MASK23" start="20" end="23"/>
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  </flags>
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  <reg name="vpr" bitsize="32" type="vpr_reg"/>
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</feature>
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