Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20220707163720.1421716-5-berrange@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
		
			
				
	
	
		
			196 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			196 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Hardware Clocks
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|  *
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|  * Copyright GreenSocs 2016-2020
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|  *
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|  * Authors:
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|  *  Frederic Konrad
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|  *  Damien Hedde
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|  *
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|  * This work is licensed under the terms of the GNU GPL, version 2 or later.
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|  * See the COPYING file in the top-level directory.
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "qemu/cutils.h"
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| #include "hw/clock.h"
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| #include "trace.h"
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| 
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| #define CLOCK_PATH(_clk) (_clk->canonical_path)
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| 
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| void clock_setup_canonical_path(Clock *clk)
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| {
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|     g_free(clk->canonical_path);
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|     clk->canonical_path = object_get_canonical_path(OBJECT(clk));
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| }
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| 
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| Clock *clock_new(Object *parent, const char *name)
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| {
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|     Object *obj;
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|     Clock *clk;
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| 
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|     obj = object_new(TYPE_CLOCK);
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|     object_property_add_child(parent, name, obj);
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|     object_unref(obj);
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| 
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|     clk = CLOCK(obj);
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|     clock_setup_canonical_path(clk);
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| 
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|     return clk;
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| }
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| 
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| void clock_set_callback(Clock *clk, ClockCallback *cb, void *opaque,
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|                         unsigned int events)
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| {
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|     clk->callback = cb;
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|     clk->callback_opaque = opaque;
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|     clk->callback_events = events;
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| }
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| 
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| void clock_clear_callback(Clock *clk)
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| {
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|     clock_set_callback(clk, NULL, NULL, 0);
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| }
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| 
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| bool clock_set(Clock *clk, uint64_t period)
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| {
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|     if (clk->period == period) {
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|         return false;
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|     }
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|     trace_clock_set(CLOCK_PATH(clk), CLOCK_PERIOD_TO_HZ(clk->period),
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|                     CLOCK_PERIOD_TO_HZ(period));
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|     clk->period = period;
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| 
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|     return true;
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| }
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| 
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| static uint64_t clock_get_child_period(Clock *clk)
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| {
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|     /*
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|      * Return the period to be used for child clocks, which is the parent
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|      * clock period adjusted for multiplier and divider effects.
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|      */
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|     return muldiv64(clk->period, clk->multiplier, clk->divider);
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| }
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| 
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| static void clock_call_callback(Clock *clk, ClockEvent event)
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| {
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|     /*
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|      * Call the Clock's callback for this event, if it has one and
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|      * is interested in this event.
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|      */
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|     if (clk->callback && (clk->callback_events & event)) {
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|         clk->callback(clk->callback_opaque, event);
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|     }
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| }
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| 
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| static void clock_propagate_period(Clock *clk, bool call_callbacks)
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| {
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|     Clock *child;
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|     uint64_t child_period = clock_get_child_period(clk);
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| 
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|     QLIST_FOREACH(child, &clk->children, sibling) {
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|         if (child->period != child_period) {
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|             if (call_callbacks) {
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|                 clock_call_callback(child, ClockPreUpdate);
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|             }
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|             child->period = child_period;
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|             trace_clock_update(CLOCK_PATH(child), CLOCK_PATH(clk),
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|                                CLOCK_PERIOD_TO_HZ(child->period),
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|                                call_callbacks);
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|             if (call_callbacks) {
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|                 clock_call_callback(child, ClockUpdate);
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|             }
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|             clock_propagate_period(child, call_callbacks);
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|         }
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|     }
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| }
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| 
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| void clock_propagate(Clock *clk)
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| {
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|     assert(clk->source == NULL);
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|     trace_clock_propagate(CLOCK_PATH(clk));
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|     clock_propagate_period(clk, true);
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| }
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| 
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| void clock_set_source(Clock *clk, Clock *src)
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| {
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|     /* changing clock source is not supported */
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|     assert(!clk->source);
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| 
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|     trace_clock_set_source(CLOCK_PATH(clk), CLOCK_PATH(src));
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| 
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|     clk->period = clock_get_child_period(src);
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|     QLIST_INSERT_HEAD(&src->children, clk, sibling);
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|     clk->source = src;
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|     clock_propagate_period(clk, false);
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| }
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| 
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| static void clock_disconnect(Clock *clk)
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| {
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|     if (clk->source == NULL) {
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|         return;
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|     }
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| 
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|     trace_clock_disconnect(CLOCK_PATH(clk));
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| 
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|     clk->source = NULL;
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|     QLIST_REMOVE(clk, sibling);
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| }
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| 
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| char *clock_display_freq(Clock *clk)
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| {
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|     return freq_to_str(clock_get_hz(clk));
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| }
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| 
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| void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider)
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| {
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|     assert(divider != 0);
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| 
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|     trace_clock_set_mul_div(CLOCK_PATH(clk), clk->multiplier, multiplier,
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|                             clk->divider, divider);
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|     clk->multiplier = multiplier;
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|     clk->divider = divider;
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| }
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| 
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| static void clock_initfn(Object *obj)
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| {
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|     Clock *clk = CLOCK(obj);
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| 
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|     clk->multiplier = 1;
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|     clk->divider = 1;
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| 
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|     QLIST_INIT(&clk->children);
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| }
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| 
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| static void clock_finalizefn(Object *obj)
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| {
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|     Clock *clk = CLOCK(obj);
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|     Clock *child, *next;
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| 
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|     /* clear our list of children */
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|     QLIST_FOREACH_SAFE(child, &clk->children, sibling, next) {
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|         clock_disconnect(child);
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|     }
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| 
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|     /* remove us from source's children list */
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|     clock_disconnect(clk);
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| 
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|     g_free(clk->canonical_path);
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| }
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| 
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| static const TypeInfo clock_info = {
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|     .name              = TYPE_CLOCK,
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|     .parent            = TYPE_OBJECT,
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|     .instance_size     = sizeof(Clock),
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|     .instance_init     = clock_initfn,
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|     .instance_finalize = clock_finalizefn,
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| };
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| 
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| static void clock_register_types(void)
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| {
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|     type_register_static(&clock_info);
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| }
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| 
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| type_init(clock_register_types)
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