Richard Henderson
157f75435e
Merge remote-tracking branch 'remotes/philmd/tags/mips-20211102' into staging
MIPS patches queue
- Fine-grained MAINTAINERS sections
- Fix MSA MADDV.B / MSUBV.B opcodes
- Convert MSA opcodes to decodetree
- Correct Loongson-3A4000 MSAIR register
- Do not accept ELF nanoMIPS binaries on linux-user
- Use ISA instead of PCI interrupts in VT82C686 PCI device
# gpg: Signature made Tue 02 Nov 2021 09:41:04 AM EDT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* remotes/philmd/tags/mips-20211102: (41 commits)
Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too"
hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts
usb/uhci: Replace pci_set_irq with qemu_set_irq
usb/uhci: Disallow user creating a vt82c686-uhci-pci device
usb/uhci: Misc clean up
target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU
target/mips: Fix Loongson-3A4000 MSAIR config register
target/mips: Remove one MSA unnecessary decodetree overlap group
target/mips: Remove generic MSA opcode
target/mips: Convert CTCMSA opcode to decodetree
target/mips: Convert CFCMSA opcode to decodetree
target/mips: Convert MSA MOVE.V opcode to decodetree
target/mips: Convert MSA COPY_S and INSERT opcodes to decodetree
target/mips: Convert MSA COPY_U opcode to decodetree
target/mips: Convert MSA ELM instruction format to decodetree
target/mips: Convert MSA 3R instruction format to decodetree (part 4/4)
target/mips: Convert MSA 3R instruction format to decodetree (part 3/4)
target/mips: Convert MSA 3R instruction format to decodetree (part 2/4)
target/mips: Convert MSA 3R instruction format to decodetree (part 1/4)
target/mips: Convert MSA 3RF instruction format to decodetree (DF_WORD)
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02 15:12:11 -04:00
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