650d103d3e
In my "build everything" tree, changing hw/hw.h triggers a recompile of some 2600 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). The previous commits have left only the declaration of hw_error() in hw/hw.h. This permits dropping most of its inclusions. Touching it now recompiles less than 200 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-19-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
111 lines
3.1 KiB
C
111 lines
3.1 KiB
C
/*
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* TI OMAP2 32kHz sync timer emulation.
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*
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* Copyright (C) 2007-2008 Nokia Corporation
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) any later version of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/timer.h"
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#include "hw/arm/omap.h"
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struct omap_synctimer_s {
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MemoryRegion iomem;
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uint32_t val;
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uint16_t readh;
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};
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/* 32-kHz Sync Timer of the OMAP2 */
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static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
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return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 0x8000,
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NANOSECONDS_PER_SECOND);
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}
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void omap_synctimer_reset(struct omap_synctimer_s *s)
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{
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s->val = omap_synctimer_read(s);
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}
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static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
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{
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struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
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switch (addr) {
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case 0x00: /* 32KSYNCNT_REV */
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return 0x21;
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case 0x10: /* CR */
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return omap_synctimer_read(s) - s->val;
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}
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OMAP_BAD_REG(addr);
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return 0;
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}
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static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
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{
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struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
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uint32_t ret;
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if (addr & 2)
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return s->readh;
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else {
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ret = omap_synctimer_readw(opaque, addr);
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s->readh = ret >> 16;
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return ret & 0xffff;
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}
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}
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static uint64_t omap_synctimer_readfn(void *opaque, hwaddr addr,
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unsigned size)
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{
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switch (size) {
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case 1:
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return omap_badwidth_read32(opaque, addr);
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case 2:
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return omap_synctimer_readh(opaque, addr);
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case 4:
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return omap_synctimer_readw(opaque, addr);
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default:
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g_assert_not_reached();
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}
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}
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static void omap_synctimer_writefn(void *opaque, hwaddr addr,
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uint64_t value, unsigned size)
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{
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OMAP_BAD_REG(addr);
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}
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static const MemoryRegionOps omap_synctimer_ops = {
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.read = omap_synctimer_readfn,
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.write = omap_synctimer_writefn,
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.valid.min_access_size = 1,
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.valid.max_access_size = 4,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
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struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
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{
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struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
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omap_synctimer_reset(s);
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memory_region_init_io(&s->iomem, NULL, &omap_synctimer_ops, s, "omap.synctimer",
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omap_l4_region_size(ta, 0));
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omap_l4_attach(ta, 0, &s->iomem);
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return s;
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}
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