forked from pool/gcc15
46 lines
1.5 KiB
Diff
46 lines
1.5 KiB
Diff
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From 2ef1a37e7823b21eda524972c006e0e8c26f97b3 Mon Sep 17 00:00:00 2001
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From: Andrew Stubbs <ams@baylibre.com>
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Date: Thu, 20 Mar 2025 09:32:31 +0000
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Subject: [PATCH] Fix GCN SIMD libm bug
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Since January, GCC has been miscompiling Newlib libm on AMD GCN due to
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undefined behaviour in the RESIZE_VECTOR macro. It was "working" but expanding
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the size of a vector would no longer zero the additional lanes, as it expected.
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See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119325
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---
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newlib/libm/machine/amdgcn/amdgcn_veclib.h | 17 +++++++++++++++--
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1 file changed, 15 insertions(+), 2 deletions(-)
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diff --git a/newlib/libm/machine/amdgcn/amdgcn_veclib.h b/newlib/libm/machine/amdgcn/amdgcn_veclib.h
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index bd67740ac..9e9d3ebf0 100644
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--- a/newlib/libm/machine/amdgcn/amdgcn_veclib.h
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+++ b/newlib/libm/machine/amdgcn/amdgcn_veclib.h
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@@ -85,8 +85,21 @@ typedef union {
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#define RESIZE_VECTOR(to_t, from) \
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({ \
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- __auto_type __from = (from); \
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- *((to_t *) &__from); \
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+ to_t __to; \
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+ if (VECTOR_WIDTH (to_t) < VECTOR_WIDTH (__typeof (from))) \
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+ asm ("; no-op cast %0" : "=v"(__to) : "0"(from)); \
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+ else \
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+ { \
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+ unsigned long __mask = -1L; \
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+ int lanes = VECTOR_WIDTH (__typeof (from)); \
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+ __mask <<= lanes; \
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+ __builtin_choose_expr ( \
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+ V_SF_SI_P (to_t), \
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+ ({asm ("v_mov_b32 %0, 0" : "=v"(__to) : "0"(from), "e"(__mask));}), \
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+ ({asm ("v_mov_b32 %H0, 0\n\t" \
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+ "v_mov_b32 %L0, 0" : "=v"(__to) : "0"(from), "e"(__mask));})); \
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+ } \
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+ __to; \
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})
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/* Bit-wise cast vector FROM to type TO_T. */
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--
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2.43.0
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