2021-11-15 23:43:17 +01:00
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-------------------------------------------------------------------
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Mon Nov 15 22:04:30 UTC 2021 - Andreas Stieger <andreas.stieger@gmx.de>
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- update to 20211114:
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* Many updated and added identified CPU models and variants
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* Updated hypervisor support
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2020-10-08 10:46:45 +02:00
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-------------------------------------------------------------------
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Thu Oct 8 08:19:24 UTC 2020 - Josef Möllers <josef.moellers@suse.com>
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- Update to 20201006:
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Added "Sapphire Rapids", "Golden Cove", "Rocket Lake", "Cato",
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14nm "Zen", "Tiger Lake-U B0", "Elkhart Lake B0", "Alder Lake",
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"Comet Lake", "Picasso A1", "Renoir A1", "Zhaoxin KaiXian KX-6000",
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as well as some additional decoding of supported features.
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[cpuid-20201006.src.tar.gz, jsc#sle-13189]
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2020-04-29 00:14:17 +02:00
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-------------------------------------------------------------------
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Tue Apr 28 18:54:25 UTC 2020 - Andreas Stieger <andreas.stieger@gmx.de>
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- update to 20200427:
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* Add synth decoding for AMD Steppe Eagle/Crowned Eagle
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(Puma 2014 G-Series), based on instlatx64 sample
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* Add 7/0/edx SERIALIZE & TSXLDTRK bit descriptions
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* Add 0xf/1/eax Counter width & overflow flag
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* Add 0x10/3/ecx per-thread MBA controls flag
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* Add 0x8000001f fields
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* Add AMD 24594 & 40332 docs
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* Correct field lengths in 14/0 and 14/1 subleafs so that
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columns line up
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* Add CC150 (Coffee Lake R0) synth decoding, based on
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instlatx64 example
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* Add Jasper Lake A0 stepping (from Coreboot*)
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* Update 1/ebx "cpu count" to modern terminology: "maximum
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addressible IDs for CPUs in pkg" to avoid user confusion
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* Update 4/eax CPU & core count terminology in the same way
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2020-03-06 09:31:52 +01:00
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-------------------------------------------------------------------
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Fri Mar 6 08:24:45 UTC 2020 - Jan Engelhardt <jengelh@inai.de>
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- Update to release 20200211
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* Zhaoxin decoding
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* Name enhancements for models from AMD, VIA, Intel, NSC
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* Added SEV cpuid bit.
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2018-05-20 01:51:13 +02:00
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-------------------------------------------------------------------
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2020-01-17 14:18:19 +01:00
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Fri Jan 17 13:06:18 UTC 2020 - Josef Möllers <josef.moellers@suse.com>
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- Upgrade to release 20200116
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many changes in Changelog: many new flags added.
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Also added support for Cyrix MediaGX, Matisse B0 stepping,
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Hygon CPUs.
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[cpuid-20200116.src.tar.gz]
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-------------------------------------------------------------------
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2018-05-20 01:51:13 +02:00
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Sat May 19 23:47:56 UTC 2018 - jengelh@inai.de
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- Update to new upstream release 20180519
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* Added 7/ecx bit 7: CET_SS and 7/edx bit 20: CET_IBT fields.
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* Added 7/ecx bit 16: 5-level paging.
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* Improved 14/0/ecx descriptions.
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* Added hypervisor leaf descriptions from Microsoft's
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Hypervisor Top Level Functional Specification (Released
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Version 5.0b).
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* Added CPUID features documented in PPR for AMD Family 17h
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Model 01h B1 (54945 Rev 1.14):
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* Added PCOMMIT to 7/ebx: PCOMMIT instruction (a deprecated
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instruction).
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* Added bits to 80000001/ecx (amd).
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* Added bits to 80000007/edx, 8000000a/edx, 8000001a/eax,
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8000001b/eax.
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* Added 80000007/ebx, 80000007/ecx, 80000008/ebx.
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* Added tentative 8000001f descriptions.
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2018-04-20 09:52:31 +02:00
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-------------------------------------------------------------------
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Fri Apr 20 06:33:28 UTC 2018 - josef.moellers@suse.com
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- Update to new upstream release 20180419
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2018-04-20 09:53:27 +02:00
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* Added synth decoding for AMD Zen, Pentium Silver (Gemini
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Lake), Xeon Scalable (Bronze, Silver, Gold, Platinium)
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(Skylake), Core X-Series (Skylake-X), Bay Trail D0, Bay Trail
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A0, Xeon E7-4800/8800 (Broadwell-EX B0), Xeon D-1500N
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(Broadwell-DE A1), Bay Trail-I (E3800), Avoton C0 stepping.
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2018-04-20 09:52:31 +02:00
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* Corrected synth decoding for Bay Trail-M C0 steppings.
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2018-04-20 09:53:27 +02:00
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* Added new Intel 1b leaf from Intel Architecture.
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* Added various bit fields.
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2018-04-20 09:52:31 +02:00
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2017-01-23 10:59:28 +01:00
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-------------------------------------------------------------------
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Mon Jan 23 09:54:56 UTC 2017 - jengelh@inai.de
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- Update to new upstream release 20170122
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* Added synth decoding for Intel Knights Landing B0.
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* Added new synth decodings for Intel Kaby Lake.
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* Fixed synth decodings for AMD Steamroller and Jaguar.
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* Added synth decodings for AMD Puma and Excavator.
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* For (6,15),(0,2) Piledriver processors, detect FX series and
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report it as Vishera instead of Abu Dhabi/Seoul/Delhi.
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* Added general microarchitecure names for AMD (e.g.
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Piledriver) in addition to specific core names (e.g. Trinity)
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for later generation processors. If I have trouble
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remembering these, it seems likely other people do too.
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* Added synth decoding for Quark X1000.
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* Added Intel Atom Z2760 (Clover Trail).
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* Added extra synth decodings for some Ivy Bridge and Sandy
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Bridge processors.
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2016-12-02 10:23:47 +01:00
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-------------------------------------------------------------------
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Fri Dec 2 08:55:37 UTC 2016 - jengelh@inai.de
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- Update to new upstream release 20161201
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* Fixed bugs in the subleaf walks for 0x8000001d (AMD cache
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information) and 0x40000003 (Xen hypervisor information) because
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the code for them was under wholly the wrong loops.
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2016-11-15 09:45:05 +01:00
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-------------------------------------------------------------------
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Tue Nov 15 08:43:11 UTC 2016 - jengelh@inai.de
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- Update to new upstream release 20161114
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* cpuid.c: Added -l/--leaf and -s/--subleaf options to cause
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cpuid to dump just the specified leaf and subleaf. If
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-s/--subleaf is not specified, it is assumed to be 0. The
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intended purpose for this is to display raw dumps of
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not-yet-supported leaves.
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* cpuid.c: Added AVX512DQ, AVX512IFMA, AVX512BW, AVX512VL, and
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CLWB decoding to 7/ebx.
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* cpuid.c: Added AVX512VBMI to 7/ecx.
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* cpuid.c: Added print_f_0_edx to show L3 cache QoS monitoring
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support.
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* cpuid.c: Added total & local bandwidth monitoring to 0xf/1/edx.
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* cpuid.c: Added 0x15/ecx nominal core crystal clock decoding.
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* cpuid.c: In print_17_0_ebx, corrected reversed scheme
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encodings.
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* cpuid.c: Added synth decoding for Xeon D-1500 (Broadwell-DE) Y0
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stepping.
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* cpuid.c: Added synth decoding comment about Braswell D1
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stepping, but its stepping number is not documented.
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* cpuid.c: Added synth decoding for (0,6),(8,14) Kaby Lake
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processors.
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* cpuid.c: Added synth decoding for Apollo Lake processors.
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* cpuid.c: Added vague synth decoding for (0,6),(9,14) Kaby Lake
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processors.
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* cpuid.c: Add AVX512_4VNNIW & AVX512_4FMAPS flags.
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* cpuid.c: Add Knights Mill (KNM) CPUID.
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2016-08-30 11:09:03 +02:00
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-------------------------------------------------------------------
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Tue Aug 30 08:57:28 UTC 2016 - jengelh@inai.de
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- Update to new upstream release 20160814
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2016-08-30 11:13:35 +02:00
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* cpuinfo2cpuid: Added a script that takes input from a
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/proc/cpuinfo file and converts it into suitable input to
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cpuid. The information that cpuid is capable of producing based
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on this very limited input information is slight, but
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apparently there is interest in getting the synthesized (synth)
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leaf from this.
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2016-08-30 11:09:03 +02:00
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* Support SGX, MPX, BNDLDX/BNDSTX, RDPID, and IA32_XSS PT state.
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* Add information for Skylake, Broadwell, Broadwell-E and -EX
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processors, Atom C2000 (Avoton) with A0/A1 steppings, Atom
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Z3n00 (Bay Trail) stepping 1, Xeon D-1500 (Broadwell-DE) V2
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stepping, corrected Atom Z8000 (Cherry Trail), added Atom S1200
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(Centerton) and VIA Eden.
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2015-11-07 12:42:49 +01:00
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-------------------------------------------------------------------
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Sat Nov 7 11:37:43 UTC 2015 - jengelh@inai.de
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- Update to new upstream release 20151017
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* Updated synth decoding for Broadwell processors.
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* Added 0xd leaf field.
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* Updated and expanded 0x14 leaf fields.
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* Added synth decoding for Intel Xeon E7 v2 (Ivy Bridge-EX).
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* Added synth decoding for Intel Core i5/i7 (Skylake).
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* Decode new leaf 2 cache descriptors: 6a, 6b, 6c, 6d.
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* added synth decoding for Knights Landing.
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* Added new & missing decodings for: 4/ecx, 6/eax, 7/ebx, 7/ecx.
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* Renamed 0xf leaves to include "Monitoring".
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* Added 0x10 leaves for QoS Enforcement.
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* Added new leaf 2 cache meanings: 0x1d, 0x24, 0xa0, 0xc3.
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* Added missing i7 synth decoding for (0,6),(3,14).
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* Corrected Atom Z3000 model & stepping which were bafflingly
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wrong: (0,6)(3,5),1 -> (0,6)(3,7),8.
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* Corrected other Bay Trail stepping names for Celeron/Pentium
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N and J series.
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* Added synth decoding for Intel Xeon Phi (Knights Corner).
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* Added synth decoding for Intel Atom C2000 (Avoton).
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* Added synth decoding for Intel Xeon E5-x600 (Haswell-EP).
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* Added synth decoding for Intel Xeon E5-[48]800 (Haswell-EP).
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* Added synth decoding for Intel Core M (Broadwell-Y).
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* Added synth decoding for Intel Xeon D-1500 (Broadwell-DE).
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* Added synth decoding for Intel i7-5000 Extreme (Haswell R2).
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* Added synth decoding for Intel Atom Z8000 (Cherry Trail).
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* Added synth decoding for Intel Pentium/Celeron N3000
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2015-07-09 08:55:11 +02:00
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-------------------------------------------------------------------
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Tue Jun 9 16:25:47 UTC 2015 - jengelh@inai.de
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- Update to new upstream release 20150606
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* Support for several leaf updates, including information on
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XSAVEC, XGETBV, and XSAVES/XRSTORS instructions. Decoding for
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more Haswell processors, Broadwell, Cherry Trail, and Avoton.
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- %doc is already implicit for manpages
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2013-11-26 17:12:13 +01:00
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-------------------------------------------------------------------
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Mon Aug 12 10:33:26 UTC 2013 - jengelh@inai.de
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- Update to new upstream release 20130610
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* Add lost Opteron 3200 strings
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2013-06-11 16:42:58 +02:00
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-------------------------------------------------------------------
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Mon Jun 10 14:01:53 UTC 2013 - jengelh@inai.de
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- Update to new upstream release 20130609
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* support for many new CPU types
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- Wrap description at 70 cols; remove redundant %clean section
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2011-06-02 00:07:39 +02:00
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-------------------------------------------------------------------
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Wed Jun 1 22:05:31 UTC 2011 - pascal.bleser@opensuse.org
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- update to 20110305
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- moved to utilities
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-------------------------------------------------------------------
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Sat Dec 22 00:00:00 UTC 2007 - guru@unixtech.be
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- moved to openSUSE Build Service
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-------------------------------------------------------------------
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Mon Sep 18 00:00:00 UTC 2006 - guru@unixtech.be
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- new upstream version
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-------------------------------------------------------------------
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Wed Aug 23 00:00:00 UTC 2006 - guru@unixtech.be
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- new upstream version
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-------------------------------------------------------------------
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Tue Aug 8 00:00:00 UTC 2006 - guru@unixtech.be
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- new upstream version
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-------------------------------------------------------------------
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Mon Jul 31 00:00:00 UTC 2006 - guru@unixtech.be
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- added binary stripping on SUSE < 9.3
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- removed Packager and Distribution, injected by rpmmacros
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- new upstream version
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-------------------------------------------------------------------
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Mon Apr 3 00:00:00 UTC 2006 - guru@unixtech.be
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- new package
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