From dcfb060635f8b704c5da59c4cd9415f13e5bd931746f1b056e1949c359f76144 Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Mon, 5 Dec 2022 10:16:52 +0000 Subject: [PATCH 1/2] Accepting request 1040204 from home:vlefebvre:branches:utilities - Update to release 20221201 * Clarified synth decoding for Intel Xeon D-1700. * Added uarch & synth decoding for AMD 4800S Desktop Kit, based on instlatx64 sample. * Added uarch decoding for AMD Genoa A1, based on instlatx64 sample * Added uarch decoding for (0,6),(12,15) Emerald Rapids, from LX*. * Added synth & uarch decoding for (10,15),(10,1) Bergamo. * Added 0x8000000a/edx bits: ROGPT, VNMI, IBS virtualization. * Added 0x8000001b/eax bit: IBS L3 miss filtering support. * Added 0x8000001f/eax bits: RMPQUERY instruction support, VMPL supervisor shadow stack support, VMGEXIT parameter support, virtual TOM MSR support, IBS virtual support for SEV-ES guests, SMT protection support, SVSM communication page MSR support, VIRT_RMPUPDATE & VIRT_PSMASH MSR support. * Added 0x80000020/0/ecx bit: L3 range reservation support. * Added 0x80000021/eax bits: automatic IBRS, CPUID disable for non-privileged. * Added 0x80000022/eax bit: AMD LBR & PMC freezing. * Added 0x80000022/ebx field: number of LBR stack entries. * Added 0x80000023 leaf: Multi-Key Encrypted Memory Capabilities. * Added 0x80000026 leaf: AMD Extended CPU Topology. * cpuid.c: use lseek64 and cpuset_setaffinity, Added 0x80000022/eax AMD LBR V2 flag, from LX*. OBS-URL: https://build.opensuse.org/request/show/1040204 OBS-URL: https://build.opensuse.org/package/show/utilities/cpuid?expand=0&rev=40 --- cpuid-20221003.src.tar.gz | 3 --- cpuid-20221201.src.tar.gz | 3 +++ cpuid.changes | 27 +++++++++++++++++++++++++++ cpuid.spec | 2 +- 4 files changed, 31 insertions(+), 4 deletions(-) delete mode 100644 cpuid-20221003.src.tar.gz create mode 100644 cpuid-20221201.src.tar.gz diff --git a/cpuid-20221003.src.tar.gz b/cpuid-20221003.src.tar.gz deleted file mode 100644 index 449c90a..0000000 --- a/cpuid-20221003.src.tar.gz +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:63c4c5c06b5682582ba2eec96eea26d7832782a789592bb95c4e4fd6270a8307 -size 138457 diff --git a/cpuid-20221201.src.tar.gz b/cpuid-20221201.src.tar.gz new file mode 100644 index 0000000..9496df9 --- /dev/null +++ b/cpuid-20221201.src.tar.gz @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:08fedc382810667a9d0a417d2975de3ab5d81573452cff57b2deab06d82f8f6e +size 140185 diff --git a/cpuid.changes b/cpuid.changes index 8a08ad3..be8fc71 100644 --- a/cpuid.changes +++ b/cpuid.changes @@ -1,3 +1,30 @@ +------------------------------------------------------------------- +Mon Dec 05 09:50:12 UTC 2022 - Valentin Lefebvre + +- Update to release 20221201 + * Clarified synth decoding for Intel Xeon D-1700. + * Added uarch & synth decoding for AMD 4800S Desktop Kit, based on + instlatx64 sample. + * Added uarch decoding for AMD Genoa A1, based on instlatx64 sample + * Added uarch decoding for (0,6),(12,15) Emerald Rapids, from LX*. + * Added synth & uarch decoding for (10,15),(10,1) Bergamo. + * Added 0x8000000a/edx bits: ROGPT, VNMI, IBS virtualization. + * Added 0x8000001b/eax bit: IBS L3 miss filtering support. + * Added 0x8000001f/eax bits: RMPQUERY instruction support, + VMPL supervisor shadow stack support, VMGEXIT parameter support, + virtual TOM MSR support, IBS virtual support for SEV-ES guests, + SMT protection support, SVSM communication page MSR support, + VIRT_RMPUPDATE & VIRT_PSMASH MSR support. + * Added 0x80000020/0/ecx bit: L3 range reservation support. + * Added 0x80000021/eax bits: automatic IBRS, + CPUID disable for non-privileged. + * Added 0x80000022/eax bit: AMD LBR & PMC freezing. + * Added 0x80000022/ebx field: number of LBR stack entries. + * Added 0x80000023 leaf: Multi-Key Encrypted Memory Capabilities. + * Added 0x80000026 leaf: AMD Extended CPU Topology. + * cpuid.c: use lseek64 and cpuset_setaffinity, Added 0x80000022/eax + AMD LBR V2 flag, from LX*. + ------------------------------------------------------------------- Thu Oct 13 14:05:28 UTC 2022 - Valentin Lefebvre diff --git a/cpuid.spec b/cpuid.spec index 120f96b..75483c7 100644 --- a/cpuid.spec +++ b/cpuid.spec @@ -17,7 +17,7 @@ Name: cpuid -Version: 20221003 +Version: 20221201 Release: 0 Summary: x86 CPU identification tool License: GPL-2.0-or-later From 5ced435390c31224a1802e7a980f718a14ed80ec6646660343a88f89fa67e665 Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Mon, 5 Dec 2022 10:17:16 +0000 Subject: [PATCH 2/2] stick to required changelog syntax OBS-URL: https://build.opensuse.org/package/show/utilities/cpuid?expand=0&rev=41 --- cpuid.changes | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/cpuid.changes b/cpuid.changes index be8fc71..2779971 100644 --- a/cpuid.changes +++ b/cpuid.changes @@ -8,21 +8,21 @@ Mon Dec 05 09:50:12 UTC 2022 - Valentin Lefebvre * Added uarch decoding for AMD Genoa A1, based on instlatx64 sample * Added uarch decoding for (0,6),(12,15) Emerald Rapids, from LX*. * Added synth & uarch decoding for (10,15),(10,1) Bergamo. - * Added 0x8000000a/edx bits: ROGPT, VNMI, IBS virtualization. - * Added 0x8000001b/eax bit: IBS L3 miss filtering support. - * Added 0x8000001f/eax bits: RMPQUERY instruction support, - VMPL supervisor shadow stack support, VMGEXIT parameter support, - virtual TOM MSR support, IBS virtual support for SEV-ES guests, - SMT protection support, SVSM communication page MSR support, - VIRT_RMPUPDATE & VIRT_PSMASH MSR support. - * Added 0x80000020/0/ecx bit: L3 range reservation support. - * Added 0x80000021/eax bits: automatic IBRS, - CPUID disable for non-privileged. - * Added 0x80000022/eax bit: AMD LBR & PMC freezing. - * Added 0x80000022/ebx field: number of LBR stack entries. - * Added 0x80000023 leaf: Multi-Key Encrypted Memory Capabilities. - * Added 0x80000026 leaf: AMD Extended CPU Topology. - * cpuid.c: use lseek64 and cpuset_setaffinity, Added 0x80000022/eax + * Added 0x8000000a/edx bits: ROGPT, VNMI, IBS virtualization. + * Added 0x8000001b/eax bit: IBS L3 miss filtering support. + * Added 0x8000001f/eax bits: RMPQUERY instruction support, + VMPL supervisor shadow stack support, VMGEXIT parameter support, + virtual TOM MSR support, IBS virtual support for SEV-ES guests, + SMT protection support, SVSM communication page MSR support, + VIRT_RMPUPDATE & VIRT_PSMASH MSR support. + * Added 0x80000020/0/ecx bit: L3 range reservation support. + * Added 0x80000021/eax bits: automatic IBRS, + CPUID disable for non-privileged. + * Added 0x80000022/eax bit: AMD LBR & PMC freezing. + * Added 0x80000022/ebx field: number of LBR stack entries. + * Added 0x80000023 leaf: Multi-Key Encrypted Memory Capabilities. + * Added 0x80000026 leaf: AMD Extended CPU Topology. + * cpuid.c: use lseek64 and cpuset_setaffinity, Added 0x80000022/eax AMD LBR V2 flag, from LX*. -------------------------------------------------------------------