From 660be9089a33d113c4758d371ddba17a6641208fe638eb26a955f6a4be564f6d Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Sun, 10 Mar 2024 10:18:29 +0000 Subject: [PATCH] - Update to snapshot vulkan-sdk-1.3.275.0-19-g8b246ff OBS-URL: https://build.opensuse.org/package/show/X11:Wayland/spirv-headers?expand=0&rev=92 --- spirv-headers.changes | 13 + spirv-headers.spec | 5 +- v275-to-8b246ff.patch | 3358 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 3374 insertions(+), 2 deletions(-) create mode 100644 v275-to-8b246ff.patch diff --git a/spirv-headers.changes b/spirv-headers.changes index ef8b8f0..a77adab 100644 --- a/spirv-headers.changes +++ b/spirv-headers.changes @@ -1,3 +1,16 @@ +------------------------------------------------------------------- +Sun Mar 10 09:30:51 UTC 2024 - Jan Engelhardt + +- Update to snapshot vulkan-sdk-1.3.275.0-19-g8b246ff + * Upstream tokens for SPV_INTEL_masked_gather_scatter + * Publish the header for the vulkan-shader-profiler embedded + reflection + * Add SPV_KHR_maximal_reconvergence, SPV_KHR_float_controls2 + * Support SPV_KHR_quad_control (with fixed line endings) + * Add SPV_QCOM_image_processing2, SPV_NV_shader_atomic_fp16_vector, + SPV_NV_raw_access_chains + * Headers support for SPV_INTEL_maximum_registers extension + ------------------------------------------------------------------- Fri Jan 19 11:33:40 UTC 2024 - Jan Engelhardt diff --git a/spirv-headers.spec b/spirv-headers.spec index a1fb920..13aae26 100644 --- a/spirv-headers.spec +++ b/spirv-headers.spec @@ -24,7 +24,7 @@ # and the independently increasing toolchain release number (239). Name: spirv-headers -Version: 1.6.1+sdk275 +Version: 1.6.1+sdk275+git19 %define innerver 1.3.275 Release: 0 Summary: Machine-readable files from the SPIR-V registry @@ -32,6 +32,7 @@ License: MIT Group: Development/Libraries/C and C++ URL: https://github.com/KhronosGroup/SPIRV-Headers Source: https://github.com/KhronosGroup/SPIRV-Headers/archive/vulkan-sdk-%innerver.tar.gz +Patch1: v275-to-8b246ff.patch BuildArch: noarch BuildRequires: cmake >= 2.8 BuildRequires: fdupes @@ -48,7 +49,7 @@ registry. This includes: * The XML registry file. %prep -%autosetup -n SPIRV-Headers-vulkan-sdk-%innerver +%autosetup -n SPIRV-Headers-vulkan-sdk-%innerver -p1 %build %cmake diff --git a/v275-to-8b246ff.patch b/v275-to-8b246ff.patch new file mode 100644 index 0000000..df3c961 --- /dev/null +++ b/v275-to-8b246ff.patch @@ -0,0 +1,3358 @@ +# Generated from: diff vulkan-sdk-1.3.275..8b246ff >this.diff + +diff --git a/.github/dependabot.yml b/.github/dependabot.yml +new file mode 100644 +index 0000000..2390d8c +--- /dev/null ++++ b/.github/dependabot.yml +@@ -0,0 +1,10 @@ ++version: 2 ++updates: ++ - package-ecosystem: "github-actions" ++ directory: "/" ++ schedule: ++ interval: "monthly" ++ groups: ++ github-actions: ++ patterns: ++ - "*" +diff --git a/.github/workflows/presubmit.yml b/.github/workflows/presubmit.yml +index 306f50e..d7958ca 100644 +--- a/.github/workflows/presubmit.yml ++++ b/.github/workflows/presubmit.yml +@@ -12,7 +12,7 @@ jobs: + matrix: + os: [ubuntu-latest, macos-latest, windows-latest] + steps: +- - uses: actions/checkout@v3 ++ - uses: actions/checkout@v4 + - name: Install Ubuntu packages + if: matrix.os == 'ubuntu-latest' + run: sudo apt install -y dos2unix +@@ -42,7 +42,7 @@ jobs: + test_cmake_min_required: + runs-on: ubuntu-latest + steps: +- - uses: actions/checkout@v3 ++ - uses: actions/checkout@v4 + - uses: lukka/get-cmake@latest + with: + cmakeVersion: 3.14.0 +@@ -54,7 +54,7 @@ jobs: + test_cmake_latest: + runs-on: ubuntu-latest + steps: +- - uses: actions/checkout@v3 ++ - uses: actions/checkout@v4 + - uses: lukka/get-cmake@latest + - name: CMake build + run: | +@@ -64,7 +64,7 @@ jobs: + add_subdirectory: + runs-on: ubuntu-latest + steps: +- - uses: actions/checkout@v3 ++ - uses: actions/checkout@v4 + - uses: lukka/get-cmake@latest + with: + cmakeVersion: 3.15.0 +@@ -76,7 +76,7 @@ jobs: + find_package: + runs-on: ubuntu-latest + steps: +- - uses: actions/checkout@v3 ++ - uses: actions/checkout@v4 + - uses: lukka/get-cmake@latest + with: + cmakeVersion: 3.15.0 +@@ -92,7 +92,7 @@ jobs: + find_pkg_config: + runs-on: ubuntu-latest + steps: +- - uses: actions/checkout@v3 ++ - uses: actions/checkout@v4 + - uses: lukka/get-cmake@latest + with: + cmakeVersion: 3.15.0 +@@ -109,7 +109,7 @@ jobs: + find_pkg_config_absolute: + runs-on: ubuntu-latest + steps: +- - uses: actions/checkout@v3 ++ - uses: actions/checkout@v4 + - uses: lukka/get-cmake@latest + with: + cmakeVersion: 3.15.0 +diff --git a/BUILD.bazel b/BUILD.bazel +index c898ade..25634d9 100644 +--- a/BUILD.bazel ++++ b/BUILD.bazel +@@ -81,6 +81,11 @@ filegroup( + srcs = ["include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json"], + ) + ++filegroup( ++ name = "spirv_ext_inst_nonsemantic_vkspreflection_grammar_unified1", ++ srcs = ["include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json"], ++) ++ + filegroup( + name = "spirv_ext_inst_nonsemantic_debugprintf_grammar_unified1", + srcs = ["include/spirv/unified1/extinst.nonsemantic.debugprintf.grammar.json"], +@@ -128,6 +133,7 @@ cc_library( + "include/spirv/unified1/GLSL.std.450.h", + "include/spirv/unified1/NonSemanticClspvReflection.h", + "include/spirv/unified1/NonSemanticDebugPrintf.h", ++ "include/spirv/unified1/NonSemanticVkspReflection.h", + "include/spirv/unified1/OpenCL.std.h", + ], + includes = ["include"], +diff --git a/BUILD.gn b/BUILD.gn +index be3f43b..34294e0 100644 +--- a/BUILD.gn ++++ b/BUILD.gn +@@ -1,4 +1,4 @@ +-# Copyright (c) 2020 Google LLC ++# Copyright (c) 2020-2024 Google LLC + # + # Permission is hereby granted, free of charge, to any person obtaining a copy + # of this software and/or associated documentation files (the "Materials"), +@@ -35,6 +35,7 @@ source_set("spv_headers") { + "include/spirv/unified1/GLSL.std.450.h", + "include/spirv/unified1/NonSemanticClspvReflection.h", + "include/spirv/unified1/NonSemanticDebugPrintf.h", ++ "include/spirv/unified1/NonSemanticVkspReflection.h", + "include/spirv/unified1/OpenCL.std.h", + "include/spirv/unified1/spirv.h", + "include/spirv/unified1/spirv.hpp", +diff --git a/CMakeLists.txt b/CMakeLists.txt +index e3d76d9..b018b23 100644 +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -1,4 +1,4 @@ +-# Copyright (c) 2015-2023 The Khronos Group Inc. ++# Copyright (c) 2015-2024 The Khronos Group Inc. + # + # Permission is hereby granted, free of charge, to any person obtaining a + # copy of this software and/or associated documentation files (the +@@ -35,12 +35,14 @@ add_library(SPIRV-Headers INTERFACE) + add_library(SPIRV-Headers::SPIRV-Headers ALIAS SPIRV-Headers) + target_include_directories(SPIRV-Headers INTERFACE $) + +-if (PROJECT_IS_TOP_LEVEL) +- option(BUILD_TESTS "Build the tests") +- if (BUILD_TESTS) +- add_subdirectory(tests) +- endif() ++option(SPIRV_HEADERS_ENABLE_TESTS "Test SPIRV-Headers" ${PROJECT_IS_TOP_LEVEL}) ++option(SPIRV_HEADERS_ENABLE_INSTALL "Install SPIRV-Headers" ${PROJECT_IS_TOP_LEVEL}) + ++if(SPIRV_HEADERS_ENABLE_TESTS) ++ add_subdirectory(tests) ++endif() ++ ++if(SPIRV_HEADERS_ENABLE_INSTALL) + include(GNUInstallDirs) + include(CMakePackageConfigHelpers) + +diff --git a/LICENSE b/LICENSE +index 47974f8..a02ace1 100644 +--- a/LICENSE ++++ b/LICENSE +@@ -1,4 +1,5 @@ +-Copyright (c) 2015-2018 The Khronos Group Inc. ++Files: All files except for those called out below. ++Copyright (c) 2015-2024 The Khronos Group Inc. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and/or associated documentation files (the +@@ -23,3 +24,80 @@ IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. ++ ++--- ++ ++Files: include/spirv/spir-v.xml ++Copyright (c) 2015-2024 The Khronos Group Inc. ++ ++Permission is hereby granted, free of charge, to any person obtaining a ++copy of this software and/or associated documentation files (the ++"Materials"), to deal in the Materials without restriction, including ++without limitation the rights to use, copy, modify, merge, publish, ++distribute, sublicense, and/or sell copies of the Materials, and to ++permit persons to whom the Materials are furnished to do so, subject to ++the following conditions: ++ ++The above copyright notice and this permission notice shall be included ++in all copies or substantial portions of the Materials. ++ ++THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY ++CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, ++TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE ++MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. ++ ++--- ++ ++Files: tools/buildHeaders/jsoncpp/* ++The JsonCpp library's source code, including accompanying documentation, ++tests and demonstration applications, are licensed under the following ++conditions... ++ ++The author (Baptiste Lepilleur) explicitly disclaims copyright in all ++jurisdictions which recognize such a disclaimer. In such jurisdictions, ++this software is released into the Public Domain. ++ ++In jurisdictions which do not recognize Public Domain property (e.g. Germany as of ++2010), this software is Copyright (c) 2007-2010 by Baptiste Lepilleur, and is ++released under the terms of the MIT License (see below). ++ ++In jurisdictions which recognize Public Domain property, the user of this ++software may choose to accept it either as 1) Public Domain, 2) under the ++conditions of the MIT License (see below), or 3) under the terms of dual ++Public Domain/MIT License conditions described here, as they choose. ++ ++The MIT License is about as close to Public Domain as a license can get, and is ++described in clear, concise terms at: ++ ++ http://en.wikipedia.org/wiki/MIT_License ++ ++The full text of the MIT License follows: ++ ++======================================================================== ++Copyright (c) 2007-2010 Baptiste Lepilleur ++ ++Permission is hereby granted, free of charge, to any person ++obtaining a copy of this software and associated documentation ++files (the "Software"), to deal in the Software without ++restriction, including without limitation the rights to use, copy, ++modify, merge, publish, distribute, sublicense, and/or sell copies ++of the Software, and to permit persons to whom the Software is ++furnished to do so, subject to the following conditions: ++ ++The above copyright notice and this permission notice shall be ++included in all copies or substantial portions of the Software. ++ ++THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS ++BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ++ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ++CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ++SOFTWARE. ++======================================================================== ++ ++--- +diff --git a/README.md b/README.md +index 8c7039f..ed38828 100644 +--- a/README.md ++++ b/README.md +@@ -198,7 +198,7 @@ python3 bin/makeExtinstHeaders.py + ## License + + ``` +-Copyright (c) 2015-2018 The Khronos Group Inc. ++Copyright (c) 2015-2024 The Khronos Group Inc. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and/or associated documentation files (the +diff --git a/include/spirv/spir-v.xml b/include/spirv/spir-v.xml +index 1305df5..4a2de83 100644 +--- a/include/spirv/spir-v.xml ++++ b/include/spirv/spir-v.xml +@@ -1,7 +1,7 @@ + + + +@@ -248,7 +249,8 @@ + + + +- ++ ++ + + + +diff --git a/include/spirv/unified1/AMD_gcn_shader.h b/include/spirv/unified1/AMD_gcn_shader.h +index 80165ae..e626a7a 100644 +--- a/include/spirv/unified1/AMD_gcn_shader.h ++++ b/include/spirv/unified1/AMD_gcn_shader.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2020 The Khronos Group Inc. ++// Copyright (c) 2020-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/include/spirv/unified1/AMD_shader_ballot.h b/include/spirv/unified1/AMD_shader_ballot.h +index 8a8bb6e..563c0b6 100644 +--- a/include/spirv/unified1/AMD_shader_ballot.h ++++ b/include/spirv/unified1/AMD_shader_ballot.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2020 The Khronos Group Inc. ++// Copyright (c) 2020-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h b/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h +index 12b6480..e663330 100644 +--- a/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h ++++ b/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2020 The Khronos Group Inc. ++// Copyright (c) 2020-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/include/spirv/unified1/AMD_shader_trinary_minmax.h b/include/spirv/unified1/AMD_shader_trinary_minmax.h +index 1b14997..dd51c5f 100644 +--- a/include/spirv/unified1/AMD_shader_trinary_minmax.h ++++ b/include/spirv/unified1/AMD_shader_trinary_minmax.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2020 The Khronos Group Inc. ++// Copyright (c) 2020-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/include/spirv/unified1/DebugInfo.h b/include/spirv/unified1/DebugInfo.h +index 4657556..a3c0af4 100644 +--- a/include/spirv/unified1/DebugInfo.h ++++ b/include/spirv/unified1/DebugInfo.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2017 The Khronos Group Inc. ++// Copyright (c) 2017-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +diff --git a/include/spirv/unified1/GLSL.std.450.h b/include/spirv/unified1/GLSL.std.450.h +index 54cc00e..0594f90 100644 +--- a/include/spirv/unified1/GLSL.std.450.h ++++ b/include/spirv/unified1/GLSL.std.450.h +@@ -1,5 +1,5 @@ + /* +-** Copyright (c) 2014-2016 The Khronos Group Inc. ++** Copyright (c) 2014-2024 The Khronos Group Inc. + ** + ** Permission is hereby granted, free of charge, to any person obtaining a copy + ** of this software and/or associated documentation files (the "Materials"), +diff --git a/include/spirv/unified1/NonSemanticClspvReflection.h b/include/spirv/unified1/NonSemanticClspvReflection.h +index 4ee87c2..b6c27fa 100644 +--- a/include/spirv/unified1/NonSemanticClspvReflection.h ++++ b/include/spirv/unified1/NonSemanticClspvReflection.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2020 The Khronos Group Inc. ++// Copyright (c) 2020-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/include/spirv/unified1/NonSemanticDebugBreak.h b/include/spirv/unified1/NonSemanticDebugBreak.h +index 6ec2b5b..8604fe7 100644 +--- a/include/spirv/unified1/NonSemanticDebugBreak.h ++++ b/include/spirv/unified1/NonSemanticDebugBreak.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2020 The Khronos Group Inc. ++// Copyright (c) 2020-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/include/spirv/unified1/NonSemanticDebugPrintf.h b/include/spirv/unified1/NonSemanticDebugPrintf.h +index 83796d7..bc24683 100644 +--- a/include/spirv/unified1/NonSemanticDebugPrintf.h ++++ b/include/spirv/unified1/NonSemanticDebugPrintf.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2020 The Khronos Group Inc. ++// Copyright (c) 2020-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/include/spirv/unified1/NonSemanticShaderDebugInfo100.h b/include/spirv/unified1/NonSemanticShaderDebugInfo100.h +index c52f32f..b276b56 100644 +--- a/include/spirv/unified1/NonSemanticShaderDebugInfo100.h ++++ b/include/spirv/unified1/NonSemanticShaderDebugInfo100.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2018 The Khronos Group Inc. ++// Copyright (c) 2018-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +diff --git a/include/spirv/unified1/NonSemanticVkspReflection.h b/include/spirv/unified1/NonSemanticVkspReflection.h +new file mode 100644 +index 0000000..0ef478a +--- /dev/null ++++ b/include/spirv/unified1/NonSemanticVkspReflection.h +@@ -0,0 +1,57 @@ ++// Copyright (c) 2020-2024 The Khronos Group Inc. ++// ++// Permission is hereby granted, free of charge, to any person obtaining a ++// copy of this software and/or associated documentation files (the ++// "Materials"), to deal in the Materials without restriction, including ++// without limitation the rights to use, copy, modify, merge, publish, ++// distribute, sublicense, and/or sell copies of the Materials, and to ++// permit persons to whom the Materials are furnished to do so, subject to ++// the following conditions: ++// ++// The above copyright notice and this permission notice shall be included ++// in all copies or substantial portions of the Materials. ++// ++// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS ++// KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS ++// SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT ++// https://www.khronos.org/registry/ ++// ++// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY ++// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, ++// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE ++// MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. ++// ++ ++#ifndef SPIRV_UNIFIED1_NonSemanticVkspReflection_H_ ++#define SPIRV_UNIFIED1_NonSemanticVkspReflection_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++enum { ++ NonSemanticVkspReflectionRevision = 1, ++ NonSemanticVkspReflectionRevision_BitWidthPadding = 0x7fffffff ++}; ++ ++enum NonSemanticVkspReflectionInstructions { ++ NonSemanticVkspReflectionConfiguration = 1, ++ NonSemanticVkspReflectionStartCounter = 2, ++ NonSemanticVkspReflectionStopCounter = 3, ++ NonSemanticVkspReflectionPushConstants = 4, ++ NonSemanticVkspReflectionSpecializationMapEntry = 5, ++ NonSemanticVkspReflectionDescriptorSetBuffer = 6, ++ NonSemanticVkspReflectionDescriptorSetImage = 7, ++ NonSemanticVkspReflectionDescriptorSetSampler = 8, ++ NonSemanticVkspReflectionInstructionsMax = 0x7fffffff ++}; ++ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif // SPIRV_UNIFIED1_NonSemanticVkspReflection_H_ +diff --git a/include/spirv/unified1/OpenCL.std.h b/include/spirv/unified1/OpenCL.std.h +index 2745e30..ed74f20 100644 +--- a/include/spirv/unified1/OpenCL.std.h ++++ b/include/spirv/unified1/OpenCL.std.h +@@ -1,5 +1,5 @@ + /* +-** Copyright (c) 2015-2019 The Khronos Group Inc. ++** Copyright (c) 2015-2024 The Khronos Group Inc. + ** + ** Permission is hereby granted, free of charge, to any person obtaining a copy + ** of this software and/or associated documentation files (the "Materials"), +diff --git a/include/spirv/unified1/OpenCLDebugInfo100.h b/include/spirv/unified1/OpenCLDebugInfo100.h +index e3847c9..ffbd16f 100644 +--- a/include/spirv/unified1/OpenCLDebugInfo100.h ++++ b/include/spirv/unified1/OpenCLDebugInfo100.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2018 The Khronos Group Inc. ++// Copyright (c) 2018-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +diff --git a/include/spirv/unified1/extinst.debuginfo.grammar.json b/include/spirv/unified1/extinst.debuginfo.grammar.json +index 7d6e8e5..918a9e5 100644 +--- a/include/spirv/unified1/extinst.debuginfo.grammar.json ++++ b/include/spirv/unified1/extinst.debuginfo.grammar.json +@@ -1,6 +1,6 @@ + { + "copyright" : [ +- "Copyright (c) 2017 The Khronos Group Inc.", ++ "Copyright (c) 2017-2024 The Khronos Group Inc.", + "", + "Permission is hereby granted, free of charge, to any person obtaining a copy", + "of this software and/or associated documentation files (the \"Materials\"),", +diff --git a/include/spirv/unified1/extinst.glsl.std.450.grammar.json b/include/spirv/unified1/extinst.glsl.std.450.grammar.json +index 3d9f39e..ac8fc6d 100644 +--- a/include/spirv/unified1/extinst.glsl.std.450.grammar.json ++++ b/include/spirv/unified1/extinst.glsl.std.450.grammar.json +@@ -1,6 +1,6 @@ + { + "copyright" : [ +- "Copyright (c) 2014-2016 The Khronos Group Inc.", ++ "Copyright (c) 2014-2024 The Khronos Group Inc.", + "", + "Permission is hereby granted, free of charge, to any person obtaining a copy", + "of this software and/or associated documentation files (the \"Materials\"),", +diff --git a/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json b/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json +index f3621b0..1eb2859 100644 +--- a/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json ++++ b/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json +@@ -1,6 +1,6 @@ + { + "copyright" : [ +- "Copyright (c) 2018 The Khronos Group Inc.", ++ "Copyright (c) 2018-2024 The Khronos Group Inc.", + "", + "Permission is hereby granted, free of charge, to any person obtaining a copy", + "of this software and/or associated documentation files (the \"Materials\"),", +diff --git a/include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json b/include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json +new file mode 100644 +index 0000000..bee1bea +--- /dev/null ++++ b/include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json +@@ -0,0 +1,135 @@ ++{ ++ "revision" : 1, ++ "instructions" : [ ++ { ++ "opname" : "Configuration", ++ "opcode" : 1, ++ "operands" : [ ++ {"kind" : "LiteralString", "name" : "enabledExtensionNames" }, ++ {"kind" : "LiteralInteger", "name" : "specializationInfoDataSize" }, ++ {"kind" : "LiteralString", "name" : "specializationInfoData" }, ++ {"kind" : "LiteralString", "name" : "shaderName" }, ++ {"kind" : "LiteralString", "name" : "EntryPoint" }, ++ {"kind" : "LiteralInteger", "name" : "groupCountX" }, ++ {"kind" : "LiteralInteger", "name" : "groupCountY" }, ++ {"kind" : "LiteralInteger", "name" : "groupCountZ" } ++ ] ++ }, ++ { ++ "opname" : "StartCounter", ++ "opcode" : 2, ++ "operands" : [ ++ {"kind" : "LiteralString", "name" : "name" } ++ ] ++ }, ++ { ++ "opname" : "StopCounter", ++ "opcode" : 3, ++ "operands" : [ ++ {"kind" : "IdRef", "name" : "counter" } ++ ] ++ }, ++ { ++ "opname" : "PushConstants", ++ "opcode" : 4, ++ "operands" : [ ++ { "kind" : "LiteralInteger", "name" : "offset" }, ++ { "kind" : "LiteralInteger", "name" : "size" }, ++ { "kind" : "LiteralString", "name" : "pValues" }, ++ { "kind" : "LiteralInteger", "name" : "stageFlags" } ++ ] ++ }, ++ { ++ "opname" : "SpecializationMapEntry", ++ "opcode" : 5, ++ "operands" : [ ++ {"kind" : "LiteralInteger", "name" : "constantID" }, ++ {"kind" : "LiteralInteger", "name" : "offset" }, ++ {"kind" : "LiteralInteger", "name" : "size" } ++ ] ++ }, ++ { ++ "opname" : "DescriptorSetBuffer", ++ "opcode" : 6, ++ "operands" : [ ++ { "kind" : "LiteralInteger", "name" : "ds" }, ++ { "kind" : "LiteralInteger", "name" : "binding" }, ++ { "kind" : "LiteralInteger", "name" : "type" }, ++ { "kind" : "LiteralInteger", "name" : "flags" }, ++ { "kind" : "LiteralInteger", "name" : "queueFamilyIndexCount" }, ++ { "kind" : "LiteralInteger", "name" : "sharingMode" }, ++ { "kind" : "LiteralInteger", "name" : "size" }, ++ { "kind" : "LiteralInteger", "name" : "usage" }, ++ { "kind" : "LiteralInteger", "name" : "range" }, ++ { "kind" : "LiteralInteger", "name" : "offset" }, ++ { "kind" : "LiteralInteger", "name" : "memorySize" }, ++ { "kind" : "LiteralInteger", "name" : "memoryType" }, ++ { "kind" : "LiteralInteger", "name" : "bindOffset" } ++ ] ++ }, ++ { ++ "opname" : "DescriptorSetImage", ++ "opcode" : 7, ++ "operands" : [ ++ { "kind" : "LiteralInteger", "name" : "ds" }, ++ { "kind" : "LiteralInteger", "name" : "binding" }, ++ { "kind" : "LiteralInteger", "name" : "type" }, ++ { "kind" : "LiteralInteger", "name" : "imageLayout"}, ++ { "kind" : "LiteralInteger", "name" : "imageFlags"}, ++ { "kind" : "LiteralInteger", "name" : "imageType"}, ++ { "kind" : "LiteralInteger", "name" : "imageformat"}, ++ { "kind" : "LiteralInteger", "name" : "width"}, ++ { "kind" : "LiteralInteger", "name" : "height"}, ++ { "kind" : "LiteralInteger", "name" : "depth"}, ++ { "kind" : "LiteralInteger", "name" : "mipLevels"}, ++ { "kind" : "LiteralInteger", "name" : "arrayLayers"}, ++ { "kind" : "LiteralInteger", "name" : "samples"}, ++ { "kind" : "LiteralInteger", "name" : "tiling"}, ++ { "kind" : "LiteralInteger", "name" : "usage"}, ++ { "kind" : "LiteralInteger", "name" : "sharingMode"}, ++ { "kind" : "LiteralInteger", "name" : "queueFamilyIndexCount"}, ++ { "kind" : "LiteralInteger", "name" : "initialLayout"}, ++ { "kind" : "LiteralInteger", "name" : "aspectMask"}, ++ { "kind" : "LiteralInteger", "name" : "baseMipLevel"}, ++ { "kind" : "LiteralInteger", "name" : "levelCount"}, ++ { "kind" : "LiteralInteger", "name" : "baseArrayLayer"}, ++ { "kind" : "LiteralInteger", "name" : "layerCount"}, ++ { "kind" : "LiteralInteger", "name" : "viewFlags"}, ++ { "kind" : "LiteralInteger", "name" : "viewType"}, ++ { "kind" : "LiteralInteger", "name" : "viewFormat"}, ++ { "kind" : "LiteralInteger", "name" : "component_a"}, ++ { "kind" : "LiteralInteger", "name" : "component_b"}, ++ { "kind" : "LiteralInteger", "name" : "component_g"}, ++ { "kind" : "LiteralInteger", "name" : "component_r"}, ++ { "kind" : "LiteralInteger", "name" : "memorySize" }, ++ { "kind" : "LiteralInteger", "name" : "memoryType" }, ++ { "kind" : "LiteralInteger", "name" : "bindOffset"} ++ ] ++ }, ++ { ++ "opname" : "DescriptorSetSampler", ++ "opcode" : 8, ++ "operands" : [ ++ { "kind" : "LiteralInteger", "name" : "ds" }, ++ { "kind" : "LiteralInteger", "name" : "binding" }, ++ { "kind" : "LiteralInteger", "name" : "type" }, ++ { "kind" : "LiteralInteger", "name" : "flags"}, ++ { "kind" : "LiteralInteger", "name" : "magFilter"}, ++ { "kind" : "LiteralInteger", "name" : "minFilter"}, ++ { "kind" : "LiteralInteger", "name" : "mipmapMode"}, ++ { "kind" : "LiteralInteger", "name" : "addressModeU"}, ++ { "kind" : "LiteralInteger", "name" : "addressModeV"}, ++ { "kind" : "LiteralInteger", "name" : "addressModeW"}, ++ { "kind" : "LiteralFloat", "name" : "mipLodBias"}, ++ { "kind" : "LiteralInteger", "name" : "anisotropyEnable"}, ++ { "kind" : "LiteralFloat", "name" : "maxAnisotropy"}, ++ { "kind" : "LiteralInteger", "name" : "compareEnable"}, ++ { "kind" : "LiteralInteger", "name" : "compareOp"}, ++ { "kind" : "LiteralFloat", "name" : "minLod"}, ++ { "kind" : "LiteralFloat", "name" : "maxLod"}, ++ { "kind" : "LiteralInteger", "name" : "borderColor"}, ++ { "kind" : "LiteralInteger", "name" : "unnormalizedCoordinates"} ++ ] ++ } ++ ] ++} +diff --git a/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json b/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json +index 699fe40..53b001c 100644 +--- a/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json ++++ b/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json +@@ -1,6 +1,6 @@ + { + "copyright" : [ +- "Copyright (c) 2018 The Khronos Group Inc.", ++ "Copyright (c) 2018-2024 The Khronos Group Inc.", + "", + "Permission is hereby granted, free of charge, to any person obtaining a copy", + "of this software and/or associated documentation files (the \"Materials\"),", +diff --git a/include/spirv/unified1/extinst.opencl.std.100.grammar.json b/include/spirv/unified1/extinst.opencl.std.100.grammar.json +index 4fe4506..21b7876 100644 +--- a/include/spirv/unified1/extinst.opencl.std.100.grammar.json ++++ b/include/spirv/unified1/extinst.opencl.std.100.grammar.json +@@ -1,6 +1,6 @@ + { + "copyright" : [ +- "Copyright (c) 2014-2016 The Khronos Group Inc.", ++ "Copyright (c) 2014-2024 The Khronos Group Inc.", + "", + "Permission is hereby granted, free of charge, to any person obtaining a copy", + "of this software and/or associated documentation files (the \"Materials\"),", +diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf +index 2528b9c..92b95c8 100644 +--- a/include/spirv/unified1/spirv.bf ++++ b/include/spirv/unified1/spirv.bf +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2020 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +@@ -70,6 +70,7 @@ namespace Spv + NZSL = 9, + WGSL = 10, + Slang = 11, ++ Zig = 12, + } + + [AllowDuplicates, CRepr] public enum ExecutionModel +@@ -180,6 +181,8 @@ namespace Spv + StencilRefUnchangedBackAMD = 5082, + StencilRefGreaterBackAMD = 5083, + StencilRefLessBackAMD = 5084, ++ QuadDerivativesKHR = 5088, ++ RequireFullQuadsKHR = 5089, + OutputLinesEXT = 5269, + OutputLinesNV = 5269, + OutputPrimitivesEXT = 5270, +@@ -204,9 +207,14 @@ namespace Spv + NoGlobalOffsetINTEL = 5895, + NumSIMDWorkitemsINTEL = 5896, + SchedulerTargetFmaxMhzINTEL = 5903, ++ MaximallyReconvergesKHR = 6023, ++ FPFastMathDefault = 6028, + StreamingInterfaceINTEL = 6154, + RegisterMapInterfaceINTEL = 6160, + NamedBarrierCountINTEL = 6417, ++ MaximumRegistersINTEL = 6461, ++ MaximumRegistersIdINTEL = 6462, ++ NamedMaximumRegistersINTEL = 6463, + } + + [AllowDuplicates, CRepr] public enum StorageClass +@@ -424,8 +432,11 @@ namespace Spv + NSZ = 2, + AllowRecip = 3, + Fast = 4, ++ AllowContract = 16, + AllowContractFastINTEL = 16, ++ AllowReassoc = 17, + AllowReassocINTEL = 17, ++ AllowTransform = 18, + } + + [AllowDuplicates, CRepr] public enum FPFastMathModeMask +@@ -436,8 +447,11 @@ namespace Spv + NSZ = 0x00000004, + AllowRecip = 0x00000008, + Fast = 0x00000010, ++ AllowContract = 0x00010000, + AllowContractFastINTEL = 0x00010000, ++ AllowReassoc = 0x00020000, + AllowReassocINTEL = 0x00020000, ++ AllowTransform = 0x00040000, + } + + [AllowDuplicates, CRepr] public enum FPRoundingMode +@@ -528,6 +542,7 @@ namespace Spv + NoUnsignedWrap = 4470, + WeightTextureQCOM = 4487, + BlockMatchTextureQCOM = 4488, ++ BlockMatchSamplerQCOM = 4499, + ExplicitInterpAMD = 4999, + NodeSharesPayloadLimitsWithAMDX = 5019, + NodeMaxPayloadsAMDX = 5020, +@@ -1069,6 +1084,7 @@ namespace Spv + TextureSampleWeightedQCOM = 4484, + TextureBoxFilterQCOM = 4485, + TextureBlockMatchQCOM = 4486, ++ TextureBlockMatch2QCOM = 4498, + Float16ImageAMD = 5008, + ImageGatherBiasLodAMD = 5009, + FragmentMaskAMD = 5010, +@@ -1077,6 +1093,7 @@ namespace Spv + Int64ImageEXT = 5016, + ShaderClockKHR = 5055, + ShaderEnqueueAMDX = 5067, ++ QuadControlKHR = 5087, + SampleMaskOverrideCoverageNV = 5249, + GeometryShaderPassthroughNV = 5251, + ShaderViewportIndexLayerEXT = 5254, +@@ -1141,7 +1158,9 @@ namespace Spv + ShaderInvocationReorderNV = 5383, + BindlessTextureNV = 5390, + RayQueryPositionFetchKHR = 5391, ++ AtomicFloat16VectorNV = 5404, + RayTracingDisplacementMicromapNV = 5409, ++ RawAccessChainsNV = 5414, + SubgroupShuffleINTEL = 5568, + SubgroupBufferBlockIOINTEL = 5569, + SubgroupImageBlockIOINTEL = 5570, +@@ -1196,6 +1215,7 @@ namespace Spv + CooperativeMatrixKHR = 6022, + BitInstructions = 6025, + GroupNonUniformRotateKHR = 6026, ++ FloatControls2 = 6029, + AtomicFloat32AddEXT = 6033, + AtomicFloat64AddEXT = 6034, + LongCompositesINTEL = 6089, +@@ -1212,7 +1232,9 @@ namespace Spv + GlobalVariableHostAccessINTEL = 6187, + GlobalVariableFPGADecorationsINTEL = 6189, + GroupUniformArithmeticKHR = 6400, ++ MaskedGatherScatterINTEL = 6427, + CacheControlsINTEL = 6441, ++ RegisterLimitsINTEL = 6460, + } + + [AllowDuplicates, CRepr] public enum RayFlagsShift +@@ -1383,6 +1405,24 @@ namespace Spv + StreamingINTEL = 3, + } + ++ [AllowDuplicates, CRepr] public enum NamedMaximumNumberOfRegisters ++ { ++ AutoINTEL = 0, ++ } ++ ++ [AllowDuplicates, CRepr] public enum RawAccessChainOperandsShift ++ { ++ RobustnessPerComponentNV = 0, ++ RobustnessPerElementNV = 1, ++ } ++ ++ [AllowDuplicates, CRepr] public enum RawAccessChainOperandsMask ++ { ++ MaskNone = 0, ++ RobustnessPerComponentNV = 0x00000001, ++ RobustnessPerElementNV = 0x00000002, ++ } ++ + [AllowDuplicates, CRepr] public enum Op + { + OpNop = 0, +@@ -1773,6 +1813,10 @@ namespace Spv + OpImageBoxFilterQCOM = 4481, + OpImageBlockMatchSSDQCOM = 4482, + OpImageBlockMatchSADQCOM = 4483, ++ OpImageBlockMatchWindowSSDQCOM = 4500, ++ OpImageBlockMatchWindowSADQCOM = 4501, ++ OpImageBlockMatchGatherSSDQCOM = 4502, ++ OpImageBlockMatchGatherSADQCOM = 4503, + OpGroupIAddNonUniformAMD = 5000, + OpGroupFAddNonUniformAMD = 5001, + OpGroupFMinNonUniformAMD = 5002, +@@ -1787,6 +1831,8 @@ namespace Spv + OpFinalizeNodePayloadsAMDX = 5075, + OpFinishWritingNodePayloadAMDX = 5078, + OpInitializeNodePayloadsAMDX = 5090, ++ OpGroupNonUniformQuadAllKHR = 5110, ++ OpGroupNonUniformQuadAnyKHR = 5111, + OpHitObjectRecordHitMotionNV = 5249, + OpHitObjectRecordHitWithIndexMotionNV = 5250, + OpHitObjectRecordMissMotionNV = 5251, +@@ -1855,6 +1901,7 @@ namespace Spv + OpConvertUToSampledImageNV = 5395, + OpConvertSampledImageToUNV = 5396, + OpSamplerImageAddressingModeNV = 5397, ++ OpRawAccessChainNV = 5398, + OpSubgroupShuffleINTEL = 5571, + OpSubgroupShuffleDownINTEL = 5572, + OpSubgroupShuffleUpINTEL = 5573, +@@ -2109,6 +2156,8 @@ namespace Spv + OpGroupLogicalAndKHR = 6406, + OpGroupLogicalOrKHR = 6407, + OpGroupLogicalXorKHR = 6408, ++ OpMaskedGatherINTEL = 6428, ++ OpMaskedScatterINTEL = 6429, + } + } + } +diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json +index 4de8edc..5d904ca 100644 +--- a/include/spirv/unified1/spirv.core.grammar.json ++++ b/include/spirv/unified1/spirv.core.grammar.json +@@ -1,6 +1,6 @@ + { + "copyright" : [ +- "Copyright (c) 2014-2020 The Khronos Group Inc.", ++ "Copyright (c) 2014-2024 The Khronos Group Inc.", + "", + "Permission is hereby granted, free of charge, to any person obtaining a copy", + "of this software and/or associated documentation files (the \"Materials\"),", +@@ -5050,6 +5050,70 @@ + "capabilities" : [ "TextureBlockMatchQCOM" ], + "version" : "None" + }, ++ { ++ "opname" : "OpImageBlockMatchWindowSSDQCOM", ++ "class" : "Image", ++ "opcode" : 4500, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'Target Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Target Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Reference Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Block Size'" } ++ ], ++ "capabilities" : [ "TextureBlockMatch2QCOM" ], ++ "version" : "None" ++ }, ++ { ++ "opname" : "OpImageBlockMatchWindowSADQCOM", ++ "class" : "Image", ++ "opcode" : 4501, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'Target Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Target Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Reference Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Block Size'" } ++ ], ++ "capabilities" : [ "TextureBlockMatch2QCOM" ], ++ "version" : "None" ++ }, ++ { ++ "opname" : "OpImageBlockMatchGatherSSDQCOM", ++ "class" : "Image", ++ "opcode" : 4502, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'Target Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Target Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Reference Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Block Size'" } ++ ], ++ "capabilities" : [ "TextureBlockMatch2QCOM" ], ++ "version" : "None" ++ }, ++ { ++ "opname" : "OpImageBlockMatchGatherSADQCOM", ++ "class" : "Image", ++ "opcode" : 4503, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'Target Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Target Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" }, ++ { "kind" : "IdRef", "name" : "'Reference Coordinates'" }, ++ { "kind" : "IdRef", "name" : "'Block Size'" } ++ ], ++ "capabilities" : [ "TextureBlockMatch2QCOM" ], ++ "version" : "None" ++ }, + { + "opname" : "OpGroupIAddNonUniformAMD", + "class" : "Group", +@@ -5246,6 +5310,30 @@ + "capabilities" : [ "ShaderEnqueueAMDX" ], + "version" : "None" + }, ++ { ++ "opname" : "OpGroupNonUniformQuadAllKHR", ++ "class" : "Non-Uniform", ++ "opcode" : 5110, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'Predicate'" } ++ ], ++ "capabilities" : [ "QuadControlKHR" ], ++ "version" : "None" ++ }, ++ { ++ "opname" : "OpGroupNonUniformQuadAnyKHR", ++ "class" : "Non-Uniform", ++ "opcode" : 5111, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'Predicate'" } ++ ], ++ "capabilities" : [ "QuadControlKHR" ], ++ "version" : "None" ++ }, + { + "opname" : "OpHitObjectRecordHitMotionNV", + "class" : "Reserved", +@@ -6163,6 +6251,24 @@ + "capabilities" : [ "BindlessTextureNV" ], + "version" : "None" + }, ++ { ++ "opname" : "OpRawAccessChainNV", ++ "class" : "Memory", ++ "opcode" : 5398, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'Base'" }, ++ { "kind" : "IdRef", "name" : "'Byte stride'" }, ++ { "kind" : "IdRef", "name" : "'Element index'" }, ++ { "kind" : "IdRef", "name" : "'Byte offset'" }, ++ { "kind" : "RawAccessChainOperands", "quantifier" : "?" } ++ ], ++ "capabilities" : [ ++ "RawAccessChainsNV" ++ ], ++ "version" : "None" ++ }, + { + "opname" : "OpSubgroupShuffleINTEL", + "class" : "Group", +@@ -6552,7 +6658,7 @@ + { "kind" : "IdMemorySemantics", "name" : "'Semantics'" }, + { "kind" : "IdRef", "name" : "'Value'" } + ], +- "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT" ], ++ "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT", "AtomicFloat16VectorNV" ], + "version" : "None" + }, + { +@@ -6567,7 +6673,7 @@ + { "kind" : "IdMemorySemantics", "name" : "'Semantics'" }, + { "kind" : "IdRef", "name" : "'Value'" } + ], +- "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT" ], ++ "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT", "AtomicFloat16VectorNV" ], + "version" : "None" + }, + { +@@ -9539,7 +9645,7 @@ + { "kind" : "IdMemorySemantics", "name" : "'Semantics'" }, + { "kind" : "IdRef", "name" : "'Value'" } + ], +- "capabilities" : [ "AtomicFloat16AddEXT", "AtomicFloat32AddEXT", "AtomicFloat64AddEXT" ], ++ "capabilities" : [ "AtomicFloat16AddEXT", "AtomicFloat32AddEXT", "AtomicFloat64AddEXT", "AtomicFloat16VectorNV" ], + "extensions" : [ "SPV_EXT_shader_atomic_float_add" ], + "version" : "None" + }, +@@ -9758,6 +9864,34 @@ + ], + "capabilities" : [ "GroupUniformArithmeticKHR" ], + "version" : "None" ++ }, ++ { ++ "opname" : "OpMaskedGatherINTEL", ++ "class" : "Memory", ++ "opcode" : 6428, ++ "operands" : [ ++ { "kind" : "IdResultType" }, ++ { "kind" : "IdResult" }, ++ { "kind" : "IdRef", "name" : "'PtrVector'" }, ++ { "kind" : "LiteralInteger", "name" : "'Alignment'" }, ++ { "kind" : "IdRef", "name" : "'Mask'" }, ++ { "kind" : "IdRef", "name" : "'FillEmpty'" } ++ ], ++ "capabilities" : [ "MaskedGatherScatterINTEL" ], ++ "version" : "None" ++ }, ++ { ++ "opname" : "OpMaskedScatterINTEL", ++ "class" : "Memory", ++ "opcode" : 6429, ++ "operands" : [ ++ { "kind" : "IdRef", "name" : "'InputVector'" }, ++ { "kind" : "IdRef", "name" : "'PtrVector'" }, ++ { "kind" : "LiteralInteger", "name" : "'Alignment'" }, ++ { "kind" : "IdRef", "name" : "'Mask'" } ++ ], ++ "capabilities" : [ "MaskedGatherScatterINTEL" ], ++ "version" : "None" + } + ], + "operand_kinds" : [ +@@ -9961,16 +10095,34 @@ + "value" : "0x0010", + "version" : "1.0" + }, ++ { ++ "enumerant" : "AllowContract", ++ "value" : "0x10000", ++ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ], ++ "version" : "None" ++ }, + { + "enumerant" : "AllowContractFastINTEL", + "value" : "0x10000", +- "capabilities" : [ "FPFastMathModeINTEL" ], ++ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ], ++ "version" : "None" ++ }, ++ { ++ "enumerant" : "AllowReassoc", ++ "value" : "0x20000", ++ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ], + "version" : "None" + }, + { + "enumerant" : "AllowReassocINTEL", + "value" : "0x20000", +- "capabilities" : [ "FPFastMathModeINTEL" ], ++ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ], ++ "version" : "None" ++ }, ++ { ++ "enumerant" : "AllowTransform", ++ "value" : "0x40000", ++ "capabilities" : [ "FloatControls2" ], + "version" : "None" + } + ] +@@ -10533,6 +10685,28 @@ + } + ] + }, ++ { ++ "category" : "BitEnum", ++ "kind" : "RawAccessChainOperands", ++ "enumerants" : [ ++ { ++ "enumerant" : "None", ++ "value" : "0x0000" ++ }, ++ { ++ "enumerant" : "RobustnessPerComponentNV", ++ "value" : "0x0001", ++ "capabilities" : [ "RawAccessChainsNV" ], ++ "version" : "None" ++ }, ++ { ++ "enumerant" : "RobustnessPerElementNV", ++ "value" : "0x0002", ++ "capabilities" : [ "RawAccessChainsNV" ], ++ "version" : "None" ++ } ++ ] ++ }, + { + "category" : "ValueEnum", + "kind" : "SourceLanguage", +@@ -10596,6 +10770,11 @@ + "enumerant" : "Slang", + "value" : 11, + "version" : "1.0" ++ }, ++ { ++ "enumerant" : "Zig", ++ "value" : 12, ++ "version" : "1.0" + } + ] + }, +@@ -11269,6 +11448,18 @@ + "extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ], + "version": "None" + }, ++ { ++ "enumerant": "QuadDerivativesKHR", ++ "value": 5088, ++ "capabilities": [ "QuadControlKHR" ], ++ "version": "None" ++ }, ++ { ++ "enumerant" : "RequireFullQuadsKHR", ++ "value" : 5089, ++ "capabilities" : [ "QuadControlKHR" ], ++ "version" : "None" ++ }, + { + "enumerant" : "OutputLinesNV", + "value" : 5269, +@@ -11467,6 +11658,23 @@ + "version" : "None" + }, + { ++ "enumerant" : "MaximallyReconvergesKHR", ++ "value" : 6023, ++ "capabilities" : [ "Shader" ], ++ "extensions" : [ "SPV_KHR_maximal_reconvergence" ], ++ "version" : "None" ++ }, ++ { ++ "enumerant" : "FPFastMathDefault", ++ "value" : 6028, ++ "parameters" : [ ++ { "kind" : "IdRef", "name" : "'Target Type'" }, ++ { "kind" : "IdRef", "name" : "'Fast-Math Mode'" } ++ ], ++ "capabilities" : [ "FloatControls2" ], ++ "version" : "None" ++ }, ++ { + "enumerant" : "StreamingInterfaceINTEL", + "value" : 6154, + "parameters" : [ +@@ -11492,6 +11700,33 @@ + ], + "capabilities" : [ "VectorComputeINTEL" ], + "version" : "None" ++ }, ++ { ++ "enumerant" : "MaximumRegistersINTEL", ++ "value" : 6461, ++ "parameters" : [ ++ { "kind" : "LiteralInteger", "name" : "'Number of Registers'" } ++ ], ++ "capabilities" : [ "RegisterLimitsINTEL" ], ++ "version" : "None" ++ }, ++ { ++ "enumerant" : "MaximumRegistersIdINTEL", ++ "value" : 6462, ++ "parameters" : [ ++ { "kind" : "IdRef", "name" : "'Number of Registers'" } ++ ], ++ "capabilities" : [ "RegisterLimitsINTEL" ], ++ "version" : "None" ++ }, ++ { ++ "enumerant" : "NamedMaximumRegistersINTEL", ++ "value" : 6463, ++ "parameters" : [ ++ { "kind" : "NamedMaximumNumberOfRegisters", "name" : "'Named Maximum Number of Registers'" } ++ ], ++ "capabilities" : [ "RegisterLimitsINTEL" ], ++ "version" : "None" + } + ] + }, +@@ -12094,121 +12329,101 @@ + { + "enumerant" : "R", + "value" : 0, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "A", + "value" : 1, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "RG", + "value" : 2, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "RA", + "value" : 3, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "RGB", + "value" : 4, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "RGBA", + "value" : 5, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "BGRA", + "value" : 6, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "ARGB", + "value" : 7, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "Intensity", + "value" : 8, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "Luminance", + "value" : 9, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "Rx", + "value" : 10, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "RGx", + "value" : 11, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "RGBx", + "value" : 12, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "Depth", + "value" : 13, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "DepthStencil", + "value" : 14, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "sRGB", + "value" : 15, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "sRGBx", + "value" : 16, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "sRGBA", + "value" : 17, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "sBGRA", + "value" : 18, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "ABGR", + "value" : 19, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + } + ] +@@ -12220,115 +12435,96 @@ + { + "enumerant" : "SnormInt8", + "value" : 0, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "SnormInt16", + "value" : 1, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnormInt8", + "value" : 2, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnormInt16", + "value" : 3, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnormShort565", + "value" : 4, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnormShort555", + "value" : 5, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnormInt101010", + "value" : 6, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "SignedInt8", + "value" : 7, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "SignedInt16", + "value" : 8, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "SignedInt32", + "value" : 9, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnsignedInt8", + "value" : 10, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnsignedInt16", + "value" : 11, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnsignedInt32", + "value" : 12, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "HalfFloat", + "value" : 13, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "Float", + "value" : 14, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnormInt24", + "value" : 15, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnormInt101010_2", + "value" : 16, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnsignedIntRaw10EXT", + "value" : 19, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + }, + { + "enumerant" : "UnsignedIntRaw12EXT", + "value" : 20, +- "capabilities" : [ "Kernel" ], + "version": "1.0" + } + ] +@@ -12900,7 +13096,7 @@ + { + "enumerant" : "FPFastMathMode", + "value" : 40, +- "capabilities" : [ "Kernel" ], ++ "capabilities" : [ "Kernel", "FloatControls2" ], + "parameters" : [ + { "kind" : "FPFastMathMode", "name" : "'Fast-Math Mode'" } + ], +@@ -12991,6 +13187,12 @@ + "extensions" : [ "SPV_QCOM_image_processing" ], + "version" : "None" + }, ++ { ++ "enumerant" : "BlockMatchSamplerQCOM", ++ "value" : 4499, ++ "extensions" : [ "SPV_QCOM_image_processing2" ], ++ "version" : "None" ++ }, + { + "enumerant" : "ExplicitInterpAMD", + "value" : 4999, +@@ -15419,6 +15621,12 @@ + "extensions" : [ "SPV_QCOM_image_processing" ], + "version" : "None" + }, ++ { ++ "enumerant" : "TextureBlockMatch2QCOM", ++ "value" : 4498, ++ "extensions" : [ "SPV_QCOM_image_processing2" ], ++ "version" : "None" ++ }, + { + "enumerant" : "Float16ImageAMD", + "value" : 5008, +@@ -15474,6 +15682,12 @@ + "extensions" : [ "SPV_AMDX_shader_enqueue" ], + "version" : "None" + }, ++ { ++ "enumerant" : "QuadControlKHR", ++ "value" : 5087, ++ "extensions" : [ "SPV_KHR_quad_control" ], ++ "version" : "None" ++ }, + { + "enumerant" : "SampleMaskOverrideCoverageNV", + "value" : 5249, +@@ -15896,6 +16110,12 @@ + "extensions" : [ "SPV_KHR_ray_tracing_position_fetch" ], + "version" : "None" + }, ++ { ++ "enumerant" : "AtomicFloat16VectorNV", ++ "value" : 5404, ++ "extensions" : [ "SPV_NV_shader_atomic_fp16_vector" ], ++ "version" : "None" ++ }, + { + "enumerant" : "RayTracingDisplacementMicromapNV", + "value" : 5409, +@@ -15903,6 +16123,12 @@ + "extensions" : [ "SPV_NV_displacement_micromap" ], + "version" : "None" + }, ++ { ++ "enumerant" : "RawAccessChainsNV", ++ "value" : 5414, ++ "extensions" : [ "SPV_NV_raw_access_chains" ], ++ "version" : "None" ++ }, + { + "enumerant" : "SubgroupShuffleINTEL", + "value" : 5568, +@@ -16229,6 +16455,12 @@ + "extensions" : [ "SPV_KHR_subgroup_rotate" ], + "version" : "None" + }, ++ { ++ "enumerant" : "FloatControls2", ++ "value" : 6029, ++ "extensions" : [ "SPV_KHR_float_controls2" ], ++ "version" : "None" ++ }, + { + "enumerant" : "AtomicFloat32AddEXT", + "value" : 6033, +@@ -16327,11 +16559,23 @@ + "extensions" : [ "SPV_KHR_uniform_group_instructions"], + "version" : "None" + }, ++ { ++ "enumerant" : "MaskedGatherScatterINTEL", ++ "value" : 6427, ++ "extensions" : [ "SPV_INTEL_masked_gather_scatter"], ++ "version" : "None" ++ }, + { + "enumerant" : "CacheControlsINTEL", + "value" : 6441, + "extensions" : [ "SPV_INTEL_cache_controls" ], + "version" : "None" ++ }, ++ { ++ "enumerant" : "RegisterLimitsINTEL", ++ "value" : 6460, ++ "extensions" : [ "SPV_INTEL_maximum_registers" ], ++ "version" : "None" + } + ] + }, +@@ -16569,6 +16813,18 @@ + } + ] + }, ++ { ++ "category" : "ValueEnum", ++ "kind" : "NamedMaximumNumberOfRegisters", ++ "enumerants" : [ ++ { ++ "enumerant" : "AutoINTEL", ++ "value" : 0, ++ "capabilities" : [ "RegisterLimitsINTEL" ], ++ "version" : "None" ++ } ++ ] ++ }, + { + "category" : "Id", + "kind" : "IdResultType", +diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs +index 686a588..8d85cce 100644 +--- a/include/spirv/unified1/spirv.cs ++++ b/include/spirv/unified1/spirv.cs +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2020 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +@@ -69,6 +69,7 @@ namespace Spv + NZSL = 9, + WGSL = 10, + Slang = 11, ++ Zig = 12, + } + + public enum ExecutionModel +@@ -179,6 +180,8 @@ namespace Spv + StencilRefUnchangedBackAMD = 5082, + StencilRefGreaterBackAMD = 5083, + StencilRefLessBackAMD = 5084, ++ QuadDerivativesKHR = 5088, ++ RequireFullQuadsKHR = 5089, + OutputLinesEXT = 5269, + OutputLinesNV = 5269, + OutputPrimitivesEXT = 5270, +@@ -203,9 +206,14 @@ namespace Spv + NoGlobalOffsetINTEL = 5895, + NumSIMDWorkitemsINTEL = 5896, + SchedulerTargetFmaxMhzINTEL = 5903, ++ MaximallyReconvergesKHR = 6023, ++ FPFastMathDefault = 6028, + StreamingInterfaceINTEL = 6154, + RegisterMapInterfaceINTEL = 6160, + NamedBarrierCountINTEL = 6417, ++ MaximumRegistersINTEL = 6461, ++ MaximumRegistersIdINTEL = 6462, ++ NamedMaximumRegistersINTEL = 6463, + } + + public enum StorageClass +@@ -423,8 +431,11 @@ namespace Spv + NSZ = 2, + AllowRecip = 3, + Fast = 4, ++ AllowContract = 16, + AllowContractFastINTEL = 16, ++ AllowReassoc = 17, + AllowReassocINTEL = 17, ++ AllowTransform = 18, + } + + public enum FPFastMathModeMask +@@ -435,8 +446,11 @@ namespace Spv + NSZ = 0x00000004, + AllowRecip = 0x00000008, + Fast = 0x00000010, ++ AllowContract = 0x00010000, + AllowContractFastINTEL = 0x00010000, ++ AllowReassoc = 0x00020000, + AllowReassocINTEL = 0x00020000, ++ AllowTransform = 0x00040000, + } + + public enum FPRoundingMode +@@ -527,6 +541,7 @@ namespace Spv + NoUnsignedWrap = 4470, + WeightTextureQCOM = 4487, + BlockMatchTextureQCOM = 4488, ++ BlockMatchSamplerQCOM = 4499, + ExplicitInterpAMD = 4999, + NodeSharesPayloadLimitsWithAMDX = 5019, + NodeMaxPayloadsAMDX = 5020, +@@ -1068,6 +1083,7 @@ namespace Spv + TextureSampleWeightedQCOM = 4484, + TextureBoxFilterQCOM = 4485, + TextureBlockMatchQCOM = 4486, ++ TextureBlockMatch2QCOM = 4498, + Float16ImageAMD = 5008, + ImageGatherBiasLodAMD = 5009, + FragmentMaskAMD = 5010, +@@ -1076,6 +1092,7 @@ namespace Spv + Int64ImageEXT = 5016, + ShaderClockKHR = 5055, + ShaderEnqueueAMDX = 5067, ++ QuadControlKHR = 5087, + SampleMaskOverrideCoverageNV = 5249, + GeometryShaderPassthroughNV = 5251, + ShaderViewportIndexLayerEXT = 5254, +@@ -1140,7 +1157,9 @@ namespace Spv + ShaderInvocationReorderNV = 5383, + BindlessTextureNV = 5390, + RayQueryPositionFetchKHR = 5391, ++ AtomicFloat16VectorNV = 5404, + RayTracingDisplacementMicromapNV = 5409, ++ RawAccessChainsNV = 5414, + SubgroupShuffleINTEL = 5568, + SubgroupBufferBlockIOINTEL = 5569, + SubgroupImageBlockIOINTEL = 5570, +@@ -1195,6 +1214,7 @@ namespace Spv + CooperativeMatrixKHR = 6022, + BitInstructions = 6025, + GroupNonUniformRotateKHR = 6026, ++ FloatControls2 = 6029, + AtomicFloat32AddEXT = 6033, + AtomicFloat64AddEXT = 6034, + LongCompositesINTEL = 6089, +@@ -1211,7 +1231,9 @@ namespace Spv + GlobalVariableHostAccessINTEL = 6187, + GlobalVariableFPGADecorationsINTEL = 6189, + GroupUniformArithmeticKHR = 6400, ++ MaskedGatherScatterINTEL = 6427, + CacheControlsINTEL = 6441, ++ RegisterLimitsINTEL = 6460, + } + + public enum RayFlagsShift +@@ -1382,6 +1404,24 @@ namespace Spv + StreamingINTEL = 3, + } + ++ public enum NamedMaximumNumberOfRegisters ++ { ++ AutoINTEL = 0, ++ } ++ ++ public enum RawAccessChainOperandsShift ++ { ++ RobustnessPerComponentNV = 0, ++ RobustnessPerElementNV = 1, ++ } ++ ++ public enum RawAccessChainOperandsMask ++ { ++ MaskNone = 0, ++ RobustnessPerComponentNV = 0x00000001, ++ RobustnessPerElementNV = 0x00000002, ++ } ++ + public enum Op + { + OpNop = 0, +@@ -1772,6 +1812,10 @@ namespace Spv + OpImageBoxFilterQCOM = 4481, + OpImageBlockMatchSSDQCOM = 4482, + OpImageBlockMatchSADQCOM = 4483, ++ OpImageBlockMatchWindowSSDQCOM = 4500, ++ OpImageBlockMatchWindowSADQCOM = 4501, ++ OpImageBlockMatchGatherSSDQCOM = 4502, ++ OpImageBlockMatchGatherSADQCOM = 4503, + OpGroupIAddNonUniformAMD = 5000, + OpGroupFAddNonUniformAMD = 5001, + OpGroupFMinNonUniformAMD = 5002, +@@ -1786,6 +1830,8 @@ namespace Spv + OpFinalizeNodePayloadsAMDX = 5075, + OpFinishWritingNodePayloadAMDX = 5078, + OpInitializeNodePayloadsAMDX = 5090, ++ OpGroupNonUniformQuadAllKHR = 5110, ++ OpGroupNonUniformQuadAnyKHR = 5111, + OpHitObjectRecordHitMotionNV = 5249, + OpHitObjectRecordHitWithIndexMotionNV = 5250, + OpHitObjectRecordMissMotionNV = 5251, +@@ -1854,6 +1900,7 @@ namespace Spv + OpConvertUToSampledImageNV = 5395, + OpConvertSampledImageToUNV = 5396, + OpSamplerImageAddressingModeNV = 5397, ++ OpRawAccessChainNV = 5398, + OpSubgroupShuffleINTEL = 5571, + OpSubgroupShuffleDownINTEL = 5572, + OpSubgroupShuffleUpINTEL = 5573, +@@ -2108,6 +2155,8 @@ namespace Spv + OpGroupLogicalAndKHR = 6406, + OpGroupLogicalOrKHR = 6407, + OpGroupLogicalXorKHR = 6408, ++ OpMaskedGatherINTEL = 6428, ++ OpMaskedScatterINTEL = 6429, + } + } + } +diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h +index 58b1932..e544a85 100644 +--- a/include/spirv/unified1/spirv.h ++++ b/include/spirv/unified1/spirv.h +@@ -1,5 +1,5 @@ + /* +-** Copyright (c) 2014-2020 The Khronos Group Inc. ++** Copyright (c) 2014-2024 The Khronos Group Inc. + ** + ** Permission is hereby granted, free of charge, to any person obtaining a copy + ** of this software and/or associated documentation files (the "Materials"), +@@ -77,6 +77,7 @@ typedef enum SpvSourceLanguage_ { + SpvSourceLanguageNZSL = 9, + SpvSourceLanguageWGSL = 10, + SpvSourceLanguageSlang = 11, ++ SpvSourceLanguageZig = 12, + SpvSourceLanguageMax = 0x7fffffff, + } SpvSourceLanguage; + +@@ -187,6 +188,8 @@ typedef enum SpvExecutionMode_ { + SpvExecutionModeStencilRefUnchangedBackAMD = 5082, + SpvExecutionModeStencilRefGreaterBackAMD = 5083, + SpvExecutionModeStencilRefLessBackAMD = 5084, ++ SpvExecutionModeQuadDerivativesKHR = 5088, ++ SpvExecutionModeRequireFullQuadsKHR = 5089, + SpvExecutionModeOutputLinesEXT = 5269, + SpvExecutionModeOutputLinesNV = 5269, + SpvExecutionModeOutputPrimitivesEXT = 5270, +@@ -211,9 +214,14 @@ typedef enum SpvExecutionMode_ { + SpvExecutionModeNoGlobalOffsetINTEL = 5895, + SpvExecutionModeNumSIMDWorkitemsINTEL = 5896, + SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, ++ SpvExecutionModeMaximallyReconvergesKHR = 6023, ++ SpvExecutionModeFPFastMathDefault = 6028, + SpvExecutionModeStreamingInterfaceINTEL = 6154, + SpvExecutionModeRegisterMapInterfaceINTEL = 6160, + SpvExecutionModeNamedBarrierCountINTEL = 6417, ++ SpvExecutionModeMaximumRegistersINTEL = 6461, ++ SpvExecutionModeMaximumRegistersIdINTEL = 6462, ++ SpvExecutionModeNamedMaximumRegistersINTEL = 6463, + SpvExecutionModeMax = 0x7fffffff, + } SpvExecutionMode; + +@@ -430,8 +438,11 @@ typedef enum SpvFPFastMathModeShift_ { + SpvFPFastMathModeNSZShift = 2, + SpvFPFastMathModeAllowRecipShift = 3, + SpvFPFastMathModeFastShift = 4, ++ SpvFPFastMathModeAllowContractShift = 16, + SpvFPFastMathModeAllowContractFastINTELShift = 16, ++ SpvFPFastMathModeAllowReassocShift = 17, + SpvFPFastMathModeAllowReassocINTELShift = 17, ++ SpvFPFastMathModeAllowTransformShift = 18, + SpvFPFastMathModeMax = 0x7fffffff, + } SpvFPFastMathModeShift; + +@@ -442,8 +453,11 @@ typedef enum SpvFPFastMathModeMask_ { + SpvFPFastMathModeNSZMask = 0x00000004, + SpvFPFastMathModeAllowRecipMask = 0x00000008, + SpvFPFastMathModeFastMask = 0x00000010, ++ SpvFPFastMathModeAllowContractMask = 0x00010000, + SpvFPFastMathModeAllowContractFastINTELMask = 0x00010000, ++ SpvFPFastMathModeAllowReassocMask = 0x00020000, + SpvFPFastMathModeAllowReassocINTELMask = 0x00020000, ++ SpvFPFastMathModeAllowTransformMask = 0x00040000, + } SpvFPFastMathModeMask; + + typedef enum SpvFPRoundingMode_ { +@@ -533,6 +547,7 @@ typedef enum SpvDecoration_ { + SpvDecorationNoUnsignedWrap = 4470, + SpvDecorationWeightTextureQCOM = 4487, + SpvDecorationBlockMatchTextureQCOM = 4488, ++ SpvDecorationBlockMatchSamplerQCOM = 4499, + SpvDecorationExplicitInterpAMD = 4999, + SpvDecorationNodeSharesPayloadLimitsWithAMDX = 5019, + SpvDecorationNodeMaxPayloadsAMDX = 5020, +@@ -1068,6 +1083,7 @@ typedef enum SpvCapability_ { + SpvCapabilityTextureSampleWeightedQCOM = 4484, + SpvCapabilityTextureBoxFilterQCOM = 4485, + SpvCapabilityTextureBlockMatchQCOM = 4486, ++ SpvCapabilityTextureBlockMatch2QCOM = 4498, + SpvCapabilityFloat16ImageAMD = 5008, + SpvCapabilityImageGatherBiasLodAMD = 5009, + SpvCapabilityFragmentMaskAMD = 5010, +@@ -1076,6 +1092,7 @@ typedef enum SpvCapability_ { + SpvCapabilityInt64ImageEXT = 5016, + SpvCapabilityShaderClockKHR = 5055, + SpvCapabilityShaderEnqueueAMDX = 5067, ++ SpvCapabilityQuadControlKHR = 5087, + SpvCapabilitySampleMaskOverrideCoverageNV = 5249, + SpvCapabilityGeometryShaderPassthroughNV = 5251, + SpvCapabilityShaderViewportIndexLayerEXT = 5254, +@@ -1140,7 +1157,9 @@ typedef enum SpvCapability_ { + SpvCapabilityShaderInvocationReorderNV = 5383, + SpvCapabilityBindlessTextureNV = 5390, + SpvCapabilityRayQueryPositionFetchKHR = 5391, ++ SpvCapabilityAtomicFloat16VectorNV = 5404, + SpvCapabilityRayTracingDisplacementMicromapNV = 5409, ++ SpvCapabilityRawAccessChainsNV = 5414, + SpvCapabilitySubgroupShuffleINTEL = 5568, + SpvCapabilitySubgroupBufferBlockIOINTEL = 5569, + SpvCapabilitySubgroupImageBlockIOINTEL = 5570, +@@ -1195,6 +1214,7 @@ typedef enum SpvCapability_ { + SpvCapabilityCooperativeMatrixKHR = 6022, + SpvCapabilityBitInstructions = 6025, + SpvCapabilityGroupNonUniformRotateKHR = 6026, ++ SpvCapabilityFloatControls2 = 6029, + SpvCapabilityAtomicFloat32AddEXT = 6033, + SpvCapabilityAtomicFloat64AddEXT = 6034, + SpvCapabilityLongCompositesINTEL = 6089, +@@ -1211,7 +1231,9 @@ typedef enum SpvCapability_ { + SpvCapabilityGlobalVariableHostAccessINTEL = 6187, + SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6189, + SpvCapabilityGroupUniformArithmeticKHR = 6400, ++ SpvCapabilityMaskedGatherScatterINTEL = 6427, + SpvCapabilityCacheControlsINTEL = 6441, ++ SpvCapabilityRegisterLimitsINTEL = 6460, + SpvCapabilityMax = 0x7fffffff, + } SpvCapability; + +@@ -1380,6 +1402,23 @@ typedef enum SpvStoreCacheControl_ { + SpvStoreCacheControlMax = 0x7fffffff, + } SpvStoreCacheControl; + ++typedef enum SpvNamedMaximumNumberOfRegisters_ { ++ SpvNamedMaximumNumberOfRegistersAutoINTEL = 0, ++ SpvNamedMaximumNumberOfRegistersMax = 0x7fffffff, ++} SpvNamedMaximumNumberOfRegisters; ++ ++typedef enum SpvRawAccessChainOperandsShift_ { ++ SpvRawAccessChainOperandsRobustnessPerComponentNVShift = 0, ++ SpvRawAccessChainOperandsRobustnessPerElementNVShift = 1, ++ SpvRawAccessChainOperandsMax = 0x7fffffff, ++} SpvRawAccessChainOperandsShift; ++ ++typedef enum SpvRawAccessChainOperandsMask_ { ++ SpvRawAccessChainOperandsMaskNone = 0, ++ SpvRawAccessChainOperandsRobustnessPerComponentNVMask = 0x00000001, ++ SpvRawAccessChainOperandsRobustnessPerElementNVMask = 0x00000002, ++} SpvRawAccessChainOperandsMask; ++ + typedef enum SpvOp_ { + SpvOpNop = 0, + SpvOpUndef = 1, +@@ -1769,6 +1808,10 @@ typedef enum SpvOp_ { + SpvOpImageBoxFilterQCOM = 4481, + SpvOpImageBlockMatchSSDQCOM = 4482, + SpvOpImageBlockMatchSADQCOM = 4483, ++ SpvOpImageBlockMatchWindowSSDQCOM = 4500, ++ SpvOpImageBlockMatchWindowSADQCOM = 4501, ++ SpvOpImageBlockMatchGatherSSDQCOM = 4502, ++ SpvOpImageBlockMatchGatherSADQCOM = 4503, + SpvOpGroupIAddNonUniformAMD = 5000, + SpvOpGroupFAddNonUniformAMD = 5001, + SpvOpGroupFMinNonUniformAMD = 5002, +@@ -1783,6 +1826,8 @@ typedef enum SpvOp_ { + SpvOpFinalizeNodePayloadsAMDX = 5075, + SpvOpFinishWritingNodePayloadAMDX = 5078, + SpvOpInitializeNodePayloadsAMDX = 5090, ++ SpvOpGroupNonUniformQuadAllKHR = 5110, ++ SpvOpGroupNonUniformQuadAnyKHR = 5111, + SpvOpHitObjectRecordHitMotionNV = 5249, + SpvOpHitObjectRecordHitWithIndexMotionNV = 5250, + SpvOpHitObjectRecordMissMotionNV = 5251, +@@ -1851,6 +1896,7 @@ typedef enum SpvOp_ { + SpvOpConvertUToSampledImageNV = 5395, + SpvOpConvertSampledImageToUNV = 5396, + SpvOpSamplerImageAddressingModeNV = 5397, ++ SpvOpRawAccessChainNV = 5398, + SpvOpSubgroupShuffleINTEL = 5571, + SpvOpSubgroupShuffleDownINTEL = 5572, + SpvOpSubgroupShuffleUpINTEL = 5573, +@@ -2105,6 +2151,8 @@ typedef enum SpvOp_ { + SpvOpGroupLogicalAndKHR = 6406, + SpvOpGroupLogicalOrKHR = 6407, + SpvOpGroupLogicalXorKHR = 6408, ++ SpvOpMaskedGatherINTEL = 6428, ++ SpvOpMaskedScatterINTEL = 6429, + SpvOpMax = 0x7fffffff, + } SpvOp; + +@@ -2498,6 +2546,10 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy + case SpvOpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break; + case SpvOpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break; + case SpvOpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break; ++ case SpvOpImageBlockMatchWindowSSDQCOM: *hasResult = true; *hasResultType = true; break; ++ case SpvOpImageBlockMatchWindowSADQCOM: *hasResult = true; *hasResultType = true; break; ++ case SpvOpImageBlockMatchGatherSSDQCOM: *hasResult = true; *hasResultType = true; break; ++ case SpvOpImageBlockMatchGatherSADQCOM: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; +@@ -2512,6 +2564,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy + case SpvOpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; + case SpvOpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break; + case SpvOpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; ++ case SpvOpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break; ++ case SpvOpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break; + case SpvOpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break; + case SpvOpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break; +@@ -2577,6 +2631,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy + case SpvOpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break; + case SpvOpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break; + case SpvOpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break; ++ case SpvOpRawAccessChainNV: *hasResult = true; *hasResultType = true; break; + case SpvOpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break; + case SpvOpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break; + case SpvOpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break; +@@ -2829,6 +2884,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy + case SpvOpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break; ++ case SpvOpMaskedGatherINTEL: *hasResult = true; *hasResultType = true; break; ++ case SpvOpMaskedScatterINTEL: *hasResult = false; *hasResultType = false; break; + } + } + #endif /* SPV_ENABLE_UTILITY_CODE */ +diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp +index 188e2f1..a383739 100644 +--- a/include/spirv/unified1/spirv.hpp ++++ b/include/spirv/unified1/spirv.hpp +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2020 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +@@ -73,6 +73,7 @@ enum SourceLanguage { + SourceLanguageNZSL = 9, + SourceLanguageWGSL = 10, + SourceLanguageSlang = 11, ++ SourceLanguageZig = 12, + SourceLanguageMax = 0x7fffffff, + }; + +@@ -183,6 +184,8 @@ enum ExecutionMode { + ExecutionModeStencilRefUnchangedBackAMD = 5082, + ExecutionModeStencilRefGreaterBackAMD = 5083, + ExecutionModeStencilRefLessBackAMD = 5084, ++ ExecutionModeQuadDerivativesKHR = 5088, ++ ExecutionModeRequireFullQuadsKHR = 5089, + ExecutionModeOutputLinesEXT = 5269, + ExecutionModeOutputLinesNV = 5269, + ExecutionModeOutputPrimitivesEXT = 5270, +@@ -207,9 +210,14 @@ enum ExecutionMode { + ExecutionModeNoGlobalOffsetINTEL = 5895, + ExecutionModeNumSIMDWorkitemsINTEL = 5896, + ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, ++ ExecutionModeMaximallyReconvergesKHR = 6023, ++ ExecutionModeFPFastMathDefault = 6028, + ExecutionModeStreamingInterfaceINTEL = 6154, + ExecutionModeRegisterMapInterfaceINTEL = 6160, + ExecutionModeNamedBarrierCountINTEL = 6417, ++ ExecutionModeMaximumRegistersINTEL = 6461, ++ ExecutionModeMaximumRegistersIdINTEL = 6462, ++ ExecutionModeNamedMaximumRegistersINTEL = 6463, + ExecutionModeMax = 0x7fffffff, + }; + +@@ -426,8 +434,11 @@ enum FPFastMathModeShift { + FPFastMathModeNSZShift = 2, + FPFastMathModeAllowRecipShift = 3, + FPFastMathModeFastShift = 4, ++ FPFastMathModeAllowContractShift = 16, + FPFastMathModeAllowContractFastINTELShift = 16, ++ FPFastMathModeAllowReassocShift = 17, + FPFastMathModeAllowReassocINTELShift = 17, ++ FPFastMathModeAllowTransformShift = 18, + FPFastMathModeMax = 0x7fffffff, + }; + +@@ -438,8 +449,11 @@ enum FPFastMathModeMask { + FPFastMathModeNSZMask = 0x00000004, + FPFastMathModeAllowRecipMask = 0x00000008, + FPFastMathModeFastMask = 0x00000010, ++ FPFastMathModeAllowContractMask = 0x00010000, + FPFastMathModeAllowContractFastINTELMask = 0x00010000, ++ FPFastMathModeAllowReassocMask = 0x00020000, + FPFastMathModeAllowReassocINTELMask = 0x00020000, ++ FPFastMathModeAllowTransformMask = 0x00040000, + }; + + enum FPRoundingMode { +@@ -529,6 +543,7 @@ enum Decoration { + DecorationNoUnsignedWrap = 4470, + DecorationWeightTextureQCOM = 4487, + DecorationBlockMatchTextureQCOM = 4488, ++ DecorationBlockMatchSamplerQCOM = 4499, + DecorationExplicitInterpAMD = 4999, + DecorationNodeSharesPayloadLimitsWithAMDX = 5019, + DecorationNodeMaxPayloadsAMDX = 5020, +@@ -1064,6 +1079,7 @@ enum Capability { + CapabilityTextureSampleWeightedQCOM = 4484, + CapabilityTextureBoxFilterQCOM = 4485, + CapabilityTextureBlockMatchQCOM = 4486, ++ CapabilityTextureBlockMatch2QCOM = 4498, + CapabilityFloat16ImageAMD = 5008, + CapabilityImageGatherBiasLodAMD = 5009, + CapabilityFragmentMaskAMD = 5010, +@@ -1072,6 +1088,7 @@ enum Capability { + CapabilityInt64ImageEXT = 5016, + CapabilityShaderClockKHR = 5055, + CapabilityShaderEnqueueAMDX = 5067, ++ CapabilityQuadControlKHR = 5087, + CapabilitySampleMaskOverrideCoverageNV = 5249, + CapabilityGeometryShaderPassthroughNV = 5251, + CapabilityShaderViewportIndexLayerEXT = 5254, +@@ -1136,7 +1153,9 @@ enum Capability { + CapabilityShaderInvocationReorderNV = 5383, + CapabilityBindlessTextureNV = 5390, + CapabilityRayQueryPositionFetchKHR = 5391, ++ CapabilityAtomicFloat16VectorNV = 5404, + CapabilityRayTracingDisplacementMicromapNV = 5409, ++ CapabilityRawAccessChainsNV = 5414, + CapabilitySubgroupShuffleINTEL = 5568, + CapabilitySubgroupBufferBlockIOINTEL = 5569, + CapabilitySubgroupImageBlockIOINTEL = 5570, +@@ -1191,6 +1210,7 @@ enum Capability { + CapabilityCooperativeMatrixKHR = 6022, + CapabilityBitInstructions = 6025, + CapabilityGroupNonUniformRotateKHR = 6026, ++ CapabilityFloatControls2 = 6029, + CapabilityAtomicFloat32AddEXT = 6033, + CapabilityAtomicFloat64AddEXT = 6034, + CapabilityLongCompositesINTEL = 6089, +@@ -1207,7 +1227,9 @@ enum Capability { + CapabilityGlobalVariableHostAccessINTEL = 6187, + CapabilityGlobalVariableFPGADecorationsINTEL = 6189, + CapabilityGroupUniformArithmeticKHR = 6400, ++ CapabilityMaskedGatherScatterINTEL = 6427, + CapabilityCacheControlsINTEL = 6441, ++ CapabilityRegisterLimitsINTEL = 6460, + CapabilityMax = 0x7fffffff, + }; + +@@ -1376,6 +1398,23 @@ enum StoreCacheControl { + StoreCacheControlMax = 0x7fffffff, + }; + ++enum NamedMaximumNumberOfRegisters { ++ NamedMaximumNumberOfRegistersAutoINTEL = 0, ++ NamedMaximumNumberOfRegistersMax = 0x7fffffff, ++}; ++ ++enum RawAccessChainOperandsShift { ++ RawAccessChainOperandsRobustnessPerComponentNVShift = 0, ++ RawAccessChainOperandsRobustnessPerElementNVShift = 1, ++ RawAccessChainOperandsMax = 0x7fffffff, ++}; ++ ++enum RawAccessChainOperandsMask { ++ RawAccessChainOperandsMaskNone = 0, ++ RawAccessChainOperandsRobustnessPerComponentNVMask = 0x00000001, ++ RawAccessChainOperandsRobustnessPerElementNVMask = 0x00000002, ++}; ++ + enum Op { + OpNop = 0, + OpUndef = 1, +@@ -1765,6 +1804,10 @@ enum Op { + OpImageBoxFilterQCOM = 4481, + OpImageBlockMatchSSDQCOM = 4482, + OpImageBlockMatchSADQCOM = 4483, ++ OpImageBlockMatchWindowSSDQCOM = 4500, ++ OpImageBlockMatchWindowSADQCOM = 4501, ++ OpImageBlockMatchGatherSSDQCOM = 4502, ++ OpImageBlockMatchGatherSADQCOM = 4503, + OpGroupIAddNonUniformAMD = 5000, + OpGroupFAddNonUniformAMD = 5001, + OpGroupFMinNonUniformAMD = 5002, +@@ -1779,6 +1822,8 @@ enum Op { + OpFinalizeNodePayloadsAMDX = 5075, + OpFinishWritingNodePayloadAMDX = 5078, + OpInitializeNodePayloadsAMDX = 5090, ++ OpGroupNonUniformQuadAllKHR = 5110, ++ OpGroupNonUniformQuadAnyKHR = 5111, + OpHitObjectRecordHitMotionNV = 5249, + OpHitObjectRecordHitWithIndexMotionNV = 5250, + OpHitObjectRecordMissMotionNV = 5251, +@@ -1847,6 +1892,7 @@ enum Op { + OpConvertUToSampledImageNV = 5395, + OpConvertSampledImageToUNV = 5396, + OpSamplerImageAddressingModeNV = 5397, ++ OpRawAccessChainNV = 5398, + OpSubgroupShuffleINTEL = 5571, + OpSubgroupShuffleDownINTEL = 5572, + OpSubgroupShuffleUpINTEL = 5573, +@@ -2101,6 +2147,8 @@ enum Op { + OpGroupLogicalAndKHR = 6406, + OpGroupLogicalOrKHR = 6407, + OpGroupLogicalXorKHR = 6408, ++ OpMaskedGatherINTEL = 6428, ++ OpMaskedScatterINTEL = 6429, + OpMax = 0x7fffffff, + }; + +@@ -2494,6 +2542,10 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case OpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break; + case OpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break; + case OpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break; ++ case OpImageBlockMatchWindowSSDQCOM: *hasResult = true; *hasResultType = true; break; ++ case OpImageBlockMatchWindowSADQCOM: *hasResult = true; *hasResultType = true; break; ++ case OpImageBlockMatchGatherSSDQCOM: *hasResult = true; *hasResultType = true; break; ++ case OpImageBlockMatchGatherSADQCOM: *hasResult = true; *hasResultType = true; break; + case OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; + case OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; + case OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; +@@ -2508,6 +2560,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; + case OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break; + case OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; ++ case OpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break; ++ case OpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break; + case OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break; + case OpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break; + case OpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break; +@@ -2573,6 +2627,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break; + case OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break; + case OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break; ++ case OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break; + case OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break; + case OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break; + case OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break; +@@ -2825,6 +2880,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break; + case OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break; + case OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break; ++ case OpMaskedGatherINTEL: *hasResult = true; *hasResultType = true; break; ++ case OpMaskedScatterINTEL: *hasResult = false; *hasResultType = false; break; + } + } + #endif /* SPV_ENABLE_UTILITY_CODE */ +@@ -2875,6 +2932,10 @@ inline CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask a, + inline CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); } + inline CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); } + inline CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); } ++inline RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); } ++inline RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); } ++inline RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); } ++inline RawAccessChainOperandsMask operator~(RawAccessChainOperandsMask a) { return RawAccessChainOperandsMask(~unsigned(a)); } + + } // end namespace spv + +diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11 +index cc2590c..d6b4fb7 100644 +--- a/include/spirv/unified1/spirv.hpp11 ++++ b/include/spirv/unified1/spirv.hpp11 +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2020 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +@@ -73,6 +73,7 @@ enum class SourceLanguage : unsigned { + NZSL = 9, + WGSL = 10, + Slang = 11, ++ Zig = 12, + Max = 0x7fffffff, + }; + +@@ -183,6 +184,8 @@ enum class ExecutionMode : unsigned { + StencilRefUnchangedBackAMD = 5082, + StencilRefGreaterBackAMD = 5083, + StencilRefLessBackAMD = 5084, ++ QuadDerivativesKHR = 5088, ++ RequireFullQuadsKHR = 5089, + OutputLinesEXT = 5269, + OutputLinesNV = 5269, + OutputPrimitivesEXT = 5270, +@@ -207,9 +210,14 @@ enum class ExecutionMode : unsigned { + NoGlobalOffsetINTEL = 5895, + NumSIMDWorkitemsINTEL = 5896, + SchedulerTargetFmaxMhzINTEL = 5903, ++ MaximallyReconvergesKHR = 6023, ++ FPFastMathDefault = 6028, + StreamingInterfaceINTEL = 6154, + RegisterMapInterfaceINTEL = 6160, + NamedBarrierCountINTEL = 6417, ++ MaximumRegistersINTEL = 6461, ++ MaximumRegistersIdINTEL = 6462, ++ NamedMaximumRegistersINTEL = 6463, + Max = 0x7fffffff, + }; + +@@ -426,8 +434,11 @@ enum class FPFastMathModeShift : unsigned { + NSZ = 2, + AllowRecip = 3, + Fast = 4, ++ AllowContract = 16, + AllowContractFastINTEL = 16, ++ AllowReassoc = 17, + AllowReassocINTEL = 17, ++ AllowTransform = 18, + Max = 0x7fffffff, + }; + +@@ -438,8 +449,11 @@ enum class FPFastMathModeMask : unsigned { + NSZ = 0x00000004, + AllowRecip = 0x00000008, + Fast = 0x00000010, ++ AllowContract = 0x00010000, + AllowContractFastINTEL = 0x00010000, ++ AllowReassoc = 0x00020000, + AllowReassocINTEL = 0x00020000, ++ AllowTransform = 0x00040000, + }; + + enum class FPRoundingMode : unsigned { +@@ -529,6 +543,7 @@ enum class Decoration : unsigned { + NoUnsignedWrap = 4470, + WeightTextureQCOM = 4487, + BlockMatchTextureQCOM = 4488, ++ BlockMatchSamplerQCOM = 4499, + ExplicitInterpAMD = 4999, + NodeSharesPayloadLimitsWithAMDX = 5019, + NodeMaxPayloadsAMDX = 5020, +@@ -1064,6 +1079,7 @@ enum class Capability : unsigned { + TextureSampleWeightedQCOM = 4484, + TextureBoxFilterQCOM = 4485, + TextureBlockMatchQCOM = 4486, ++ TextureBlockMatch2QCOM = 4498, + Float16ImageAMD = 5008, + ImageGatherBiasLodAMD = 5009, + FragmentMaskAMD = 5010, +@@ -1072,6 +1088,7 @@ enum class Capability : unsigned { + Int64ImageEXT = 5016, + ShaderClockKHR = 5055, + ShaderEnqueueAMDX = 5067, ++ QuadControlKHR = 5087, + SampleMaskOverrideCoverageNV = 5249, + GeometryShaderPassthroughNV = 5251, + ShaderViewportIndexLayerEXT = 5254, +@@ -1136,7 +1153,9 @@ enum class Capability : unsigned { + ShaderInvocationReorderNV = 5383, + BindlessTextureNV = 5390, + RayQueryPositionFetchKHR = 5391, ++ AtomicFloat16VectorNV = 5404, + RayTracingDisplacementMicromapNV = 5409, ++ RawAccessChainsNV = 5414, + SubgroupShuffleINTEL = 5568, + SubgroupBufferBlockIOINTEL = 5569, + SubgroupImageBlockIOINTEL = 5570, +@@ -1191,6 +1210,7 @@ enum class Capability : unsigned { + CooperativeMatrixKHR = 6022, + BitInstructions = 6025, + GroupNonUniformRotateKHR = 6026, ++ FloatControls2 = 6029, + AtomicFloat32AddEXT = 6033, + AtomicFloat64AddEXT = 6034, + LongCompositesINTEL = 6089, +@@ -1207,7 +1227,9 @@ enum class Capability : unsigned { + GlobalVariableHostAccessINTEL = 6187, + GlobalVariableFPGADecorationsINTEL = 6189, + GroupUniformArithmeticKHR = 6400, ++ MaskedGatherScatterINTEL = 6427, + CacheControlsINTEL = 6441, ++ RegisterLimitsINTEL = 6460, + Max = 0x7fffffff, + }; + +@@ -1376,6 +1398,23 @@ enum class StoreCacheControl : unsigned { + Max = 0x7fffffff, + }; + ++enum class NamedMaximumNumberOfRegisters : unsigned { ++ AutoINTEL = 0, ++ Max = 0x7fffffff, ++}; ++ ++enum class RawAccessChainOperandsShift : unsigned { ++ RobustnessPerComponentNV = 0, ++ RobustnessPerElementNV = 1, ++ Max = 0x7fffffff, ++}; ++ ++enum class RawAccessChainOperandsMask : unsigned { ++ MaskNone = 0, ++ RobustnessPerComponentNV = 0x00000001, ++ RobustnessPerElementNV = 0x00000002, ++}; ++ + enum class Op : unsigned { + OpNop = 0, + OpUndef = 1, +@@ -1765,6 +1804,10 @@ enum class Op : unsigned { + OpImageBoxFilterQCOM = 4481, + OpImageBlockMatchSSDQCOM = 4482, + OpImageBlockMatchSADQCOM = 4483, ++ OpImageBlockMatchWindowSSDQCOM = 4500, ++ OpImageBlockMatchWindowSADQCOM = 4501, ++ OpImageBlockMatchGatherSSDQCOM = 4502, ++ OpImageBlockMatchGatherSADQCOM = 4503, + OpGroupIAddNonUniformAMD = 5000, + OpGroupFAddNonUniformAMD = 5001, + OpGroupFMinNonUniformAMD = 5002, +@@ -1779,6 +1822,8 @@ enum class Op : unsigned { + OpFinalizeNodePayloadsAMDX = 5075, + OpFinishWritingNodePayloadAMDX = 5078, + OpInitializeNodePayloadsAMDX = 5090, ++ OpGroupNonUniformQuadAllKHR = 5110, ++ OpGroupNonUniformQuadAnyKHR = 5111, + OpHitObjectRecordHitMotionNV = 5249, + OpHitObjectRecordHitWithIndexMotionNV = 5250, + OpHitObjectRecordMissMotionNV = 5251, +@@ -1847,6 +1892,7 @@ enum class Op : unsigned { + OpConvertUToSampledImageNV = 5395, + OpConvertSampledImageToUNV = 5396, + OpSamplerImageAddressingModeNV = 5397, ++ OpRawAccessChainNV = 5398, + OpSubgroupShuffleINTEL = 5571, + OpSubgroupShuffleDownINTEL = 5572, + OpSubgroupShuffleUpINTEL = 5573, +@@ -2101,6 +2147,8 @@ enum class Op : unsigned { + OpGroupLogicalAndKHR = 6406, + OpGroupLogicalOrKHR = 6407, + OpGroupLogicalXorKHR = 6408, ++ OpMaskedGatherINTEL = 6428, ++ OpMaskedScatterINTEL = 6429, + Max = 0x7fffffff, + }; + +@@ -2494,6 +2542,10 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case Op::OpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break; + case Op::OpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break; + case Op::OpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break; ++ case Op::OpImageBlockMatchWindowSSDQCOM: *hasResult = true; *hasResultType = true; break; ++ case Op::OpImageBlockMatchWindowSADQCOM: *hasResult = true; *hasResultType = true; break; ++ case Op::OpImageBlockMatchGatherSSDQCOM: *hasResult = true; *hasResultType = true; break; ++ case Op::OpImageBlockMatchGatherSADQCOM: *hasResult = true; *hasResultType = true; break; + case Op::OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; + case Op::OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; + case Op::OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; +@@ -2508,6 +2560,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case Op::OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; + case Op::OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break; + case Op::OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; ++ case Op::OpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break; ++ case Op::OpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break; + case Op::OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break; + case Op::OpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break; + case Op::OpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break; +@@ -2573,6 +2627,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case Op::OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break; + case Op::OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break; + case Op::OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break; ++ case Op::OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break; + case Op::OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break; + case Op::OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break; + case Op::OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break; +@@ -2825,6 +2880,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { + case Op::OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break; + case Op::OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break; + case Op::OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break; ++ case Op::OpMaskedGatherINTEL: *hasResult = true; *hasResultType = true; break; ++ case Op::OpMaskedScatterINTEL: *hasResult = false; *hasResultType = false; break; + } + } + #endif /* SPV_ENABLE_UTILITY_CODE */ +@@ -2875,6 +2932,10 @@ constexpr CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask + constexpr CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); } + constexpr CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); } + constexpr CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); } ++constexpr RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); } ++constexpr RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); } ++constexpr RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); } ++constexpr RawAccessChainOperandsMask operator~(RawAccessChainOperandsMask a) { return RawAccessChainOperandsMask(~unsigned(a)); } + + } // end namespace spv + +diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json +index 505db1f..204a9c5 100644 +--- a/include/spirv/unified1/spirv.json ++++ b/include/spirv/unified1/spirv.json +@@ -6,7 +6,7 @@ + "Comment": + [ + [ +- "Copyright (c) 2014-2020 The Khronos Group Inc.", ++ "Copyright (c) 2014-2024 The Khronos Group Inc.", + "", + "Permission is hereby granted, free of charge, to any person obtaining a copy", + "of this software and/or associated documentation files (the \"Materials\"),", +@@ -79,7 +79,8 @@ + "HERO_C": 8, + "NZSL": 9, + "WGSL": 10, +- "Slang": 11 ++ "Slang": 11, ++ "Zig": 12 + } + }, + { +@@ -202,6 +203,8 @@ + "StencilRefUnchangedBackAMD": 5082, + "StencilRefGreaterBackAMD": 5083, + "StencilRefLessBackAMD": 5084, ++ "QuadDerivativesKHR": 5088, ++ "RequireFullQuadsKHR": 5089, + "OutputLinesEXT": 5269, + "OutputLinesNV": 5269, + "OutputPrimitivesEXT": 5270, +@@ -226,9 +229,14 @@ + "NoGlobalOffsetINTEL": 5895, + "NumSIMDWorkitemsINTEL": 5896, + "SchedulerTargetFmaxMhzINTEL": 5903, ++ "MaximallyReconvergesKHR": 6023, ++ "FPFastMathDefault": 6028, + "StreamingInterfaceINTEL": 6154, + "RegisterMapInterfaceINTEL": 6160, +- "NamedBarrierCountINTEL": 6417 ++ "NamedBarrierCountINTEL": 6417, ++ "MaximumRegistersINTEL": 6461, ++ "MaximumRegistersIdINTEL": 6462, ++ "NamedMaximumRegistersINTEL": 6463 + } + }, + { +@@ -448,8 +456,11 @@ + "NSZ": 2, + "AllowRecip": 3, + "Fast": 4, ++ "AllowContract": 16, + "AllowContractFastINTEL": 16, +- "AllowReassocINTEL": 17 ++ "AllowReassoc": 17, ++ "AllowReassocINTEL": 17, ++ "AllowTransform": 18 + } + }, + { +@@ -555,6 +566,7 @@ + "NoUnsignedWrap": 4470, + "WeightTextureQCOM": 4487, + "BlockMatchTextureQCOM": 4488, ++ "BlockMatchSamplerQCOM": 4499, + "ExplicitInterpAMD": 4999, + "NodeSharesPayloadLimitsWithAMDX": 5019, + "NodeMaxPayloadsAMDX": 5020, +@@ -1044,6 +1056,7 @@ + "TextureSampleWeightedQCOM": 4484, + "TextureBoxFilterQCOM": 4485, + "TextureBlockMatchQCOM": 4486, ++ "TextureBlockMatch2QCOM": 4498, + "Float16ImageAMD": 5008, + "ImageGatherBiasLodAMD": 5009, + "FragmentMaskAMD": 5010, +@@ -1052,6 +1065,7 @@ + "Int64ImageEXT": 5016, + "ShaderClockKHR": 5055, + "ShaderEnqueueAMDX": 5067, ++ "QuadControlKHR": 5087, + "SampleMaskOverrideCoverageNV": 5249, + "GeometryShaderPassthroughNV": 5251, + "ShaderViewportIndexLayerEXT": 5254, +@@ -1116,7 +1130,9 @@ + "ShaderInvocationReorderNV": 5383, + "BindlessTextureNV": 5390, + "RayQueryPositionFetchKHR": 5391, ++ "AtomicFloat16VectorNV": 5404, + "RayTracingDisplacementMicromapNV": 5409, ++ "RawAccessChainsNV": 5414, + "SubgroupShuffleINTEL": 5568, + "SubgroupBufferBlockIOINTEL": 5569, + "SubgroupImageBlockIOINTEL": 5570, +@@ -1171,6 +1187,7 @@ + "CooperativeMatrixKHR": 6022, + "BitInstructions": 6025, + "GroupNonUniformRotateKHR": 6026, ++ "FloatControls2": 6029, + "AtomicFloat32AddEXT": 6033, + "AtomicFloat64AddEXT": 6034, + "LongCompositesINTEL": 6089, +@@ -1187,7 +1204,9 @@ + "GlobalVariableHostAccessINTEL": 6187, + "GlobalVariableFPGADecorationsINTEL": 6189, + "GroupUniformArithmeticKHR": 6400, +- "CacheControlsINTEL": 6441 ++ "MaskedGatherScatterINTEL": 6427, ++ "CacheControlsINTEL": 6441, ++ "RegisterLimitsINTEL": 6460 + } + }, + { +@@ -1374,6 +1393,23 @@ + "StreamingINTEL": 3 + } + }, ++ { ++ "Name": "NamedMaximumNumberOfRegisters", ++ "Type": "Value", ++ "Values": ++ { ++ "AutoINTEL": 0 ++ } ++ }, ++ { ++ "Name": "RawAccessChainOperands", ++ "Type": "Bit", ++ "Values": ++ { ++ "RobustnessPerComponentNV": 0, ++ "RobustnessPerElementNV": 1 ++ } ++ }, + { + "Name": "Op", + "Type": "Value", +@@ -1767,6 +1803,10 @@ + "OpImageBoxFilterQCOM": 4481, + "OpImageBlockMatchSSDQCOM": 4482, + "OpImageBlockMatchSADQCOM": 4483, ++ "OpImageBlockMatchWindowSSDQCOM": 4500, ++ "OpImageBlockMatchWindowSADQCOM": 4501, ++ "OpImageBlockMatchGatherSSDQCOM": 4502, ++ "OpImageBlockMatchGatherSADQCOM": 4503, + "OpGroupIAddNonUniformAMD": 5000, + "OpGroupFAddNonUniformAMD": 5001, + "OpGroupFMinNonUniformAMD": 5002, +@@ -1781,6 +1821,8 @@ + "OpFinalizeNodePayloadsAMDX": 5075, + "OpFinishWritingNodePayloadAMDX": 5078, + "OpInitializeNodePayloadsAMDX": 5090, ++ "OpGroupNonUniformQuadAllKHR": 5110, ++ "OpGroupNonUniformQuadAnyKHR": 5111, + "OpHitObjectRecordHitMotionNV": 5249, + "OpHitObjectRecordHitWithIndexMotionNV": 5250, + "OpHitObjectRecordMissMotionNV": 5251, +@@ -1849,6 +1891,7 @@ + "OpConvertUToSampledImageNV": 5395, + "OpConvertSampledImageToUNV": 5396, + "OpSamplerImageAddressingModeNV": 5397, ++ "OpRawAccessChainNV": 5398, + "OpSubgroupShuffleINTEL": 5571, + "OpSubgroupShuffleDownINTEL": 5572, + "OpSubgroupShuffleUpINTEL": 5573, +@@ -2102,7 +2145,9 @@ + "OpGroupBitwiseXorKHR": 6405, + "OpGroupLogicalAndKHR": 6406, + "OpGroupLogicalOrKHR": 6407, +- "OpGroupLogicalXorKHR": 6408 ++ "OpGroupLogicalXorKHR": 6408, ++ "OpMaskedGatherINTEL": 6428, ++ "OpMaskedScatterINTEL": 6429 + } + } + ] +diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua +index fb86460..6dcd1b8 100644 +--- a/include/spirv/unified1/spirv.lua ++++ b/include/spirv/unified1/spirv.lua +@@ -1,4 +1,4 @@ +--- Copyright (c) 2014-2020 The Khronos Group Inc. ++-- Copyright (c) 2014-2024 The Khronos Group Inc. + -- + -- Permission is hereby granted, free of charge, to any person obtaining a copy + -- of this software and/or associated documentation files (the "Materials"), +@@ -64,6 +64,7 @@ spv = { + NZSL = 9, + WGSL = 10, + Slang = 11, ++ Zig = 12, + }, + + ExecutionModel = { +@@ -170,6 +171,8 @@ spv = { + StencilRefUnchangedBackAMD = 5082, + StencilRefGreaterBackAMD = 5083, + StencilRefLessBackAMD = 5084, ++ QuadDerivativesKHR = 5088, ++ RequireFullQuadsKHR = 5089, + OutputLinesEXT = 5269, + OutputLinesNV = 5269, + OutputPrimitivesEXT = 5270, +@@ -194,9 +197,14 @@ spv = { + NoGlobalOffsetINTEL = 5895, + NumSIMDWorkitemsINTEL = 5896, + SchedulerTargetFmaxMhzINTEL = 5903, ++ MaximallyReconvergesKHR = 6023, ++ FPFastMathDefault = 6028, + StreamingInterfaceINTEL = 6154, + RegisterMapInterfaceINTEL = 6160, + NamedBarrierCountINTEL = 6417, ++ MaximumRegistersINTEL = 6461, ++ MaximumRegistersIdINTEL = 6462, ++ NamedMaximumRegistersINTEL = 6463, + }, + + StorageClass = { +@@ -404,8 +412,11 @@ spv = { + NSZ = 2, + AllowRecip = 3, + Fast = 4, ++ AllowContract = 16, + AllowContractFastINTEL = 16, ++ AllowReassoc = 17, + AllowReassocINTEL = 17, ++ AllowTransform = 18, + }, + + FPFastMathModeMask = { +@@ -415,8 +426,11 @@ spv = { + NSZ = 0x00000004, + AllowRecip = 0x00000008, + Fast = 0x00000010, ++ AllowContract = 0x00010000, + AllowContractFastINTEL = 0x00010000, ++ AllowReassoc = 0x00020000, + AllowReassocINTEL = 0x00020000, ++ AllowTransform = 0x00040000, + }, + + FPRoundingMode = { +@@ -502,6 +516,7 @@ spv = { + NoUnsignedWrap = 4470, + WeightTextureQCOM = 4487, + BlockMatchTextureQCOM = 4488, ++ BlockMatchSamplerQCOM = 4499, + ExplicitInterpAMD = 4999, + NodeSharesPayloadLimitsWithAMDX = 5019, + NodeMaxPayloadsAMDX = 5020, +@@ -1026,6 +1041,7 @@ spv = { + TextureSampleWeightedQCOM = 4484, + TextureBoxFilterQCOM = 4485, + TextureBlockMatchQCOM = 4486, ++ TextureBlockMatch2QCOM = 4498, + Float16ImageAMD = 5008, + ImageGatherBiasLodAMD = 5009, + FragmentMaskAMD = 5010, +@@ -1034,6 +1050,7 @@ spv = { + Int64ImageEXT = 5016, + ShaderClockKHR = 5055, + ShaderEnqueueAMDX = 5067, ++ QuadControlKHR = 5087, + SampleMaskOverrideCoverageNV = 5249, + GeometryShaderPassthroughNV = 5251, + ShaderViewportIndexLayerEXT = 5254, +@@ -1098,7 +1115,9 @@ spv = { + ShaderInvocationReorderNV = 5383, + BindlessTextureNV = 5390, + RayQueryPositionFetchKHR = 5391, ++ AtomicFloat16VectorNV = 5404, + RayTracingDisplacementMicromapNV = 5409, ++ RawAccessChainsNV = 5414, + SubgroupShuffleINTEL = 5568, + SubgroupBufferBlockIOINTEL = 5569, + SubgroupImageBlockIOINTEL = 5570, +@@ -1153,6 +1172,7 @@ spv = { + CooperativeMatrixKHR = 6022, + BitInstructions = 6025, + GroupNonUniformRotateKHR = 6026, ++ FloatControls2 = 6029, + AtomicFloat32AddEXT = 6033, + AtomicFloat64AddEXT = 6034, + LongCompositesINTEL = 6089, +@@ -1169,7 +1189,9 @@ spv = { + GlobalVariableHostAccessINTEL = 6187, + GlobalVariableFPGADecorationsINTEL = 6189, + GroupUniformArithmeticKHR = 6400, ++ MaskedGatherScatterINTEL = 6427, + CacheControlsINTEL = 6441, ++ RegisterLimitsINTEL = 6460, + }, + + RayFlagsShift = { +@@ -1320,6 +1342,21 @@ spv = { + StreamingINTEL = 3, + }, + ++ NamedMaximumNumberOfRegisters = { ++ AutoINTEL = 0, ++ }, ++ ++ RawAccessChainOperandsShift = { ++ RobustnessPerComponentNV = 0, ++ RobustnessPerElementNV = 1, ++ }, ++ ++ RawAccessChainOperandsMask = { ++ MaskNone = 0, ++ RobustnessPerComponentNV = 0x00000001, ++ RobustnessPerElementNV = 0x00000002, ++ }, ++ + Op = { + OpNop = 0, + OpUndef = 1, +@@ -1709,6 +1746,10 @@ spv = { + OpImageBoxFilterQCOM = 4481, + OpImageBlockMatchSSDQCOM = 4482, + OpImageBlockMatchSADQCOM = 4483, ++ OpImageBlockMatchWindowSSDQCOM = 4500, ++ OpImageBlockMatchWindowSADQCOM = 4501, ++ OpImageBlockMatchGatherSSDQCOM = 4502, ++ OpImageBlockMatchGatherSADQCOM = 4503, + OpGroupIAddNonUniformAMD = 5000, + OpGroupFAddNonUniformAMD = 5001, + OpGroupFMinNonUniformAMD = 5002, +@@ -1723,6 +1764,8 @@ spv = { + OpFinalizeNodePayloadsAMDX = 5075, + OpFinishWritingNodePayloadAMDX = 5078, + OpInitializeNodePayloadsAMDX = 5090, ++ OpGroupNonUniformQuadAllKHR = 5110, ++ OpGroupNonUniformQuadAnyKHR = 5111, + OpHitObjectRecordHitMotionNV = 5249, + OpHitObjectRecordHitWithIndexMotionNV = 5250, + OpHitObjectRecordMissMotionNV = 5251, +@@ -1791,6 +1834,7 @@ spv = { + OpConvertUToSampledImageNV = 5395, + OpConvertSampledImageToUNV = 5396, + OpSamplerImageAddressingModeNV = 5397, ++ OpRawAccessChainNV = 5398, + OpSubgroupShuffleINTEL = 5571, + OpSubgroupShuffleDownINTEL = 5572, + OpSubgroupShuffleUpINTEL = 5573, +@@ -2045,6 +2089,8 @@ spv = { + OpGroupLogicalAndKHR = 6406, + OpGroupLogicalOrKHR = 6407, + OpGroupLogicalXorKHR = 6408, ++ OpMaskedGatherINTEL = 6428, ++ OpMaskedScatterINTEL = 6429, + }, + + } +diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py +index fd86fae..4b011cf 100644 +--- a/include/spirv/unified1/spirv.py ++++ b/include/spirv/unified1/spirv.py +@@ -1,4 +1,4 @@ +-# Copyright (c) 2014-2020 The Khronos Group Inc. ++# Copyright (c) 2014-2024 The Khronos Group Inc. + # + # Permission is hereby granted, free of charge, to any person obtaining a copy + # of this software and/or associated documentation files (the "Materials"), +@@ -64,6 +64,7 @@ spv = { + 'NZSL' : 9, + 'WGSL' : 10, + 'Slang' : 11, ++ 'Zig' : 12, + }, + + 'ExecutionModel' : { +@@ -170,6 +171,8 @@ spv = { + 'StencilRefUnchangedBackAMD' : 5082, + 'StencilRefGreaterBackAMD' : 5083, + 'StencilRefLessBackAMD' : 5084, ++ 'QuadDerivativesKHR' : 5088, ++ 'RequireFullQuadsKHR' : 5089, + 'OutputLinesEXT' : 5269, + 'OutputLinesNV' : 5269, + 'OutputPrimitivesEXT' : 5270, +@@ -194,9 +197,14 @@ spv = { + 'NoGlobalOffsetINTEL' : 5895, + 'NumSIMDWorkitemsINTEL' : 5896, + 'SchedulerTargetFmaxMhzINTEL' : 5903, ++ 'MaximallyReconvergesKHR' : 6023, ++ 'FPFastMathDefault' : 6028, + 'StreamingInterfaceINTEL' : 6154, + 'RegisterMapInterfaceINTEL' : 6160, + 'NamedBarrierCountINTEL' : 6417, ++ 'MaximumRegistersINTEL' : 6461, ++ 'MaximumRegistersIdINTEL' : 6462, ++ 'NamedMaximumRegistersINTEL' : 6463, + }, + + 'StorageClass' : { +@@ -404,8 +412,11 @@ spv = { + 'NSZ' : 2, + 'AllowRecip' : 3, + 'Fast' : 4, ++ 'AllowContract' : 16, + 'AllowContractFastINTEL' : 16, ++ 'AllowReassoc' : 17, + 'AllowReassocINTEL' : 17, ++ 'AllowTransform' : 18, + }, + + 'FPFastMathModeMask' : { +@@ -415,8 +426,11 @@ spv = { + 'NSZ' : 0x00000004, + 'AllowRecip' : 0x00000008, + 'Fast' : 0x00000010, ++ 'AllowContract' : 0x00010000, + 'AllowContractFastINTEL' : 0x00010000, ++ 'AllowReassoc' : 0x00020000, + 'AllowReassocINTEL' : 0x00020000, ++ 'AllowTransform' : 0x00040000, + }, + + 'FPRoundingMode' : { +@@ -502,6 +516,7 @@ spv = { + 'NoUnsignedWrap' : 4470, + 'WeightTextureQCOM' : 4487, + 'BlockMatchTextureQCOM' : 4488, ++ 'BlockMatchSamplerQCOM' : 4499, + 'ExplicitInterpAMD' : 4999, + 'NodeSharesPayloadLimitsWithAMDX' : 5019, + 'NodeMaxPayloadsAMDX' : 5020, +@@ -1026,6 +1041,7 @@ spv = { + 'TextureSampleWeightedQCOM' : 4484, + 'TextureBoxFilterQCOM' : 4485, + 'TextureBlockMatchQCOM' : 4486, ++ 'TextureBlockMatch2QCOM' : 4498, + 'Float16ImageAMD' : 5008, + 'ImageGatherBiasLodAMD' : 5009, + 'FragmentMaskAMD' : 5010, +@@ -1034,6 +1050,7 @@ spv = { + 'Int64ImageEXT' : 5016, + 'ShaderClockKHR' : 5055, + 'ShaderEnqueueAMDX' : 5067, ++ 'QuadControlKHR' : 5087, + 'SampleMaskOverrideCoverageNV' : 5249, + 'GeometryShaderPassthroughNV' : 5251, + 'ShaderViewportIndexLayerEXT' : 5254, +@@ -1098,7 +1115,9 @@ spv = { + 'ShaderInvocationReorderNV' : 5383, + 'BindlessTextureNV' : 5390, + 'RayQueryPositionFetchKHR' : 5391, ++ 'AtomicFloat16VectorNV' : 5404, + 'RayTracingDisplacementMicromapNV' : 5409, ++ 'RawAccessChainsNV' : 5414, + 'SubgroupShuffleINTEL' : 5568, + 'SubgroupBufferBlockIOINTEL' : 5569, + 'SubgroupImageBlockIOINTEL' : 5570, +@@ -1153,6 +1172,7 @@ spv = { + 'CooperativeMatrixKHR' : 6022, + 'BitInstructions' : 6025, + 'GroupNonUniformRotateKHR' : 6026, ++ 'FloatControls2' : 6029, + 'AtomicFloat32AddEXT' : 6033, + 'AtomicFloat64AddEXT' : 6034, + 'LongCompositesINTEL' : 6089, +@@ -1169,7 +1189,9 @@ spv = { + 'GlobalVariableHostAccessINTEL' : 6187, + 'GlobalVariableFPGADecorationsINTEL' : 6189, + 'GroupUniformArithmeticKHR' : 6400, ++ 'MaskedGatherScatterINTEL' : 6427, + 'CacheControlsINTEL' : 6441, ++ 'RegisterLimitsINTEL' : 6460, + }, + + 'RayFlagsShift' : { +@@ -1320,6 +1342,21 @@ spv = { + 'StreamingINTEL' : 3, + }, + ++ 'NamedMaximumNumberOfRegisters' : { ++ 'AutoINTEL' : 0, ++ }, ++ ++ 'RawAccessChainOperandsShift' : { ++ 'RobustnessPerComponentNV' : 0, ++ 'RobustnessPerElementNV' : 1, ++ }, ++ ++ 'RawAccessChainOperandsMask' : { ++ 'MaskNone' : 0, ++ 'RobustnessPerComponentNV' : 0x00000001, ++ 'RobustnessPerElementNV' : 0x00000002, ++ }, ++ + 'Op' : { + 'OpNop' : 0, + 'OpUndef' : 1, +@@ -1709,6 +1746,10 @@ spv = { + 'OpImageBoxFilterQCOM' : 4481, + 'OpImageBlockMatchSSDQCOM' : 4482, + 'OpImageBlockMatchSADQCOM' : 4483, ++ 'OpImageBlockMatchWindowSSDQCOM' : 4500, ++ 'OpImageBlockMatchWindowSADQCOM' : 4501, ++ 'OpImageBlockMatchGatherSSDQCOM' : 4502, ++ 'OpImageBlockMatchGatherSADQCOM' : 4503, + 'OpGroupIAddNonUniformAMD' : 5000, + 'OpGroupFAddNonUniformAMD' : 5001, + 'OpGroupFMinNonUniformAMD' : 5002, +@@ -1723,6 +1764,8 @@ spv = { + 'OpFinalizeNodePayloadsAMDX' : 5075, + 'OpFinishWritingNodePayloadAMDX' : 5078, + 'OpInitializeNodePayloadsAMDX' : 5090, ++ 'OpGroupNonUniformQuadAllKHR' : 5110, ++ 'OpGroupNonUniformQuadAnyKHR' : 5111, + 'OpHitObjectRecordHitMotionNV' : 5249, + 'OpHitObjectRecordHitWithIndexMotionNV' : 5250, + 'OpHitObjectRecordMissMotionNV' : 5251, +@@ -1791,6 +1834,7 @@ spv = { + 'OpConvertUToSampledImageNV' : 5395, + 'OpConvertSampledImageToUNV' : 5396, + 'OpSamplerImageAddressingModeNV' : 5397, ++ 'OpRawAccessChainNV' : 5398, + 'OpSubgroupShuffleINTEL' : 5571, + 'OpSubgroupShuffleDownINTEL' : 5572, + 'OpSubgroupShuffleUpINTEL' : 5573, +@@ -2045,6 +2089,8 @@ spv = { + 'OpGroupLogicalAndKHR' : 6406, + 'OpGroupLogicalOrKHR' : 6407, + 'OpGroupLogicalXorKHR' : 6408, ++ 'OpMaskedGatherINTEL' : 6428, ++ 'OpMaskedScatterINTEL' : 6429, + }, + + } +diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d +index 1f56630..64c115e 100644 +--- a/include/spirv/unified1/spv.d ++++ b/include/spirv/unified1/spv.d +@@ -1,5 +1,5 @@ + /+ +- + Copyright (c) 2014-2020 The Khronos Group Inc. ++ + Copyright (c) 2014-2024 The Khronos Group Inc. + + + + Permission is hereby granted, free of charge, to any person obtaining a copy + + of this software and/or associated documentation files (the "Materials"), +@@ -72,6 +72,7 @@ enum SourceLanguage : uint + NZSL = 9, + WGSL = 10, + Slang = 11, ++ Zig = 12, + } + + enum ExecutionModel : uint +@@ -182,6 +183,8 @@ enum ExecutionMode : uint + StencilRefUnchangedBackAMD = 5082, + StencilRefGreaterBackAMD = 5083, + StencilRefLessBackAMD = 5084, ++ QuadDerivativesKHR = 5088, ++ RequireFullQuadsKHR = 5089, + OutputLinesEXT = 5269, + OutputLinesNV = 5269, + OutputPrimitivesEXT = 5270, +@@ -206,9 +209,14 @@ enum ExecutionMode : uint + NoGlobalOffsetINTEL = 5895, + NumSIMDWorkitemsINTEL = 5896, + SchedulerTargetFmaxMhzINTEL = 5903, ++ MaximallyReconvergesKHR = 6023, ++ FPFastMathDefault = 6028, + StreamingInterfaceINTEL = 6154, + RegisterMapInterfaceINTEL = 6160, + NamedBarrierCountINTEL = 6417, ++ MaximumRegistersINTEL = 6461, ++ MaximumRegistersIdINTEL = 6462, ++ NamedMaximumRegistersINTEL = 6463, + } + + enum StorageClass : uint +@@ -426,8 +434,11 @@ enum FPFastMathModeShift : uint + NSZ = 2, + AllowRecip = 3, + Fast = 4, ++ AllowContract = 16, + AllowContractFastINTEL = 16, ++ AllowReassoc = 17, + AllowReassocINTEL = 17, ++ AllowTransform = 18, + } + + enum FPFastMathModeMask : uint +@@ -438,8 +449,11 @@ enum FPFastMathModeMask : uint + NSZ = 0x00000004, + AllowRecip = 0x00000008, + Fast = 0x00000010, ++ AllowContract = 0x00010000, + AllowContractFastINTEL = 0x00010000, ++ AllowReassoc = 0x00020000, + AllowReassocINTEL = 0x00020000, ++ AllowTransform = 0x00040000, + } + + enum FPRoundingMode : uint +@@ -530,6 +544,7 @@ enum Decoration : uint + NoUnsignedWrap = 4470, + WeightTextureQCOM = 4487, + BlockMatchTextureQCOM = 4488, ++ BlockMatchSamplerQCOM = 4499, + ExplicitInterpAMD = 4999, + NodeSharesPayloadLimitsWithAMDX = 5019, + NodeMaxPayloadsAMDX = 5020, +@@ -1071,6 +1086,7 @@ enum Capability : uint + TextureSampleWeightedQCOM = 4484, + TextureBoxFilterQCOM = 4485, + TextureBlockMatchQCOM = 4486, ++ TextureBlockMatch2QCOM = 4498, + Float16ImageAMD = 5008, + ImageGatherBiasLodAMD = 5009, + FragmentMaskAMD = 5010, +@@ -1079,6 +1095,7 @@ enum Capability : uint + Int64ImageEXT = 5016, + ShaderClockKHR = 5055, + ShaderEnqueueAMDX = 5067, ++ QuadControlKHR = 5087, + SampleMaskOverrideCoverageNV = 5249, + GeometryShaderPassthroughNV = 5251, + ShaderViewportIndexLayerEXT = 5254, +@@ -1143,7 +1160,9 @@ enum Capability : uint + ShaderInvocationReorderNV = 5383, + BindlessTextureNV = 5390, + RayQueryPositionFetchKHR = 5391, ++ AtomicFloat16VectorNV = 5404, + RayTracingDisplacementMicromapNV = 5409, ++ RawAccessChainsNV = 5414, + SubgroupShuffleINTEL = 5568, + SubgroupBufferBlockIOINTEL = 5569, + SubgroupImageBlockIOINTEL = 5570, +@@ -1198,6 +1217,7 @@ enum Capability : uint + CooperativeMatrixKHR = 6022, + BitInstructions = 6025, + GroupNonUniformRotateKHR = 6026, ++ FloatControls2 = 6029, + AtomicFloat32AddEXT = 6033, + AtomicFloat64AddEXT = 6034, + LongCompositesINTEL = 6089, +@@ -1214,7 +1234,9 @@ enum Capability : uint + GlobalVariableHostAccessINTEL = 6187, + GlobalVariableFPGADecorationsINTEL = 6189, + GroupUniformArithmeticKHR = 6400, ++ MaskedGatherScatterINTEL = 6427, + CacheControlsINTEL = 6441, ++ RegisterLimitsINTEL = 6460, + } + + enum RayFlagsShift : uint +@@ -1385,6 +1407,24 @@ enum StoreCacheControl : uint + StreamingINTEL = 3, + } + ++enum NamedMaximumNumberOfRegisters : uint ++{ ++ AutoINTEL = 0, ++} ++ ++enum RawAccessChainOperandsShift : uint ++{ ++ RobustnessPerComponentNV = 0, ++ RobustnessPerElementNV = 1, ++} ++ ++enum RawAccessChainOperandsMask : uint ++{ ++ MaskNone = 0, ++ RobustnessPerComponentNV = 0x00000001, ++ RobustnessPerElementNV = 0x00000002, ++} ++ + enum Op : uint + { + OpNop = 0, +@@ -1775,6 +1815,10 @@ enum Op : uint + OpImageBoxFilterQCOM = 4481, + OpImageBlockMatchSSDQCOM = 4482, + OpImageBlockMatchSADQCOM = 4483, ++ OpImageBlockMatchWindowSSDQCOM = 4500, ++ OpImageBlockMatchWindowSADQCOM = 4501, ++ OpImageBlockMatchGatherSSDQCOM = 4502, ++ OpImageBlockMatchGatherSADQCOM = 4503, + OpGroupIAddNonUniformAMD = 5000, + OpGroupFAddNonUniformAMD = 5001, + OpGroupFMinNonUniformAMD = 5002, +@@ -1789,6 +1833,8 @@ enum Op : uint + OpFinalizeNodePayloadsAMDX = 5075, + OpFinishWritingNodePayloadAMDX = 5078, + OpInitializeNodePayloadsAMDX = 5090, ++ OpGroupNonUniformQuadAllKHR = 5110, ++ OpGroupNonUniformQuadAnyKHR = 5111, + OpHitObjectRecordHitMotionNV = 5249, + OpHitObjectRecordHitWithIndexMotionNV = 5250, + OpHitObjectRecordMissMotionNV = 5251, +@@ -1857,6 +1903,7 @@ enum Op : uint + OpConvertUToSampledImageNV = 5395, + OpConvertSampledImageToUNV = 5396, + OpSamplerImageAddressingModeNV = 5397, ++ OpRawAccessChainNV = 5398, + OpSubgroupShuffleINTEL = 5571, + OpSubgroupShuffleDownINTEL = 5572, + OpSubgroupShuffleUpINTEL = 5573, +@@ -2111,6 +2158,8 @@ enum Op : uint + OpGroupLogicalAndKHR = 6406, + OpGroupLogicalOrKHR = 6407, + OpGroupLogicalXorKHR = 6408, ++ OpMaskedGatherINTEL = 6428, ++ OpMaskedScatterINTEL = 6429, + } + + +diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt +index 6d86090..ebf7e12 100644 +--- a/tests/CMakeLists.txt ++++ b/tests/CMakeLists.txt +@@ -1,4 +1,4 @@ +-# Copyright (c) 2015-2023 The Khronos Group Inc. ++# Copyright (c) 2015-2024 The Khronos Group Inc. + # + # Permission is hereby granted, free of charge, to any person obtaining a + # copy of this software and/or associated documentation files (the +@@ -24,13 +24,13 @@ + # TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + # MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + +-add_library(simple_test STATIC) ++add_library(spirv_headers_simple_test STATIC) + +-target_sources(simple_test PRIVATE ++target_sources(spirv_headers_simple_test PRIVATE + example.cpp + ) + +-target_link_libraries(simple_test PRIVATE ++target_link_libraries(spirv_headers_simple_test PRIVATE + SPIRV-Headers::SPIRV-Headers + ) + +diff --git a/tests/example.cpp b/tests/example.cpp +index d79b62f..1920e80 100644 +--- a/tests/example.cpp ++++ b/tests/example.cpp +@@ -1,4 +1,4 @@ +-// Copyright (c) 2016 The Khronos Group Inc. ++// Copyright (c) 2016-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a + // copy of this software and/or associated documentation files (the +diff --git a/tools/buildHeaders/bin/generate_language_headers.py b/tools/buildHeaders/bin/generate_language_headers.py +index c56780c..ccd843b 100755 +--- a/tools/buildHeaders/bin/generate_language_headers.py ++++ b/tools/buildHeaders/bin/generate_language_headers.py +@@ -1,5 +1,5 @@ + #!/usr/bin/env python3 +-# Copyright (c) 2017-2020 Google LLC ++# Copyright (c) 2017-2024 Google LLC + # + # Permission is hereby granted, free of charge, to any person obtaining a + # copy of this software and/or associated documentation files (the +@@ -32,7 +32,7 @@ import json + import os.path + import re + +-DEFAULT_COPYRIGHT="""Copyright (c) 2020 The Khronos Group Inc. ++DEFAULT_COPYRIGHT="""Copyright (c) 2020-2024 The Khronos Group Inc. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and/or associated documentation files (the +diff --git a/tools/buildHeaders/bin/makeExtinstHeaders.py b/tools/buildHeaders/bin/makeExtinstHeaders.py +index 8852d19..96ce008 100755 +--- a/tools/buildHeaders/bin/makeExtinstHeaders.py ++++ b/tools/buildHeaders/bin/makeExtinstHeaders.py +@@ -27,3 +27,4 @@ mk_extinst('AMD_shader_trinary_minmax', 'extinst.spv-amd-shader-trinary-minmax.g + mk_extinst('NonSemanticDebugPrintf', 'extinst.nonsemantic.debugprintf.grammar.json') + mk_extinst('NonSemanticClspvReflection', 'extinst.nonsemantic.clspvreflection.grammar.json') + mk_extinst('NonSemanticDebugBreak', 'extinst.nonsemantic.debugbreak.grammar.json') ++mk_extinst('NonSemanticVkspReflection', 'extinst.nonsemantic.vkspreflection.grammar.json') +diff --git a/tools/buildHeaders/header.cpp b/tools/buildHeaders/header.cpp +index 4ee358b..d125a79 100644 +--- a/tools/buildHeaders/header.cpp ++++ b/tools/buildHeaders/header.cpp +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2020 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +@@ -169,29 +169,30 @@ namespace { + } + + const std::string TPrinter::DocCopyright = +- "Copyright (c) 2014-2020 The Khronos Group Inc.\n" +- "\n" +- "Permission is hereby granted, free of charge, to any person obtaining a copy\n" +- "of this software and/or associated documentation files (the \"Materials\"),\n" +- "to deal in the Materials without restriction, including without limitation\n" +- "the rights to use, copy, modify, merge, publish, distribute, sublicense,\n" +- "and/or sell copies of the Materials, and to permit persons to whom the\n" +- "Materials are furnished to do so, subject to the following conditions:\n" +- "\n" +- "The above copyright notice and this permission notice shall be included in\n" +- "all copies or substantial portions of the Materials.\n" +- "\n" +- "MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS\n" +- "STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND\n" +- "HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ \n" +- "\n" +- "THE MATERIALS ARE PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS\n" +- "OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n" +- "FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\n" +- "THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n" +- "LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n" +- "FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS\n" +- "IN THE MATERIALS.\n"; ++R"(Copyright (c) 2014-2024 The Khronos Group Inc. ++ ++Permission is hereby granted, free of charge, to any person obtaining a copy ++of this software and/or associated documentation files (the "Materials"), ++to deal in the Materials without restriction, including without limitation ++the rights to use, copy, modify, merge, publish, distribute, sublicense, ++and/or sell copies of the Materials, and to permit persons to whom the ++Materials are furnished to do so, subject to the following conditions: ++ ++The above copyright notice and this permission notice shall be included in ++all copies or substantial portions of the Materials. ++ ++MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS ++STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND ++HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ ++ ++THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS ++OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS ++IN THE MATERIALS. ++)"; + + const std::string TPrinter::DocComment1 = + "This header is automatically generated by the same tool that creates\n" +diff --git a/tools/buildHeaders/header.h b/tools/buildHeaders/header.h +index 1dd6e67..6854f80 100644 +--- a/tools/buildHeaders/header.h ++++ b/tools/buildHeaders/header.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2019 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +diff --git a/tools/buildHeaders/jsonToSpirv.cpp b/tools/buildHeaders/jsonToSpirv.cpp +index ee396f0..34e0972 100644 +--- a/tools/buildHeaders/jsonToSpirv.cpp ++++ b/tools/buildHeaders/jsonToSpirv.cpp +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2020 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +@@ -272,6 +272,8 @@ EnumValues InitializationModeQualifierParams; + EnumValues HostAccessQualifierParams; + EnumValues LoadCacheControlParams; + EnumValues StoreCacheControlParams; ++EnumValues NamedMaximumNumberOfRegistersParams; ++EnumValues RawAccessChainOperandsParams; + + std::pair ReadFile(const std::string& path) + { +@@ -434,6 +436,10 @@ ClassOptionality ToOperandClassAndOptionality(const std::string& operandKind, co + type = OperandLoadCacheControl; + } else if (operandKind == "StoreCacheControl") { + type = OperandStoreCacheControl; ++ } else if (operandKind == "NamedMaximumNumberOfRegisters") { ++ type = OperandNamedMaximumNumberOfRegisters; ++ } else if (operandKind == "RawAccessChainOperands") { ++ type = OperandRawAccessChainOperands; + } + + if (type == OperandNone) { +@@ -777,6 +783,10 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders) + establishOperandClass(enumName, OperandLoadCacheControl, &LoadCacheControlParams, operandEnum, category); + } else if (enumName == "StoreCacheControl") { + establishOperandClass(enumName, OperandStoreCacheControl, &StoreCacheControlParams, operandEnum, category); ++ } else if (enumName == "NamedMaximumNumberOfRegisters") { ++ establishOperandClass(enumName, OperandNamedMaximumNumberOfRegisters, &NamedMaximumNumberOfRegistersParams, operandEnum, category); ++ } else if (enumName == "RawAccessChainOperands") { ++ establishOperandClass(enumName, OperandRawAccessChainOperands, &RawAccessChainOperandsParams, operandEnum, category); + } + } + +diff --git a/tools/buildHeaders/jsonToSpirv.h b/tools/buildHeaders/jsonToSpirv.h +index db4855b..c8de68f 100644 +--- a/tools/buildHeaders/jsonToSpirv.h ++++ b/tools/buildHeaders/jsonToSpirv.h +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2020 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"), +@@ -103,6 +103,8 @@ enum OperandClass { + OperandHostAccessQualifier, + OperandLoadCacheControl, + OperandStoreCacheControl, ++ OperandNamedMaximumNumberOfRegisters, ++ OperandRawAccessChainOperands, + + OperandOpcode, + +diff --git a/tools/buildHeaders/main.cpp b/tools/buildHeaders/main.cpp +index 9a59714..6e6a03b 100644 +--- a/tools/buildHeaders/main.cpp ++++ b/tools/buildHeaders/main.cpp +@@ -1,4 +1,4 @@ +-// Copyright (c) 2014-2019 The Khronos Group Inc. ++// Copyright (c) 2014-2024 The Khronos Group Inc. + // + // Permission is hereby granted, free of charge, to any person obtaining a copy + // of this software and/or associated documentation files (the "Materials"),