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Accepting request 1067439 from home:sndirsch:branches:X11:XOrg

Browse Source 
- Update to version 23.0.0
  * first stable release of 2023
- refreshed patches
  * n_drirc-disable-rgb10-for-chromium-on-amd.patch
  * n_stop-iris-flicker.patch
  * u_dep_xcb.patch
  * u_fix-build-on-ppc64le.patch
- adjusted n_no-sse2-on-ix86-except-for-intel-drivers.patch
- meson: added -Dxmlconfig=enabled to fix link errors
  (missing "-lexpat")

OBS-URL: https://build.opensuse.org/request/show/1067439
OBS-URL: https://build.opensuse.org/package/show/X11:XOrg/Mesa?expand=0&rev=1195
This commit is contained in:
Stefan Dirsch 2023-02-23 15:26:00 +00:00 committed by Git OBS Bridge
parent 0454183bb3
commit 0be01f0ffa
11 changed files with 81 additions and 65 deletions
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14
Mesa.changes
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@ -1,3 +1,17 @@
-------------------------------------------------------------------
Thu Feb 23 10:26:30 UTC 2023 - Stefan Dirsch <sndirsch@suse.com>
- Update to version 23.0.0
* first stable release of 2023
- refreshed patches
* n_drirc-disable-rgb10-for-chromium-on-amd.patch
* n_stop-iris-flicker.patch
* u_dep_xcb.patch
* u_fix-build-on-ppc64le.patch
- adjusted n_no-sse2-on-ix86-except-for-intel-drivers.patch
- meson: added -Dxmlconfig=enabled to fix link errors
(missing "-lexpat")
-------------------------------------------------------------------
Fri Feb 10 14:06:56 UTC 2023 - Stefan Dirsch <sndirsch@suse.com>

5
Mesa.spec
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@ -42,7 +42,7 @@
%define glamor 1
%define _name_archive mesa
%define _version 22.3.5
%define _version 23.0.0
%define with_opencl 0
%define with_rusticl 0
%define with_vulkan 0
@ -123,7 +123,7 @@
%endif
Name: Mesa%{psuffix}
Version: 22.3.5
Version: 23.0.0
Release: 0
Summary: System for rendering 3-D graphics
License: MIT
@ -820,6 +820,7 @@ egl_platforms=x11,wayland
-Degl=enabled \
-Dglx=disabled \
-Dosmesa=false \
-Dxmlconfig=enabled \
%else
-Dglvnd=true \
-Dgles1=enabled \

3
mesa-22.3.5.tar.xz
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@ -1,3 +0,0 @@
version https://git-lfs.github.com/spec/v1
oid sha256:3eed2ecae2bc674494566faab9fcc9beb21cd804c7ba2b59a1694f3d7236e6a9
size 17069488

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mesa-22.3.5.tar.xz.sig
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3
mesa-23.0.0.tar.xz Normal file
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@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:01f3cff3763f09e0adabcb8011e4aebc6ad48f6a4dd4bae904fe918707d253e4
size 17492236

BIN
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8
n_drirc-disable-rgb10-for-chromium-on-amd.patch
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@ -1,8 +1,8 @@
Index: mesa-22.3.2/src/util/00-mesa-defaults.conf
Index: mesa-23.0.0/src/util/00-mesa-defaults.conf
===================================================================
--- mesa-22.3.2.orig/src/util/00-mesa-defaults.conf
+++ mesa-22.3.2/src/util/00-mesa-defaults.conf
@@ -863,6 +863,14 @@ TODO: document the other workarounds.
--- mesa-23.0.0.orig/src/util/00-mesa-defaults.conf
+++ mesa-23.0.0/src/util/00-mesa-defaults.conf
@@ -892,6 +892,14 @@ TODO: document the other workarounds.
<application name="Rocket League" executable="RocketLeague">
<option name="radeonsi_zerovram" value="true" />
</application>

60
n_no-sse2-on-ix86-except-for-intel-drivers.patch
View File

@ -1,42 +1,40 @@
Index: mesa-22.2.0/meson.build
Index: mesa-23.0.0/meson.build
===================================================================
--- mesa-22.2.0.orig/meson.build
+++ mesa-22.2.0/meson.build
@@ -1275,35 +1275,8 @@ if host_machine.system() == 'windows'
endif
endif
--- mesa-23.0.0.orig/meson.build
+++ mesa-23.0.0/meson.build
@@ -1295,35 +1295,6 @@ endif
-if host_machine.cpu_family().startswith('x86') and cc.get_argument_syntax() != 'msvc'
sse41_args = []
with_sse41 = false
-if host_machine.cpu_family().startswith('x86')
- pre_args += '-DUSE_SSE41'
- with_sse41 = true
- sse41_args = ['-msse4.1']
-
- if host_machine.cpu_family() == 'x86'
- if get_option('sse2')
- # These settings make generated GCC code match MSVC and follow
- # GCC advice on https://gcc.gnu.org/wiki/FloatingPointMath#x86note
- #
- # NOTE: We need to ensure stack is realigned given that we
- # produce shared objects, and have no control over the stack
- # alignment policy of the application. Therefore we need
- # -mstackrealign or -mincoming-stack-boundary=2.
- #
- # XXX: We could have SSE without -mstackrealign if we always used
- # __attribute__((force_align_arg_pointer)), but that's not
- # always the case.
- c_args += ['-msse2', '-mfpmath=sse', '-mstackrealign']
- else
- # GCC on x86 (not x86_64) with -msse* assumes a 16 byte aligned stack, but
- # that's not guaranteed
- sse41_args += '-mstackrealign'
- if cc.get_id() != 'msvc'
- sse41_args = ['-msse4.1']
-
- if host_machine.cpu_family() == 'x86'
- if get_option('sse2')
- # These settings make generated GCC code match MSVC and follow
- # GCC advice on https://gcc.gnu.org/wiki/FloatingPointMath#x86note
- #
- # NOTE: We need to ensure stack is realigned given that we
- # produce shared objects, and have no control over the stack
- # alignment policy of the application. Therefore we need
- # -mstackrealign or -mincoming-stack-boundary=2.
- #
- # XXX: We could have SSE without -mstackrealign if we always used
- # __attribute__((force_align_arg_pointer)), but that's not
- # always the case.
- c_args += ['-msse2', '-mfpmath=sse', '-mstackrealign']
- else
- # GCC on x86 (not x86_64) with -msse* assumes a 16 byte aligned stack, but
- # that's not guaranteed
- sse41_args += '-mstackrealign'
- endif
- endif
- endif
-else
- with_sse41 = false
- sse41_args = []
-endif
+with_sse41 = false
+sse41_args = []
# Check for GCC style atomics
dep_atomic = null_dep

10
n_stop-iris-flicker.patch
View File

@ -4,11 +4,11 @@ Date: Tue May 24 14:47:53 2022 -0400
Adjusting 'iris_batch.c' per 'https://gitlab.freedesktop.org/mesa/mesa/-/issues/5731'.
diff --git a/src/gallium/drivers/iris/iris_batch.c b/src/gallium/drivers/iris/iris_batch.c
index 71cb2096ad1..0a72d2a07c3 100644
--- a/src/gallium/drivers/iris/iris_batch.c
+++ b/src/gallium/drivers/iris/iris_batch.c
@@ -926,8 +926,7 @@ submit_batch(struct iris_batch *batch)
Index: mesa-23.0.0/src/gallium/drivers/iris/iris_batch.c
===================================================================
--- mesa-23.0.0.orig/src/gallium/drivers/iris/iris_batch.c
+++ mesa-23.0.0/src/gallium/drivers/iris/iris_batch.c
@@ -923,8 +923,7 @@ submit_batch(struct iris_batch *batch)
(struct drm_i915_gem_exec_object2) {
.handle = bo->gem_handle,
.offset = bo->address,

14
u_dep_xcb.patch
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@ -1,8 +1,8 @@
Index: mesa-22.3.5/meson.build
Index: mesa-23.0.0/meson.build
===================================================================
--- mesa-22.3.5.orig/meson.build
+++ mesa-22.3.5/meson.build
@@ -2141,9 +2141,11 @@ if with_platform_x11
--- mesa-23.0.0.orig/meson.build
+++ mesa-23.0.0/meson.build
@@ -2191,9 +2191,11 @@ if with_platform_x11
endif
endif
if with_any_vk or with_egl or (with_glx == 'dri' and with_dri_platform == 'drm')
@ -14,10 +14,10 @@ Index: mesa-22.3.5/meson.build
dep_xcb_dri3 = dependency('xcb-dri3')
dep_xcb_present = dependency('xcb-present')
# until xcb-dri3 has been around long enough to make a hard-dependency:
Index: mesa-22.3.5/src/loader/meson.build
Index: mesa-23.0.0/src/loader/meson.build
===================================================================
--- mesa-22.3.5.orig/src/loader/meson.build
+++ mesa-22.3.5/src/loader/meson.build
--- mesa-23.0.0.orig/src/loader/meson.build
+++ mesa-23.0.0/src/loader/meson.build
@@ -28,7 +28,7 @@ if with_platform_x11 and with_dri3
include_directories : [inc_include, inc_src],
dependencies : [

29
u_fix-build-on-ppc64le.patch
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@ -1,7 +1,8 @@
diff -u -r mesa-21.2.3.orig/include/CL/cl_platform.h mesa-21.2.3/include/CL/cl_platform.h
--- mesa-21.2.3.orig/include/CL/cl_platform.h 2021-10-14 12:26:03.866376943 +0200
+++ mesa-21.2.3/include/CL/cl_platform.h 2021-10-14 20:37:44.557384820 +0200
@@ -356,7 +356,9 @@
Index: mesa-23.0.0/include/CL/cl_platform.h
===================================================================
--- mesa-23.0.0.orig/include/CL/cl_platform.h
+++ mesa-23.0.0/include/CL/cl_platform.h
@@ -385,7 +385,9 @@ typedef unsigned int cl_GLenum;
/* Define basic vector types */
#if defined( __VEC__ )
#if !defined(__clang__)
@ -11,10 +12,11 @@ diff -u -r mesa-21.2.3.orig/include/CL/cl_platform.h mesa-21.2.3/include/CL/cl_p
#endif
typedef __vector unsigned char __cl_uchar16;
typedef __vector signed char __cl_char16;
diff -u -r mesa-21.2.3.orig/src/gallium/drivers/llvmpipe/lp_rast_tri.c mesa-21.2.3/src/gallium/drivers/llvmpipe/lp_rast_tri.c
--- mesa-21.2.3.orig/src/gallium/drivers/llvmpipe/lp_rast_tri.c 2021-10-14 12:26:04.058380655 +0200
+++ mesa-21.2.3/src/gallium/drivers/llvmpipe/lp_rast_tri.c 2021-10-14 20:38:55.478734888 +0200
@@ -465,7 +465,9 @@
Index: mesa-23.0.0/src/gallium/drivers/llvmpipe/lp_rast_tri.c
===================================================================
--- mesa-23.0.0.orig/src/gallium/drivers/llvmpipe/lp_rast_tri.c
+++ mesa-23.0.0/src/gallium/drivers/llvmpipe/lp_rast_tri.c
@@ -488,7 +488,9 @@ lp_rast_triangle_32_3_4(struct lp_raster
#if defined(_ARCH_PWR8) && UTIL_ARCH_LITTLE_ENDIAN
@ -24,11 +26,12 @@ diff -u -r mesa-21.2.3.orig/src/gallium/drivers/llvmpipe/lp_rast_tri.c mesa-21.2
#include "util/u_pwr8.h"
static inline void
diff -u -r mesa-21.2.3.orig/src/gallium/drivers/llvmpipe/lp_setup_tri.c mesa-21.2.3/src/gallium/drivers/llvmpipe/lp_setup_tri.c
--- mesa-21.2.3.orig/src/gallium/drivers/llvmpipe/lp_setup_tri.c 2021-10-14 12:26:04.058380655 +0200
+++ mesa-21.2.3/src/gallium/drivers/llvmpipe/lp_setup_tri.c 2021-10-14 20:38:24.766150222 +0200
@@ -47,7 +47,9 @@
#if defined(PIPE_ARCH_SSE)
Index: mesa-23.0.0/src/gallium/drivers/llvmpipe/lp_setup_tri.c
===================================================================
--- mesa-23.0.0.orig/src/gallium/drivers/llvmpipe/lp_setup_tri.c
+++ mesa-23.0.0/src/gallium/drivers/llvmpipe/lp_setup_tri.c
@@ -46,7 +46,9 @@
#if DETECT_ARCH_SSE
#include <emmintrin.h>
#elif defined(_ARCH_PWR8) && UTIL_ARCH_LITTLE_ENDIAN
+#ifndef __cplusplus