bf5fb37f98
* rebased patches
* requires NSS 3.15.2 or above
* MFSA 2013-93/CVE-2013-5590/CVE-2013-5591/CVE-2013-5592
Miscellaneous memory safety hazards
* MFSA 2013-94/CVE-2013-5593 (bmo#868327)
Spoofing addressbar through SELECT element
* MFSA 2013-95/CVE-2013-5604 (bmo#914017)
Access violation with XSLT and uninitialized data
* MFSA 2013-96/CVE-2013-5595 (bmo#916580)
Improperly initialized memory and overflows in some JavaScript
functions
* MFSA 2013-97/CVE-2013-5596 (bmo#910881)
Writing to cycle collected object during image decoding
* MFSA 2013-98/CVE-2013-5597 (bmo#918864)
Use-after-free when updating offline cache
* MFSA 2013-99/CVE-2013-5598 (bmo#920515)
Security bypass of PDF.js checks using iframes
* MFSA 2013-100/CVE-2013-5599/CVE-2013-5600/CVE-2013-5601
(bmo#915210, bmo#915576, bmo#916685)
Miscellaneous use-after-free issues found through ASAN fuzzing
* MFSA 2013-101/CVE-2013-5602 (bmo#897678)
Memory corruption in workers
* MFSA 2013-102/CVE-2013-5603 (bmo#916404)
Use-after-free in HTML document templates
OBS-URL: https://build.opensuse.org/package/show/mozilla:Factory/MozillaFirefox?expand=0&rev=356
89 lines
2.6 KiB
Diff
89 lines
2.6 KiB
Diff
Subject: Patches needed to build on SLE11/11.1
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References:
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https://bugzilla.mozilla.org/show_bug.cgi?id=513422
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diff --git a/mozglue/build/SSE.cpp b/mozglue/build/SSE.cpp
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--- a/mozglue/build/SSE.cpp
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+++ b/mozglue/build/SSE.cpp
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@@ -12,26 +12,77 @@ namespace {
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// SSE.h has parallel #ifs which declare MOZILLA_SSE_HAVE_CPUID_DETECTION.
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// We can't declare these functions in the header file, however, because
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// <intrin.h> conflicts with <windows.h> on MSVC 2005, and some files want to
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// include both SSE.h and <windows.h>.
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#ifdef HAVE_CPUID_H
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// cpuid.h is available on gcc 4.3 and higher on i386 and x86_64
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-#include <cpuid.h>
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+//#include <cpuid.h>
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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+#ifdef __i386__
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+#define _my_cpuid(level, a, b, c, d) \
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+ __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \
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+ "cpuid\n\t" \
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+ "xchg{l}\t{%%}ebx, %1\n\t" \
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+ : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
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+ : "0" (level))
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+#else
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+#define _my_cpuid(level, a, b, c, d) \
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+ __asm__ ("cpuid\n\t" \
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+ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
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+ : "0" (level))
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+#endif
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+
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+static __inline unsigned int
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+my_cpuid_max (unsigned int __ext, unsigned int *__sig)
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+{
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+ unsigned int __eax, __ebx, __ecx, __edx;
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+
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+#ifdef __i386__
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+ __asm__ ("pushf{l|d}\n\t"
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+ "pushf{l|d}\n\t"
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+ "pop{l}\t%0\n\t"
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+ "mov{l}\t{%0, %1|%1, %0}\n\t"
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+ "xor{l}\t{%2, %0|%0, %2}\n\t"
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+ "push{l}\t%0\n\t"
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+ "popf{l|d}\n\t"
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+ "pushf{l|d}\n\t"
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+ "pop{l}\t%0\n\t"
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+ "popf{l|d}\n\t"
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+ : "=&r" (__eax), "=&r" (__ebx)
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+ : "i" (0x00200000));
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+
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+ if (!((__eax ^ __ebx) & 0x00200000))
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+ return 0;
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+#endif
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+
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+ /* Host supports cpuid. Return highest supported cpuid input value. */
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+ _my_cpuid (__ext, __eax, __ebx, __ecx, __edx);
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+
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+ if (__sig)
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+ *__sig = __ebx;
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+
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+ return __eax;
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+}
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+
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static bool
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has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)
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{
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unsigned int regs[4];
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- return __get_cpuid(level, ®s[0], ®s[1], ®s[2], ®s[3]) &&
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- (regs[reg] & bit);
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+
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+ unsigned int __ext = level & 0x80000000;
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+ if (my_cpuid_max(__ext, 0) < level)
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+ return false;
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+
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+ _my_cpuid(level, regs[0], regs[1], regs[2], regs[3]);
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+ return !!(unsigned(regs[reg]) & bit);
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}
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#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_AMD64))
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// MSVC 2005 or newer on x86-32 or x86-64
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#include <intrin.h>
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enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
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