binutils/cross-avr-nesc-as.patch

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- Update to version 2.43: * new .base64 pseudo-op, allowing base64 encoded data as strings * Intel APX: add support for CFCMOV, CCMP, CTEST, zero-upper, NF (APX_F now fully supported) * x86 Intel syntax now warns about more mnemonic suffixes * macros and .irp/.irpc/.rept bodies can use \+ to get at number of times the macro/body was executed * aarch64: support 'armv9.5-a' for -march, add support for LUT and LUT2 * s390: base register operand in D(X,B) and D(L,B) can now be omitted (ala 'D(X,)'); warn when register type doesn't match operand type (use option 'warn-regtype-mismatch=[strict|relaxed|no]' to adjust) * riscv: support various extensions: Zacas, Zcmp, Zfbfmin, Zvfbfmin, Zvfbfwma, Smcsrind/Sscsrind, XCvMem, XCvBi, XCvElw, XSfCease, all at version 1.0; remove support for assembly of privileged spec 1.9.1 (linking support remains) * arm: remove support for some old co-processors: Maverick and FPA * mips: '--trap' now causes either trap or breakpoint instructions to be emitted as per current ISA, instead of always using trap insn and failing when current ISA was incompatible with that * LoongArch: accept .option pseudo-op for fine-grained control of assembly code options; add support for DT_RELR * readelf: now displays RELR relocations in full detail; add -j/--display-section to show just those section(s) content according to their type * objdump/readelf now dump also .eh_frame_hdr (when present) when dumping .eh_frame * gprofng: add event types for AMD Zen3/Zen4 and Intel Ice Lake processors; add minimal support for riscv * linker: OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=471
2024-08-06 16:38:53 +02:00
Index: gas/config/tc-avr-nesc.h
===================================================================
--- gas/config/tc-avr-nesc.h.orig 2016-02-01 09:58:37.419903606 +0100
+++ gas/config/tc-avr-nesc.h 2016-02-01 09:58:39.631928732 +0100
Index: gas/expr.c
@@ -143,8 +143,12 @@ extern int avr_force_relocation (struct fix *);
would print `12 34 56 78'. The default value is 4. */
#define LISTING_WORD_SIZE 2
-/* AVR port uses `$' as a logical line separator by default. */
-#define LEX_DOLLAR 0
+/* AVR port uses `$' as a logical line separator and doesn't
+ allow it in symbols. We allow it in the middle of symbols.
+ We also hack get_symbol_end to disallow it at the end of a symbol. */
+#define LEX_DOLLAR 1
+#define TC_EOL_IN_INSN(PTR) (*(PTR) == '$' && is_part_of_name((PTR)[-1]) && is_part_of_name((PTR)[1]))
+#define TC_FORBID_DOLLAR_AT_END
/* An `.lcomm' directive with no explicit alignment parameter will
use this macro to set P2VAR to the alignment that a request for
===================================================================
--- gas/expr.c.orig 2016-02-01 09:58:35.743884569 +0100
+++ gas/expr.c 2016-02-01 09:58:39.631928732 +0100
@@ -2342,6 +2342,15 @@ get_symbol_name (char ** ilp_return)
;
if (is_name_ender (c))
c = *input_line_pointer++;
+#ifdef TC_FORBID_DOLLAR_AT_END
+ /* This is for the Atmel AVR platforms. We want to allow $ in symbols
+ but also as a line separator. Yucky. */
+ if (input_line_pointer[-2] == '$')
+ {
+ input_line_pointer--;
+ c = '$';
+ }
+#endif
}
else if (c == '"')
{