diff --git a/binutils.changes b/binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/binutils.changes +++ b/binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/binutils.spec b/binutils.spec index 110d7fb..5e10712 100644 --- a/binutils.spec +++ b/binutils.spec @@ -96,6 +96,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -169,6 +170,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-aarch64-binutils.changes b/cross-aarch64-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-aarch64-binutils.changes +++ b/cross-aarch64-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-aarch64-binutils.spec b/cross-aarch64-binutils.spec index 8a71b3b..eaa41b6 100644 --- a/cross-aarch64-binutils.spec +++ b/cross-aarch64-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-arm-binutils.changes b/cross-arm-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-arm-binutils.changes +++ b/cross-arm-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-arm-binutils.spec b/cross-arm-binutils.spec index c9d0bdd..ef0b3f0 100644 --- a/cross-arm-binutils.spec +++ b/cross-arm-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-avr-binutils.changes b/cross-avr-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-avr-binutils.changes +++ b/cross-avr-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-avr-binutils.spec b/cross-avr-binutils.spec index ad9a07a..e990359 100644 --- a/cross-avr-binutils.spec +++ b/cross-avr-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-epiphany-binutils.changes b/cross-epiphany-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-epiphany-binutils.changes +++ b/cross-epiphany-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-epiphany-binutils.spec b/cross-epiphany-binutils.spec index 014f8ca..41e6b92 100644 --- a/cross-epiphany-binutils.spec +++ b/cross-epiphany-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-hppa-binutils.changes b/cross-hppa-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-hppa-binutils.changes +++ b/cross-hppa-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-hppa-binutils.spec b/cross-hppa-binutils.spec index f53887d..a377950 100644 --- a/cross-hppa-binutils.spec +++ b/cross-hppa-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-hppa64-binutils.changes b/cross-hppa64-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-hppa64-binutils.changes +++ b/cross-hppa64-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-hppa64-binutils.spec b/cross-hppa64-binutils.spec index 33b1ae5..e80540b 100644 --- a/cross-hppa64-binutils.spec +++ b/cross-hppa64-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-i386-binutils.changes b/cross-i386-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-i386-binutils.changes +++ b/cross-i386-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-i386-binutils.spec b/cross-i386-binutils.spec index ec534bb..c666dda 100644 --- a/cross-i386-binutils.spec +++ b/cross-i386-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ia64-binutils.changes b/cross-ia64-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-ia64-binutils.changes +++ b/cross-ia64-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-ia64-binutils.spec b/cross-ia64-binutils.spec index a663aeb..6e600bc 100644 --- a/cross-ia64-binutils.spec +++ b/cross-ia64-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-m68k-binutils.changes b/cross-m68k-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-m68k-binutils.changes +++ b/cross-m68k-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-m68k-binutils.spec b/cross-m68k-binutils.spec index 2a9b536..2cc6e67 100644 --- a/cross-m68k-binutils.spec +++ b/cross-m68k-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-mips-binutils.changes b/cross-mips-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-mips-binutils.changes +++ b/cross-mips-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-mips-binutils.spec b/cross-mips-binutils.spec index 3247636..af78dda 100644 --- a/cross-mips-binutils.spec +++ b/cross-mips-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ppc-binutils.changes b/cross-ppc-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-ppc-binutils.changes +++ b/cross-ppc-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-ppc-binutils.spec b/cross-ppc-binutils.spec index c75f456..1567285 100644 --- a/cross-ppc-binutils.spec +++ b/cross-ppc-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ppc64-binutils.changes b/cross-ppc64-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-ppc64-binutils.changes +++ b/cross-ppc64-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-ppc64-binutils.spec b/cross-ppc64-binutils.spec index 70aac88..6ba6718 100644 --- a/cross-ppc64-binutils.spec +++ b/cross-ppc64-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ppc64le-binutils.changes b/cross-ppc64le-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-ppc64le-binutils.changes +++ b/cross-ppc64le-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-ppc64le-binutils.spec b/cross-ppc64le-binutils.spec index f2e4227..3a0f5f3 100644 --- a/cross-ppc64le-binutils.spec +++ b/cross-ppc64le-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-riscv64-binutils.changes b/cross-riscv64-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-riscv64-binutils.changes +++ b/cross-riscv64-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-riscv64-binutils.spec b/cross-riscv64-binutils.spec index 580dcdd..33c0b40 100644 --- a/cross-riscv64-binutils.spec +++ b/cross-riscv64-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-rx-binutils.changes b/cross-rx-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-rx-binutils.changes +++ b/cross-rx-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-rx-binutils.spec b/cross-rx-binutils.spec index 1ae07c2..e1224c3 100644 --- a/cross-rx-binutils.spec +++ b/cross-rx-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-s390-binutils.changes b/cross-s390-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-s390-binutils.changes +++ b/cross-s390-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-s390-binutils.spec b/cross-s390-binutils.spec index f683899..3a4f68a 100644 --- a/cross-s390-binutils.spec +++ b/cross-s390-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-s390x-binutils.changes b/cross-s390x-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-s390x-binutils.changes +++ b/cross-s390x-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-s390x-binutils.spec b/cross-s390x-binutils.spec index a240dc5..f702eaa 100644 --- a/cross-s390x-binutils.spec +++ b/cross-s390x-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-sparc-binutils.changes b/cross-sparc-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-sparc-binutils.changes +++ b/cross-sparc-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-sparc-binutils.spec b/cross-sparc-binutils.spec index 2739651..fb2c6a8 100644 --- a/cross-sparc-binutils.spec +++ b/cross-sparc-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-sparc64-binutils.changes b/cross-sparc64-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-sparc64-binutils.changes +++ b/cross-sparc64-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-sparc64-binutils.spec b/cross-sparc64-binutils.spec index a851dc4..15e5927 100644 --- a/cross-sparc64-binutils.spec +++ b/cross-sparc64-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-spu-binutils.changes b/cross-spu-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-spu-binutils.changes +++ b/cross-spu-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-spu-binutils.spec b/cross-spu-binutils.spec index a2d719f..77b6152 100644 --- a/cross-spu-binutils.spec +++ b/cross-spu-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-x86_64-binutils.changes b/cross-x86_64-binutils.changes index a7dd3d7..5c6ed0c 100644 --- a/cross-x86_64-binutils.changes +++ b/cross-x86_64-binutils.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de + +- riscv-relax-versioned-hidden.patch: RISC-V: Fix symbol address problem + with versioned symbols (PR ld/22756) + ------------------------------------------------------------------- Sat May 12 20:57:32 UTC 2018 - afaerber@suse.de diff --git a/cross-x86_64-binutils.spec b/cross-x86_64-binutils.spec index ec33e20..24ac510 100644 --- a/cross-x86_64-binutils.spec +++ b/cross-x86_64-binutils.spec @@ -99,6 +99,7 @@ Patch35: riscv-wrap-relax.patch Patch36: binutils-pr22868.diff Patch37: riscv-relax-size.patch Patch38: riscv-relax-relocatable.patch +Patch39: riscv-relax-versioned-hidden.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -172,6 +173,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/riscv-relax-versioned-hidden.patch b/riscv-relax-versioned-hidden.patch new file mode 100644 index 0000000..1873ebd --- /dev/null +++ b/riscv-relax-versioned-hidden.patch @@ -0,0 +1,26 @@ +2018-06-03 Jim Wilson + + PR ld/22756 + * elfnn-riscv.c (riscv_relax_delete_bytes): Add versioned_hidden check + to code that ignores duplicate symbols. + +Index: binutils-2.30/bfd/elfnn-riscv.c +=================================================================== +--- binutils-2.30.orig/bfd/elfnn-riscv.c ++++ binutils-2.30/bfd/elfnn-riscv.c +@@ -2666,9 +2666,12 @@ riscv_relax_delete_bytes (bfd *abfd, ase + call to SYMBOL as well. Since both __wrap_SYMBOL and SYMBOL reference + the same symbol (which is __wrap_SYMBOL), but still exist as two + different symbols in 'sym_hashes', we don't want to adjust +- the global symbol __wrap_SYMBOL twice. +- This check is only relevant when symbols are being wrapped. */ +- if (link_info->wrap_hash != NULL) ++ the global symbol __wrap_SYMBOL twice. */ ++ /* The same problem occurs with symbols that are versioned_hidden, as ++ foo becomes an alias for foo@BAR, and hence they need the same ++ treatment. */ ++ if (link_info->wrap_hash != NULL ++ || sym_hash->versioned == versioned_hidden) + { + struct elf_link_hash_entry **cur_sym_hashes; +