- Update to 2.29 branch (@de44148c), fixing PR21884, a segfault

in ld while building memtest86+ .
  Changes binutils-2.29-branch.diff.

OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=246
This commit is contained in:
Michael Matz 2017-08-10 14:50:48 +00:00 committed by Git OBS Bridge
parent 871c3164ec
commit a30a0a2021
23 changed files with 796 additions and 20 deletions

View File

@ -1,8 +1,32 @@
diff --git a/bfd/ChangeLog b/bfd/ChangeLog diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 89f4338..1478710 100644 index 89f4338..211e340 100644
--- a/bfd/ChangeLog --- a/bfd/ChangeLog
+++ b/bfd/ChangeLog +++ b/bfd/ChangeLog
@@ -1,3 +1,29 @@ @@ -1,3 +1,53 @@
+2017-08-08 Alan Modra <amodra@gmail.com>
+
+ PR 21017
+ * elf32-microblaze.c (microblaze_elf_check_relocs): Don't bump
+ got.refcount for GOTOFF relocs, just create .got section.
+
+2017-08-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ Backport from mainline
+ 2017-08-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * elf32-s390.c (elf_s390_finish_dynamic_sections): Skip if it
+ isn't the S/390 specific elf data.
+ * elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise.
+
+2017-08-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ Backport from mainline
+ 2017-07-28 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * elf32-s390.c (elf_s390_finish_dynamic_sections): Add NULL
+ pointer check for htab->elf.irelplt.
+ * elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise.
+
+2017-07-31 Alan Modra <amodra@gmail.com> +2017-07-31 Alan Modra <amodra@gmail.com>
+ +
+ * elf64-ppc.c (ppc64_elf_tls_setup): Warn on --plt-localentry + * elf64-ppc.c (ppc64_elf_tls_setup): Warn on --plt-localentry
@ -128,6 +152,61 @@ index b001a88..cd31410 100644
# Controls whether to enable development-mode features by default. # Controls whether to enable development-mode features by default.
-development=false -development=false
+development=true +development=true
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
index 2657736..94ef09e 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -2353,7 +2353,6 @@ microblaze_elf_check_relocs (bfd * abfd,
dogottls:
sec->has_tls_reloc = 1;
/* Fall through. */
- case R_MICROBLAZE_GOTOFF_64:
case R_MICROBLAZE_GOT_64:
if (htab->elf.sgot == NULL)
{
@@ -2374,6 +2373,17 @@ microblaze_elf_check_relocs (bfd * abfd,
}
break;
+ case R_MICROBLAZE_GOTOFF_64:
+ case R_MICROBLAZE_GOTOFF_32:
+ if (htab->elf.sgot == NULL)
+ {
+ if (htab->elf.dynobj == NULL)
+ htab->elf.dynobj = abfd;
+ if (!_bfd_elf_create_got_section (htab->elf.dynobj, info))
+ return FALSE;
+ }
+ break;
+
case R_MICROBLAZE_64:
case R_MICROBLAZE_64_PCREL:
case R_MICROBLAZE_32:
diff --git a/bfd/elf32-s390.c b/bfd/elf32-s390.c
index c26bdcf..4aa3915 100644
--- a/bfd/elf32-s390.c
+++ b/bfd/elf32-s390.c
@@ -3941,7 +3941,9 @@ elf_s390_finish_dynamic_sections (bfd *output_bfd,
break;
case DT_PLTRELSZ:
- dyn.d_un.d_val = htab->elf.srelplt->size + htab->elf.irelplt->size;
+ dyn.d_un.d_val = htab->elf.srelplt->size;
+ if (htab->elf.irelplt)
+ dyn.d_un.d_val += htab->elf.irelplt->size;
break;
}
@@ -3999,6 +4001,9 @@ elf_s390_finish_dynamic_sections (bfd *output_bfd,
symtab_hdr = &elf_symtab_hdr (ibfd);
+ if (!is_s390_elf (ibfd))
+ continue;
+
local_plt = elf_s390_local_plt (ibfd);
if (local_plt != NULL)
for (i = 0; i < symtab_hdr->sh_info; i++)
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 6389cd2..689eac8 100644 index 6389cd2..689eac8 100644
--- a/bfd/elf64-ppc.c --- a/bfd/elf64-ppc.c
@ -201,6 +280,42 @@ index 6389cd2..689eac8 100644
htab->tls_get_addr = ((struct ppc_link_hash_entry *) htab->tls_get_addr = ((struct ppc_link_hash_entry *)
elf_link_hash_lookup (&htab->elf, ".__tls_get_addr", elf_link_hash_lookup (&htab->elf, ".__tls_get_addr",
diff --git a/bfd/elf64-s390.c b/bfd/elf64-s390.c
index f85f8cd..d25c72b 100644
--- a/bfd/elf64-s390.c
+++ b/bfd/elf64-s390.c
@@ -3745,7 +3745,9 @@ elf_s390_finish_dynamic_sections (bfd *output_bfd,
break;
case DT_PLTRELSZ:
- dyn.d_un.d_val = htab->elf.srelplt->size + htab->elf.irelplt->size;
+ dyn.d_un.d_val = htab->elf.srelplt->size;
+ if (htab->elf.irelplt)
+ dyn.d_un.d_val += htab->elf.irelplt->size;
break;
case DT_RELASZ:
@@ -3756,7 +3758,9 @@ elf_s390_finish_dynamic_sections (bfd *output_bfd,
linker script arranges for .rela.plt to follow all
other relocation sections, we don't have to worry
about changing the DT_RELA entry. */
- dyn.d_un.d_val -= htab->elf.srelplt->size + htab->elf.irelplt->size;
+ dyn.d_un.d_val -= htab->elf.srelplt->size;
+ if (htab->elf.irelplt)
+ dyn.d_un.d_val -= htab->elf.irelplt->size;
break;
}
@@ -3810,6 +3814,9 @@ elf_s390_finish_dynamic_sections (bfd *output_bfd,
symtab_hdr = &elf_symtab_hdr (ibfd);
+ if (!is_s390_elf (ibfd))
+ continue;
+
local_plt = elf_s390_local_plt (ibfd);
if (local_plt != NULL)
for (i = 0; i < symtab_hdr->sh_info; i++)
diff --git a/bfd/po/fr.po b/bfd/po/fr.po diff --git a/bfd/po/fr.po b/bfd/po/fr.po
index 6cd65af..fe2855f 100644 index 6cd65af..fe2855f 100644
--- a/bfd/po/fr.po --- a/bfd/po/fr.po
@ -10980,12 +11095,12 @@ index 6cd65af..fe2855f 100644
#~ msgid "%B: %A+0x%lx: jump to stub routine which is not jal" #~ msgid "%B: %A+0x%lx: jump to stub routine which is not jal"
#~ msgstr "%B: %A+0x%lx: saut vers la routine dans la partie de l'ébauche (stub) qui n'est pas jal" #~ msgstr "%B: %A+0x%lx: saut vers la routine dans la partie de l'ébauche (stub) qui n'est pas jal"
diff --git a/bfd/version.h b/bfd/version.h diff --git a/bfd/version.h b/bfd/version.h
index f3dfbf0..4682063 100644 index f3dfbf0..bed15b5 100644
--- a/bfd/version.h --- a/bfd/version.h
+++ b/bfd/version.h +++ b/bfd/version.h
@@ -1,4 +1,4 @@ @@ -1,4 +1,4 @@
-#define BFD_VERSION_DATE 20170724 -#define BFD_VERSION_DATE 20170724
+#define BFD_VERSION_DATE 20170731 +#define BFD_VERSION_DATE 20170810
#define BFD_VERSION @bfd_version@ #define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@ #define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@ #define REPORT_BUGS_TO @report_bugs_to@
@ -11145,20 +11260,87 @@ index a57f547..cccec4c 100644
template<int size, bool big_endian> template<int size, bool big_endian>
diff --git a/gas/ChangeLog b/gas/ChangeLog diff --git a/gas/ChangeLog b/gas/ChangeLog
index d5b208a..ee0d00c 100644 index d5b208a..e4756be 100644
--- a/gas/ChangeLog --- a/gas/ChangeLog
+++ b/gas/ChangeLog +++ b/gas/ChangeLog
@@ -2,6 +2,10 @@ @@ -1,3 +1,36 @@
+2017-08-09 Jiong Wang <jiong.wang@arm.com>
* configure: Regenerate. +
+ * config/tc-arm.c (do_crc32_1): Remove warning on REG_SP for thumb_mode.
+ * testsuite/gas/arm/crc32-armv8-a-bad.d: Update exepcted result.
+ * testsuite/gas/arm/crc32-armv8-r-bad.d: Likewise.
+ * testsuite/gas/arm/crc32-armv8-a.d: Likewise.
+ * testsuite/gas/arm/crc32-armv8-r.d: Likewise.
+ * testsuite/gas/arm/crc32-armv8-ar-bad.s: Update test case.
+ * testsuite/gas/arm/crc32-armv8-ar.s: Likewise.
+ * testsuite/gas/arm/crc32-bad.l: Update expected error message.
+
+2017-08-02 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2017-07-31 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/tc-hppa.c (pa_ip): Clear `d' bit in branch on bit instructions
+ with a double-word condition and a fixed bit position greater than 31.
+
+2017-08-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ Backport from mainline
+ 2017-07-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/tc-s390.c (s390_parse_cpu): Add z14 as alternate CPU
+ name.
+ * doc/as.texinfo: Add z14 to CPU string list.
+ * doc/c-s390.texi: Likewise.
+
+2017-07-24 Tristan Gingold <gingold@adacore.com> +2017-07-24 Tristan Gingold <gingold@adacore.com>
+ +
+ * configure: Regenerate. + * configure: Regenerate.
+ +
2017-07-18 Nick Clifton <nickc@redhat.com> 2017-07-24 Tristan Gingold <gingold@adacore.com>
* po/es.po: Updated translation. * configure: Regenerate.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index e22ffe6..c3662da 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -17598,8 +17598,6 @@ do_crc32_1 (unsigned int poly, unsigned int sz)
if (Rd == REG_PC || Rn == REG_PC || Rm == REG_PC)
as_warn (UNPRED_REG ("r15"));
- if (thumb_mode && (Rd == REG_SP || Rn == REG_SP || Rm == REG_SP))
- as_warn (UNPRED_REG ("r13"));
}
static void
diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c
index 724b48b..e4ec892 100644
--- a/gas/config/tc-hppa.c
+++ b/gas/config/tc-hppa.c
@@ -5216,9 +5216,7 @@ pa_ip (char *str)
s = expr_end;
CHECK_FIELD (num, 63, 0, strict);
if (num & 0x20)
- ;
- else
- opcode |= (1 << 13);
+ opcode &= ~(1 << 13);
INSERT_FIELD_AND_CONTINUE (opcode, num & 0x1f, 21);
/* Handle a 5 bit immediate at 10. */
diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
index 3ec5a27..84b2e27 100644
--- a/gas/config/tc-s390.c
+++ b/gas/config/tc-s390.c
@@ -290,7 +290,7 @@ s390_parse_cpu (const char * arg,
S390_INSTR_FLAG_HTM },
{ STRING_COMMA_LEN ("z13"), STRING_COMMA_LEN ("arch11"),
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
- { STRING_COMMA_LEN ("arch12"), STRING_COMMA_LEN (""),
+ { STRING_COMMA_LEN ("z14"), STRING_COMMA_LEN ("arch12"),
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
};
static struct
diff --git a/gas/configure b/gas/configure diff --git a/gas/configure b/gas/configure
index e78136c..b385894 100755 index e78136c..b385894 100755
--- a/gas/configure --- a/gas/configure
@ -11245,6 +11427,166 @@ index e78136c..b385894 100755
configured by $0, generated by GNU Autoconf 2.64, configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index e0637c7..b82204d 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -1740,7 +1740,7 @@ Specify which s390 processor variant is the target, @samp{g5} (or
@samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or
@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
-@samp{z13} (or @samp{arch11}), or @samp{arch12}.
+@samp{z13} (or @samp{arch11}), or @samp{z14} (or @samp{arch12}).
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi
index 2f417cb..a50d726 100644
--- a/gas/doc/c-s390.texi
+++ b/gas/doc/c-s390.texi
@@ -18,7 +18,7 @@ and eleven chip levels. The architecture modes are the Enterprise System
Architecture (ESA) and the newer z/Architecture mode. The chip levels
are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
-(or arch11), and arch12.
+(or arch11), and z14 (or arch12).
@menu
* s390 Options:: Command-line Options.
diff --git a/gas/testsuite/gas/arm/crc32-armv8-a-bad.d b/gas/testsuite/gas/arm/crc32-armv8-a-bad.d
index 18d4844..bc559e0 100644
--- a/gas/testsuite/gas/arm/crc32-armv8-a-bad.d
+++ b/gas/testsuite/gas/arm/crc32-armv8-a-bad.d
@@ -15,9 +15,9 @@ Disassembly of section .text:
0+c <[^>]*> e10f0242 crc32cb r0, pc, r2 ; <UNPREDICTABLE>
0+10 <[^>]*> e121f242 crc32ch pc, r1, r2 ; <UNPREDICTABLE>
0+14 <[^>]*> e14f0242 crc32cw r0, pc, r2 ; <UNPREDICTABLE>
-0+18 <[^>]*> fac1 fd82 crc32b sp, r1, r2 ; <UNPREDICTABLE>
+0+18 <[^>]*> fac1 ff82 crc32b pc, r1, r2 ; <UNPREDICTABLE>
0+1c <[^>]*> facf f092 crc32h r0, pc, r2 ; <UNPREDICTABLE>
-0+20 <[^>]*> fac1 f0ad crc32w r0, r1, sp ; <UNPREDICTABLE>
+0+20 <[^>]*> fac1 f0af crc32w r0, r1, pc ; <UNPREDICTABLE>
0+24 <[^>]*> fadf f082 crc32cb r0, pc, r2 ; <UNPREDICTABLE>
-0+28 <[^>]*> fad1 fd92 crc32ch sp, r1, r2 ; <UNPREDICTABLE>
+0+28 <[^>]*> fad1 ff92 crc32ch pc, r1, r2 ; <UNPREDICTABLE>
0+2c <[^>]*> fadf f0a2 crc32cw r0, pc, r2 ; <UNPREDICTABLE>
diff --git a/gas/testsuite/gas/arm/crc32-armv8-a.d b/gas/testsuite/gas/arm/crc32-armv8-a.d
index b09942e..1374553 100644
--- a/gas/testsuite/gas/arm/crc32-armv8-a.d
+++ b/gas/testsuite/gas/arm/crc32-armv8-a.d
@@ -20,4 +20,15 @@ Disassembly of section .text:
0+24 <[^>]*> fad1 f082 crc32cb r0, r1, r2
0+28 <[^>]*> fad1 f092 crc32ch r0, r1, r2
0+2c <[^>]*> fad1 f0a2 crc32cw r0, r1, r2
-
+0+30 <[^>]*> e101d042 crc32b sp, r1, r2
+0+34 <[^>]*> e12db042 crc32h fp, sp, r2
+0+38 <[^>]*> e141004d crc32w r0, r1, sp
+0+3c <[^>]*> e10d9242 crc32cb r9, sp, r2
+0+40 <[^>]*> e121d248 crc32ch sp, r1, r8
+0+44 <[^>]*> e141a24d crc32cw sl, r1, sp
+0+48 <[^>]*> fac1 fc8d crc32b ip, r1, sp
+0+4c <[^>]*> facd fa92 crc32h r5, sp, r2
+0+50 <[^>]*> fac1 fda7 crc32w sp, r1, r7
+0+54 <[^>]*> fadd f082 crc32cb r0, sp, r2
+0+58 <[^>]*> fad5 f09d crc32ch r0, r5, sp
+0+5c <[^>]*> fad1 fda9 crc32cw sp, r1, r9
diff --git a/gas/testsuite/gas/arm/crc32-armv8-ar-bad.s b/gas/testsuite/gas/arm/crc32-armv8-ar-bad.s
index 4e497e3..847156c 100644
--- a/gas/testsuite/gas/arm/crc32-armv8-ar-bad.s
+++ b/gas/testsuite/gas/arm/crc32-armv8-ar-bad.s
@@ -9,9 +9,9 @@ crc32ch r15, r1, r2
crc32cw r0, r15, r2
.thumb
-crc32b r13, r1, r2
+crc32b r15, r1, r2
crc32h r0, r15, r2
-crc32w r0, r1, r13
+crc32w r0, r1, r15
crc32cb r0, r15, r2
-crc32ch r13, r1, r2
+crc32ch r15, r1, r2
crc32cw r0, r15, r2
diff --git a/gas/testsuite/gas/arm/crc32-armv8-ar.s b/gas/testsuite/gas/arm/crc32-armv8-ar.s
index 63c1d68..9a0edf7 100644
--- a/gas/testsuite/gas/arm/crc32-armv8-ar.s
+++ b/gas/testsuite/gas/arm/crc32-armv8-ar.s
@@ -15,3 +15,19 @@ crc32w r0, r1, r2
crc32cb r0, r1, r2
crc32ch r0, r1, r2
crc32cw r0, r1, r2
+
+.arm
+crc32b sp, r1, r2
+crc32h r11, sp, r2
+crc32w r0, r1, sp
+crc32cb r9, sp, r2
+crc32ch sp, r1, r8
+crc32cw r10, r1, sp
+
+.thumb
+crc32b r12, r1, sp
+crc32h r10, sp, r2
+crc32w sp, r1, r7
+crc32cb r0, sp, r2
+crc32ch r0, r5, sp
+crc32cw sp, r1, r9
diff --git a/gas/testsuite/gas/arm/crc32-armv8-r-bad.d b/gas/testsuite/gas/arm/crc32-armv8-r-bad.d
index a1a4f61..4e6fe3f 100644
--- a/gas/testsuite/gas/arm/crc32-armv8-r-bad.d
+++ b/gas/testsuite/gas/arm/crc32-armv8-r-bad.d
@@ -15,9 +15,9 @@ Disassembly of section .text:
0+c <[^>]*> e10f0242 crc32cb r0, pc, r2 ; <UNPREDICTABLE>
0+10 <[^>]*> e121f242 crc32ch pc, r1, r2 ; <UNPREDICTABLE>
0+14 <[^>]*> e14f0242 crc32cw r0, pc, r2 ; <UNPREDICTABLE>
-0+18 <[^>]*> fac1 fd82 crc32b sp, r1, r2 ; <UNPREDICTABLE>
+0+18 <[^>]*> fac1 ff82 crc32b pc, r1, r2 ; <UNPREDICTABLE>
0+1c <[^>]*> facf f092 crc32h r0, pc, r2 ; <UNPREDICTABLE>
-0+20 <[^>]*> fac1 f0ad crc32w r0, r1, sp ; <UNPREDICTABLE>
+0+20 <[^>]*> fac1 f0af crc32w r0, r1, pc ; <UNPREDICTABLE>
0+24 <[^>]*> fadf f082 crc32cb r0, pc, r2 ; <UNPREDICTABLE>
-0+28 <[^>]*> fad1 fd92 crc32ch sp, r1, r2 ; <UNPREDICTABLE>
+0+28 <[^>]*> fad1 ff92 crc32ch pc, r1, r2 ; <UNPREDICTABLE>
0+2c <[^>]*> fadf f0a2 crc32cw r0, pc, r2 ; <UNPREDICTABLE>
diff --git a/gas/testsuite/gas/arm/crc32-armv8-r.d b/gas/testsuite/gas/arm/crc32-armv8-r.d
index b179821..6918e07 100644
--- a/gas/testsuite/gas/arm/crc32-armv8-r.d
+++ b/gas/testsuite/gas/arm/crc32-armv8-r.d
@@ -20,4 +20,15 @@ Disassembly of section .text:
0+24 <[^>]*> fad1 f082 crc32cb r0, r1, r2
0+28 <[^>]*> fad1 f092 crc32ch r0, r1, r2
0+2c <[^>]*> fad1 f0a2 crc32cw r0, r1, r2
-
+0+30 <[^>]*> e101d042 crc32b sp, r1, r2
+0+34 <[^>]*> e12db042 crc32h fp, sp, r2
+0+38 <[^>]*> e141004d crc32w r0, r1, sp
+0+3c <[^>]*> e10d9242 crc32cb r9, sp, r2
+0+40 <[^>]*> e121d248 crc32ch sp, r1, r8
+0+44 <[^>]*> e141a24d crc32cw sl, r1, sp
+0+48 <[^>]*> fac1 fc8d crc32b ip, r1, sp
+0+4c <[^>]*> facd fa92 crc32h r5, sp, r2
+0+50 <[^>]*> fac1 fda7 crc32w sp, r1, r7
+0+54 <[^>]*> fadd f082 crc32cb r0, sp, r2
+0+58 <[^>]*> fad5 f09d crc32ch r0, r5, sp
+0+5c <[^>]*> fad1 fda9 crc32cw sp, r1, r9
diff --git a/gas/testsuite/gas/arm/crc32-bad.l b/gas/testsuite/gas/arm/crc32-bad.l
index ea520aa..01e1d22 100644
--- a/gas/testsuite/gas/arm/crc32-bad.l
+++ b/gas/testsuite/gas/arm/crc32-bad.l
@@ -5,9 +5,9 @@
[^:]*.s:7: Warning: using r15 results in unpredictable behaviour
[^:]*.s:8: Warning: using r15 results in unpredictable behaviour
[^:]*.s:9: Warning: using r15 results in unpredictable behaviour
-[^:]*.s:12: Warning: using r13 results in unpredictable behaviour
+[^:]*.s:12: Warning: using r15 results in unpredictable behaviour
[^:]*.s:13: Warning: using r15 results in unpredictable behaviour
-[^:]*.s:14: Warning: using r13 results in unpredictable behaviour
+[^:]*.s:14: Warning: using r15 results in unpredictable behaviour
[^:]*.s:15: Warning: using r15 results in unpredictable behaviour
-[^:]*.s:16: Warning: using r13 results in unpredictable behaviour
+[^:]*.s:16: Warning: using r15 results in unpredictable behaviour
[^:]*.s:17: Warning: using r15 results in unpredictable behaviour
diff --git a/gold/ChangeLog b/gold/ChangeLog diff --git a/gold/ChangeLog b/gold/ChangeLog
index b1b30cb..39a6bf1 100644 index b1b30cb..39a6bf1 100644
--- a/gold/ChangeLog --- a/gold/ChangeLog
@ -11429,10 +11771,28 @@ index 30aa546..fb9f076 100755
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/ld/ChangeLog b/ld/ChangeLog diff --git a/ld/ChangeLog b/ld/ChangeLog
index bc7d797..d16399b 100644 index bc7d797..8c374e3 100644
--- a/ld/ChangeLog --- a/ld/ChangeLog
+++ b/ld/ChangeLog +++ b/ld/ChangeLog
@@ -1,3 +1,21 @@ @@ -1,3 +1,39 @@
+2017-08-03 Alan Modra <amodra@gmail.com>
+
+ PR ld/21884
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Revert
+ last change. Rename iself to elfinput. Expand comments. Condition
+ ELF checks on having both input and output ELF files. Extract..
+ (elf_orphan_compatible): ..this new function.
+
+2017-08-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/21884
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check
+ ELF section header only for ELF output.
+ * testsuite/ld-elf/pr21884.d: New test.
+ * testsuite/ld-elf/pr21884.t: Likewise.
+ * testsuite/ld-elf/pr21884a.s: Likewise.
+ * testsuite/ld-elf/pr21884b.s: Likewise.
+
+2017-07-31 Alan Modra <amodra@gmail.com> +2017-07-31 Alan Modra <amodra@gmail.com>
+ +
+ * ld.texinfo (plt-localentry): Revise. + * ld.texinfo (plt-localentry): Revise.
@ -11540,6 +11900,143 @@ index da20ab5..7b66a4f 100755
configured by $0, generated by GNU Autoconf 2.64, configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em
index d2551b6..9ac1840 100644
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -2008,6 +2008,29 @@ output_rel_find (asection *sec, int isdyn)
return last;
}
+/* Return whether IN is suitable to be part of OUT. */
+
+static bfd_boolean
+elf_orphan_compatible (asection *in, asection *out)
+{
+ /* Non-zero sh_info implies a section with SHF_INFO_LINK with
+ unknown semantics for the generic linker, or a SHT_REL/SHT_RELA
+ section where sh_info specifies a symbol table. (We won't see
+ SHT_GROUP, SHT_SYMTAB or SHT_DYNSYM sections here.) We clearly
+ can't merge SHT_REL/SHT_RELA using differing symbol tables, and
+ shouldn't merge sections with differing unknown semantics. */
+ if (elf_section_data (out)->this_hdr.sh_info
+ != elf_section_data (in)->this_hdr.sh_info)
+ return FALSE;
+ /* We can't merge two sections with differing SHF_EXCLUDE when doing
+ a relocatable link. */
+ if (bfd_link_relocatable (&link_info)
+ && ((elf_section_flags (out) ^ elf_section_flags (in)) & SHF_EXCLUDE) != 0)
+ return FALSE;
+ return _bfd_elf_match_sections_by_type (link_info.output_bfd, out,
+ in->owner, in);
+}
+
/* Place an orphan section. We use this to put random SHF_ALLOC
sections in the right segment. */
@@ -2064,8 +2087,9 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
lang_output_section_statement_type *os;
lang_output_section_statement_type *match_by_name = NULL;
int isdyn = 0;
- int iself = s->owner->xvec->flavour == bfd_target_elf_flavour;
- unsigned int sh_type = iself ? elf_section_type (s) : SHT_NULL;
+ int elfinput = s->owner->xvec->flavour == bfd_target_elf_flavour;
+ int elfoutput = link_info.output_bfd->xvec->flavour == bfd_target_elf_flavour;
+ unsigned int sh_type = elfinput ? elf_section_type (s) : SHT_NULL;
flagword flags;
asection *nexts;
@@ -2073,7 +2097,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
&& link_info.combreloc
&& (s->flags & SEC_ALLOC))
{
- if (iself)
+ if (elfinput)
switch (sh_type)
{
case SHT_RELA:
@@ -2095,6 +2119,8 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
}
if (!bfd_link_relocatable (&link_info)
+ && elfinput
+ && elfoutput
&& (s->flags & SEC_ALLOC) != 0
&& (elf_section_flags (s) & SHF_GNU_MBIND) != 0)
{
@@ -2135,7 +2161,10 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
secname = ".mbind.text";
}
- /* Look through the script to see where to place this section. */
+ /* Look through the script to see where to place this section. The
+ script includes entries added by previous lang_insert_orphan
+ calls, so this loop puts multiple compatible orphans of the same
+ name into a single output section. */
if (constraint == 0)
for (os = lang_output_section_find (secname);
os != NULL;
@@ -2145,29 +2174,19 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
lang_insert_orphan to create a new output section. */
constraint = SPECIAL;
- /* SEC_EXCLUDE is cleared when doing a relocatable link. But
- we can't merge 2 input sections with the same name when only
- one of them has SHF_EXCLUDE. Don't merge 2 sections with
- different sh_info. */
+ /* Check to see if we already have an output section statement
+ with this name, and its bfd section has compatible flags.
+ If the section already exists but does not have any flags
+ set, then it has been created by the linker, possibly as a
+ result of a --section-start command line switch. */
if (os->bfd_section != NULL
- && (elf_section_data (os->bfd_section)->this_hdr.sh_info
- == elf_section_data (s)->this_hdr.sh_info)
&& (os->bfd_section->flags == 0
- || ((!bfd_link_relocatable (&link_info)
- || (iself && (((elf_section_flags (s)
- ^ elf_section_flags (os->bfd_section))
- & SHF_EXCLUDE) == 0)))
- && ((s->flags ^ os->bfd_section->flags)
+ || (((s->flags ^ os->bfd_section->flags)
& (SEC_LOAD | SEC_ALLOC)) == 0
- && _bfd_elf_match_sections_by_type (link_info.output_bfd,
- os->bfd_section,
- s->owner, s))))
+ && (!elfinput
+ || !elfoutput
+ || elf_orphan_compatible (s, os->bfd_section)))))
{
- /* We already have an output section statement with this
- name, and its bfd section has compatible flags.
- If the section already exists but does not have any flags
- set, then it has been created by the linker, probably as a
- result of a --section-start command line switch. */
lang_add_section (&os->children, s, NULL, os);
return os;
}
@@ -2243,8 +2262,8 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
else if ((flags & SEC_ALLOC) == 0)
;
else if ((flags & SEC_LOAD) != 0
- && ((iself && sh_type == SHT_NOTE)
- || (!iself && CONST_STRNEQ (secname, ".note"))))
+ && ((elfinput && sh_type == SHT_NOTE)
+ || (!elfinput && CONST_STRNEQ (secname, ".note"))))
place = &hold[orphan_interp];
else if ((flags & (SEC_LOAD | SEC_HAS_CONTENTS | SEC_THREAD_LOCAL)) == 0)
place = &hold[orphan_bss];
@@ -2254,8 +2273,8 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
place = &hold[orphan_tdata];
else if ((flags & SEC_READONLY) == 0)
place = &hold[orphan_data];
- else if (((iself && (sh_type == SHT_RELA || sh_type == SHT_REL))
- || (!iself && CONST_STRNEQ (secname, ".rel")))
+ else if (((elfinput && (sh_type == SHT_RELA || sh_type == SHT_REL))
+ || (!elfinput && CONST_STRNEQ (secname, ".rel")))
&& (flags & SEC_LOAD) != 0)
place = &hold[orphan_rel];
else if ((flags & SEC_CODE) == 0)
diff --git a/ld/ld.texinfo b/ld/ld.texinfo diff --git a/ld/ld.texinfo b/ld/ld.texinfo
index bb5f719..5d0b007 100644 index bb5f719..5d0b007 100644
--- a/ld/ld.texinfo --- a/ld/ld.texinfo
@ -11591,21 +12088,132 @@ index 07553b4..7a146b7 100644
${RELOCATING+. = ALIGN(2);} ${RELOCATING+. = ALIGN(2);}
/* For tablejump instruction arrays. We don't relax /* For tablejump instruction arrays. We don't relax
diff --git a/ld/testsuite/ld-elf/pr21884.d b/ld/testsuite/ld-elf/pr21884.d
new file mode 100644
index 0000000..52cd2c1
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr21884.d
@@ -0,0 +1,11 @@
+#source: pr21884a.s
+#source: pr21884b.s
+#ld: -T pr21884.t
+#objdump: -b binary -s
+#notarget: aarch64*-*-* arm*-*-* nds32*-*-*
+# Skip targets which can't change output format to binary.
+
+.*: file format binary
+
+Contents of section .data:
+#pass
diff --git a/ld/testsuite/ld-elf/pr21884.t b/ld/testsuite/ld-elf/pr21884.t
new file mode 100644
index 0000000..d483911
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr21884.t
@@ -0,0 +1,7 @@
+OUTPUT_FORMAT("binary")
+
+ENTRY(_main);
+SECTIONS {
+ . = 0;
+ .setup : { *(.setup) }
+}
diff --git a/ld/testsuite/ld-elf/pr21884a.s b/ld/testsuite/ld-elf/pr21884a.s
new file mode 100644
index 0000000..a3361b2
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr21884a.s
@@ -0,0 +1,5 @@
+ .text
+ .globl _main
+ .type _main,%function
+_main:
+ .dc.a bar
diff --git a/ld/testsuite/ld-elf/pr21884b.s b/ld/testsuite/ld-elf/pr21884b.s
new file mode 100644
index 0000000..e533837
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr21884b.s
@@ -0,0 +1,5 @@
+ .text
+ .globl bar
+ .type bar,%function
+bar:
+ .byte 0
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f48c01e..e535ba4 100644 index f48c01e..f13e503 100644
--- a/opcodes/ChangeLog --- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog +++ b/opcodes/ChangeLog
@@ -2,6 +2,10 @@ @@ -1,3 +1,22 @@
+2017-08-09 Jiong Wang <jiong.wang@arm.com>
* configure: Regenerate. +
+ * arm-dis.c (thumb32_opcodes): Use format 'R' instead of 'S' for
+ register operands in CRC instructions.
+ (print_insn_thumb32): Remove "<bitfield>S" support. Updated the
+ comments.
+
+2017-08-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ Backport from mainline
+ 2017-07-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * s390-mkopc.c (main): Enable z14 as CPU string in the opcode
+ table.
+
+2017-07-24 Tristan Gingold <gingold@adacore.com> +2017-07-24 Tristan Gingold <gingold@adacore.com>
+ +
+ * configure: Regenerate. + * configure: Regenerate.
+ +
2017-07-20 Nick Clifton <nickc@redhat.com> 2017-07-24 Tristan Gingold <gingold@adacore.com>
* po/de.po: Updated German translation. * configure: Regenerate.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 2500004..59a5978 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2699,7 +2699,6 @@ static const struct opcode16 thumb_opcodes[] =
%<bitfield>W print bitfield*4 in decimal
%<bitfield>r print bitfield as an ARM register
%<bitfield>R as %<>r but r15 is UNPREDICTABLE
- %<bitfield>S as %<>R but r13 is UNPREDICTABLE
%<bitfield>c print bitfield as a condition code
%<bitfield>'c print specified char iff bitfield is all ones
@@ -2767,17 +2766,17 @@ static const struct opcode32 thumb32_opcodes[] =
/* CRC32 instructions. */
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
- 0xfac0f080, 0xfff0f0f0, "crc32b\t%8-11S, %16-19S, %0-3S"},
+ 0xfac0f080, 0xfff0f0f0, "crc32b\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
- 0xfac0f090, 0xfff0f0f0, "crc32h\t%9-11S, %16-19S, %0-3S"},
+ 0xfac0f090, 0xfff0f0f0, "crc32h\t%9-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
- 0xfac0f0a0, 0xfff0f0f0, "crc32w\t%8-11S, %16-19S, %0-3S"},
+ 0xfac0f0a0, 0xfff0f0f0, "crc32w\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
- 0xfad0f080, 0xfff0f0f0, "crc32cb\t%8-11S, %16-19S, %0-3S"},
+ 0xfad0f080, 0xfff0f0f0, "crc32cb\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
- 0xfad0f090, 0xfff0f0f0, "crc32ch\t%8-11S, %16-19S, %0-3S"},
+ 0xfad0f090, 0xfff0f0f0, "crc32ch\t%8-11R, %16-19R, %0-3R"},
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
- 0xfad0f0a0, 0xfff0f0f0, "crc32cw\t%8-11S, %16-19S, %0-3S"},
+ 0xfad0f0a0, 0xfff0f0f0, "crc32cw\t%8-11R, %16-19R, %0-3R"},
/* V7 instructions. */
{ARM_FEATURE_CORE_LOW (ARM_EXT_V7), 0xf910f000, 0xff70f000, "pli%c\t%a"},
@@ -5987,10 +5986,6 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
value_in_comment = val * 4;
break;
- case 'S':
- if (val == 13)
- is_unpredictable = TRUE;
- /* Fall through. */
case 'R':
if (val == 15)
is_unpredictable = TRUE;
diff --git a/opcodes/configure b/opcodes/configure diff --git a/opcodes/configure b/opcodes/configure
index 2bedc8d..fda599a 100755 index 2bedc8d..fda599a 100755
--- a/opcodes/configure --- a/opcodes/configure
@ -11692,3 +12300,17 @@ index 2bedc8d..fda599a 100755
configured by $0, generated by GNU Autoconf 2.64, configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c
index 0d4c9df..20c1539 100644
--- a/opcodes/s390-mkopc.c
+++ b/opcodes/s390-mkopc.c
@@ -374,7 +374,8 @@ main (void)
else if (strcmp (cpu_string, "z13") == 0
|| strcmp (cpu_string, "arch11") == 0)
min_cpu = S390_OPCODE_Z13;
- else if (strcmp (cpu_string, "arch12") == 0)
+ else if (strcmp (cpu_string, "z14") == 0
+ || strcmp (cpu_string, "arch12") == 0)
min_cpu = S390_OPCODE_ARCH12;
else {
fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);

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Changes binutils-2.29-branch.diff.
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Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com

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Thu Aug 10 14:49:16 UTC 2017 - matz@suse.com
- Update to 2.29 branch (@de44148c), fixing PR21884, a segfault
in ld while building memtest86+ .
Changes binutils-2.29-branch.diff.
------------------------------------------------------------------- -------------------------------------------------------------------
Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Thu Aug 10 14:49:16 UTC 2017 - matz@suse.com
- Update to 2.29 branch (@de44148c), fixing PR21884, a segfault
in ld while building memtest86+ .
Changes binutils-2.29-branch.diff.
------------------------------------------------------------------- -------------------------------------------------------------------
Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Thu Aug 10 14:49:16 UTC 2017 - matz@suse.com
- Update to 2.29 branch (@de44148c), fixing PR21884, a segfault
in ld while building memtest86+ .
Changes binutils-2.29-branch.diff.
------------------------------------------------------------------- -------------------------------------------------------------------
Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com Mon Jul 31 17:12:31 UTC 2017 - matz@suse.com