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- Update to version 2.41:

Browse Source 
* The MIPS port now supports the Sony Interactive Entertainment Allegrex
  processor, used with the PlayStation Portable, which implements the MIPS
  II ISA along with a single-precision FPU and a few implementation-specific
  integer instructions.
* Objdump's --private option can now be used on PE format files to display the
  fields in the file header and section headers.
* New versioned release of libsframe: libsframe.so.1.  This release introduces
  versioned symbols with version node name LIBSFRAME_1.0.  This release also
  updates the ABI in an incompatible way: this includes removal of
  sframe_get_funcdesc_with_addr API, change in the behavior of
  sframe_fre_get_ra_offset and sframe_fre_get_fp_offset APIs.
* SFrame Version 2 is now the default (and only) format version supported by
  gas, ld, readelf and objdump.
* Add command-line option, --strip-section-headers, to objcopy and strip to
  remove ELF section header from ELF file.
* The RISC-V port now supports the following new standard extensions:
  - Zicond (conditional zero instructions)
  - Zfa (additional floating-point instructions)
  - Zvbb, Zvbc, Zvkg, Zvkned, Zvknh[ab], Zvksed, Zvksh, Zvkn, Zvknc, Zvkng,
    Zvks, Zvksc, Zvkg, Zvkt (vector crypto instructions)
* The RISC-V port now supports the following vendor-defined extensions:
  - XVentanaCondOps
* Add support for Intel FRED, LKGS and AMX-COMPLEX instructions.
* A new .insn directive is recognized by x86 gas.
* Add SME2 support to the AArch64 port.
* The linker now accepts a command line option of --remap-inputs
  <PATTERN>=<FILE> to relace any input file that matches <PATTERN> with
  <FILE>.  In addition the option --remap-inputs-file=<FILE> can be used to
  specify a file containing any number of these remapping directives.

OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=447
This commit is contained in:
Michael Matz 2023-08-16 15:16:34 +00:00 committed by Git OBS Bridge
parent c1497d86e3
commit c052426963
11 changed files with 89 additions and 252 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
aarch64-common-pagesize.patch
View File

@ -1,24 +1,24 @@
Change default common-page-size to 64K on aarch64. This enables the use
of RELRO since we are using 64K pages.
Index: binutils-2.25.0/bfd/elfnn-aarch64.c
Index: binutils-2.41/bfd/elfnn-aarch64.c
===================================================================
--- binutils-2.25.0.orig/bfd/elfnn-aarch64.c
+++ binutils-2.25.0/bfd/elfnn-aarch64.c
@@ -9965,7 +9965,7 @@ const struct elf_size_info elfNN_aarch64_size_info =
--- binutils-2.41.orig/bfd/elfnn-aarch64.c 2023-07-03 01:00:00.000000000 +0200
+++ binutils-2.41/bfd/elfnn-aarch64.c 2023-08-16 16:31:51.238779641 +0200
@@ -10251,7 +10251,7 @@ const struct elf_size_info elfNN_aarch64
#define ELF_ARCH bfd_arch_aarch64
#define ELF_MACHINE_CODE EM_AARCH64
#define ELF_MAXPAGESIZE 0x10000
-#define ELF_COMMONPAGESIZE 0x1000
+#define ELF_COMMONPAGESIZE 0x10000
#define bfd_elfNN_close_and_cleanup \
elfNN_aarch64_close_and_cleanup
Index: binutils-2.25.0/gold/aarch64.cc
#define bfd_elfNN_bfd_free_cached_info \
elfNN_aarch64_bfd_free_cached_info
Index: binutils-2.41/gold/aarch64.cc
===================================================================
--- binutils-2.25.0.orig/gold/aarch64.cc
+++ binutils-2.25.0/gold/aarch64.cc
@@ -791,7 +791,7 @@ const Target::Target_info Target_aarch64
--- binutils-2.41.orig/gold/aarch64.cc 2023-07-03 01:00:00.000000000 +0200
+++ binutils-2.41/gold/aarch64.cc 2023-08-16 16:28:35.959450565 +0200
@@ -3555,7 +3555,7 @@ const Target::Target_info Target_aarch64
"/lib/ld.so.1", // program interpreter
0x400000, // default_text_segment_address
0x10000, // abi_pagesize (overridable by -z max-page-size)
@ -27,7 +27,7 @@ Index: binutils-2.25.0/gold/aarch64.cc
false, // isolate_execinstr
0, // rosegment_gap
elfcpp::SHN_UNDEF, // small_common_shndx
@@ -818,7 +818,7 @@ const Target::Target_info Target_aarch64
@@ -3584,7 +3584,7 @@ const Target::Target_info Target_aarch64
"/lib/ld.so.1", // program interpreter
0x400000, // default_text_segment_address
0x10000, // abi_pagesize (overridable by -z max-page-size)
@ -36,7 +36,7 @@ Index: binutils-2.25.0/gold/aarch64.cc
false, // isolate_execinstr
0, // rosegment_gap
elfcpp::SHN_UNDEF, // small_common_shndx
@@ -845,7 +845,7 @@ const Target::Target_info Target_aarch64
@@ -3613,7 +3613,7 @@ const Target::Target_info Target_aarch64
"/lib/ld.so.1", // program interpreter
0x400000, // default_text_segment_address
0x10000, // abi_pagesize (overridable by -z max-page-size)
@ -45,7 +45,7 @@ Index: binutils-2.25.0/gold/aarch64.cc
false, // isolate_execinstr
0, // rosegment_gap
elfcpp::SHN_UNDEF, // small_common_shndx
@@ -872,7 +872,7 @@ const Target::Target_info Target_aarch64
@@ -3642,7 +3642,7 @@ const Target::Target_info Target_aarch64
"/lib/ld.so.1", // program interpreter
0x400000, // default_text_segment_address
0x10000, // abi_pagesize (overridable by -z max-page-size)

3
binutils-2.40-branch.diff.gz
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size 317038

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oid sha256:f8298eb153a4b37d112e945aa5cb2850040bcf26a3ea65b5a715c83afe05e48a
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52
binutils.changes
View File

@ -1,3 +1,55 @@
-------------------------------------------------------------------
Wed Aug 16 14:36:57 UTC 2023 - Michael Matz <matz@suse.com>
- Update to version 2.41:
* The MIPS port now supports the Sony Interactive Entertainment Allegrex
processor, used with the PlayStation Portable, which implements the MIPS
II ISA along with a single-precision FPU and a few implementation-specific
integer instructions.
* Objdump's --private option can now be used on PE format files to display the
fields in the file header and section headers.
* New versioned release of libsframe: libsframe.so.1. This release introduces
versioned symbols with version node name LIBSFRAME_1.0. This release also
updates the ABI in an incompatible way: this includes removal of
sframe_get_funcdesc_with_addr API, change in the behavior of
sframe_fre_get_ra_offset and sframe_fre_get_fp_offset APIs.
* SFrame Version 2 is now the default (and only) format version supported by
gas, ld, readelf and objdump.
* Add command-line option, --strip-section-headers, to objcopy and strip to
remove ELF section header from ELF file.
* The RISC-V port now supports the following new standard extensions:
- Zicond (conditional zero instructions)
- Zfa (additional floating-point instructions)
- Zvbb, Zvbc, Zvkg, Zvkned, Zvknh[ab], Zvksed, Zvksh, Zvkn, Zvknc, Zvkng,
Zvks, Zvksc, Zvkg, Zvkt (vector crypto instructions)
* The RISC-V port now supports the following vendor-defined extensions:
- XVentanaCondOps
* Add support for Intel FRED, LKGS and AMX-COMPLEX instructions.
* A new .insn directive is recognized by x86 gas.
* Add SME2 support to the AArch64 port.
* The linker now accepts a command line option of --remap-inputs
<PATTERN>=<FILE> to relace any input file that matches <PATTERN> with
<FILE>. In addition the option --remap-inputs-file=<FILE> can be used to
specify a file containing any number of these remapping directives.
* The linker command line option --print-map-locals can be used to include
local symbols in a linker map. (ELF targets only).
* For most ELF based targets, if the --enable-linker-version option is used
then the version of the linker will be inserted as a string into the .comment
section.
* The linker script syntax has a new command for output sections: ASCIZ "string"
This will insert a zero-terminated string at the current location.
* Add command-line option, -z nosectionheader, to omit ELF section
header.
- Removed obsolete patches: binutils-2.40-branch.diff.gz,
riscv-dynamic-tls-reloc-pie.patch, riscv-pr22263-1.patch .
- Add binutils-2.41-branch.diff.gz .
- Rebased aarch64-common-pagesize.patch .
- Contains fixes for these CVEs:
* bsc#1209642 aka CVE-2023-1579 aka PR29988
* bsc#1210297 aka CVE-2023-1972 aka PR30285
* bsc#1210733 aka CVE-2023-2222 aka PR29936
* bsc#1213458 aka CVE-2021-32256 aka PR105039 (gcc)
-------------------------------------------------------------------
Tue May 30 09:43:15 UTC 2023 - Andreas Schwab <schwab@suse.de>

8
binutils.spec
View File

@ -64,7 +64,7 @@ BuildRequires: zlib-devel
%if %{suse_version} > 1500
BuildRequires: libzstd-devel
%endif
Version: 2.40
Version: 2.41
Release: 0
# disable libalternatives for now until it's changed to not
@ -131,7 +131,7 @@ Source: binutils-%{version}.tar.bz2
Source2: binutils-%{version}.tar.bz2.sig
Source3: binutils.keyring
Source4: baselibs.conf
Patch1: binutils-2.40-branch.diff.gz
Patch1: binutils-2.41-branch.diff.gz
Patch3: binutils-skip-rpaths.patch
Patch4: s390-biarch.diff
Patch5: x86-64-biarch.patch
@ -154,8 +154,6 @@ Patch42: binutils-compat-old-behaviour.diff
Patch43: binutils-revert-hlasm-insns.diff
Patch44: binutils-revert-rela.diff
Patch45: extensa-gcc-4_3-fix.diff
Patch46: riscv-dynamic-tls-reloc-pie.patch
Patch47: riscv-pr22263-1.patch
Patch100: add-ulp-section.diff
Patch90: cross-avr-nesc-as.patch
Patch92: cross-avr-omit_section_dynsym.patch
@ -280,8 +278,6 @@ cp ld/ldgram.y ld/ldgram.y.orig
%patch44 -p1
%patch45 -p1
%endif
%patch46 -p1
%patch47 -p1
%patch100 -p1
%if "%{TARGET}" == "avr"
cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h

103
riscv-dynamic-tls-reloc-pie.patch
View File

@ -1,103 +0,0 @@
From f491758f183592cbf8113e02a2bebbd412ff7358 Mon Sep 17 00:00:00 2001
From: Nelson Chu <nelson@nelson.ba.rivosinc.com>
Date: Thu, 4 May 2023 17:08:50 +0800
Subject: [PATCH] [PR ld/22263][PR ld/25694] RISC-V: Avoid dynamic TLS relocs
in PIE.
Lots of targets already fixed the TEXTREL problem for TLS in PIE.
* For PR ld/25694,
In the check_reloc, refer to spare and loongarch, they don't need to reserve
any local dynamic reloc for TLS LE in pie/pde, and similar to other targets.
So it seems like riscv was too conservative to estimate the TLS LE before.
Just break and don't goto static_reloc for TLS LE in pie/pde can fix the
TEXTREL problem.
* For PR ld/22263,
The risc-v code for TLS GD/IE in the relocate_section seems same as MIPS port.
So similar to MIPS, pr22570, commits 9143e72c6d4d and 1cb83cac9a89, it seems
also the right way to do the same thing for risc-v.
On risc-v, fixes
FAIL: Build pr22263-1
RISC-V haven't supported the TLS transitions, so will need the same fix (use
bfd_link_dll) in the future.
bfd/
PR ld/22263
PR ld/25694
* elfnn-riscv.c (riscv_elf_check_relocs): Replace bfd_link_pic with
bfd_link_dll for TLS IE. Don't need to reserve the local dynamic
relocation for TLS LE in pie/pde, and report error in pic just like
before.
(riscv_elf_relocate_section): For TLS GD/IE, use bfd_link_dll rather
than !bfd_link_pic in determining the dynamic symbol index. Avoid
the index of -1.
---
bfd/elfnn-riscv.c | 25 +++++++++++--------------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 4a5da7df3fe..ee2d19f7699 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -732,7 +732,7 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
break;
case R_RISCV_TLS_GOT_HI20:
- if (bfd_link_pic (info))
+ if (bfd_link_dll (info))
info->flags |= DF_STATIC_TLS;
if (!riscv_elf_record_got_reference (abfd, info, h, r_symndx)
|| !riscv_elf_record_tls_type (abfd, h, r_symndx, GOT_TLS_IE))
@@ -787,11 +787,12 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
goto static_reloc;
case R_RISCV_TPREL_HI20:
+ /* This is not allowed in the pic, but okay in pie. */
if (!bfd_link_executable (info))
return bad_static_reloc (abfd, r_type, h);
if (h != NULL)
riscv_elf_record_tls_type (abfd, h, r_symndx, GOT_TLS_LE);
- goto static_reloc;
+ break;
case R_RISCV_HI20:
if (bfd_link_pic (info))
@@ -2689,24 +2690,20 @@ riscv_elf_relocate_section (bfd *output_bfd,
if (htab->elf.srelgot == NULL)
abort ();
- if (h != NULL)
- {
- bool dyn, pic;
- dyn = htab->elf.dynamic_sections_created;
- pic = bfd_link_pic (info);
-
- if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, pic, h)
- && (!pic || !SYMBOL_REFERENCES_LOCAL (info, h)))
- indx = h->dynindx;
- }
+ bool dyn = elf_hash_table (info)->dynamic_sections_created;
+ if (h != NULL
+ && h->dynindx != -1
+ && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
+ && (bfd_link_dll (info) || !SYMBOL_REFERENCES_LOCAL (info, h)))
+ indx = h->dynindx;
/* The GOT entries have not been initialized yet. Do it
now, and emit any relocations. */
- if ((bfd_link_pic (info) || indx != 0)
+ if ((bfd_link_dll (info) || indx != 0)
&& (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
- need_relocs = true;
+ need_relocs = true;
if (tls_type & GOT_TLS_GD)
{
--
2.40.1

108
riscv-pr22263-1.patch
View File

@ -1,108 +0,0 @@
From 53e0482788fa665f532936ba3637bc0fcde6db2c Mon Sep 17 00:00:00 2001
From: Nelson Chu <nelson@rivosinc.com>
Date: Sat, 27 May 2023 09:36:20 +0800
Subject: [PATCH] RISC-V: Avoid spurious R_RISCV_NONE for pr22263-1 test.
For TLS GD/IE, add the same condition with the relocate_section in the
allocate_dynrelocs, to make sure we won't reserve redundant spaces
for dynamic relocations since the conservative estimatation.
After applying this patch, ld seems no longer generate the spurious
R_RISCV_NONE for pr22263-1 test.
bfd/
PR ld/22263
* elfnn-riscv.c (RISCV_TLS_GD_IE_NEED_DYN_RELOC): New defined.
Set NEED_RELOC to true if TLS GD/IE needs dynamic relocations,
and INDX will be the dynamic index.
(allocate_dynrelocs): Don't reserve extra spaces in the rela.got
if RISCV_TLS_GD_IE_NEED_DYN_RELOC set need_reloc to false. This
condition needs to be same as relocate_section.
(relocate_section): Likewise, use the same condition as
allocate_dynrelocs.
---
bfd/elfnn-riscv.c | 41 ++++++++++++++++++++++++++++-------------
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index ee2d19f7699..d02c4a29324 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -38,6 +38,25 @@
#define CHAR_BIT 8
#endif
+/* Set NEED_RELOC to true if TLS GD/IE needs dynamic relocations, and INDX will
+ be the dynamic index. PR22263, use the same check in allocate_dynrelocs and
+ riscv_elf_relocate_section for TLS GD/IE. */
+#define RISCV_TLS_GD_IE_NEED_DYN_RELOC(INFO, DYN, H, INDX, NEED_RELOC) \
+ do \
+ { \
+ if ((H) != NULL \
+ && (H)->dynindx != -1 \
+ && WILL_CALL_FINISH_DYNAMIC_SYMBOL ((DYN), bfd_link_pic (INFO), (H)) \
+ && (bfd_link_dll (INFO) || !SYMBOL_REFERENCES_LOCAL ((INFO), (H)))) \
+ (INDX) = (H)->dynindx; \
+ if ((bfd_link_dll (INFO) || (INDX) != 0) \
+ && ((H) == NULL \
+ || ELF_ST_VISIBILITY ((H)->other) == STV_DEFAULT \
+ || (H)->root.type != bfd_link_hash_undefweak)) \
+ (NEED_RELOC) = true; \
+ } \
+ while (0)
+
/* Internal relocations used exclusively by the relaxation pass. */
#define R_RISCV_DELETE (R_RISCV_max + 1)
@@ -1186,18 +1205,24 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
dyn = htab->elf.dynamic_sections_created;
if (tls_type & (GOT_TLS_GD | GOT_TLS_IE))
{
+ int indx = 0;
+ bool need_reloc = false;
+ RISCV_TLS_GD_IE_NEED_DYN_RELOC(info, dyn, h, indx, need_reloc);
+
/* TLS_GD needs two dynamic relocs and two GOT slots. */
if (tls_type & GOT_TLS_GD)
{
s->size += 2 * RISCV_ELF_WORD_BYTES;
- htab->elf.srelgot->size += 2 * sizeof (ElfNN_External_Rela);
+ if (need_reloc)
+ htab->elf.srelgot->size += 2 * sizeof (ElfNN_External_Rela);
}
/* TLS_IE needs one dynamic reloc and one GOT slot. */
if (tls_type & GOT_TLS_IE)
{
s->size += RISCV_ELF_WORD_BYTES;
- htab->elf.srelgot->size += sizeof (ElfNN_External_Rela);
+ if (need_reloc)
+ htab->elf.srelgot->size += sizeof (ElfNN_External_Rela);
}
}
else
@@ -2691,20 +2716,10 @@ riscv_elf_relocate_section (bfd *output_bfd,
abort ();
bool dyn = elf_hash_table (info)->dynamic_sections_created;
- if (h != NULL
- && h->dynindx != -1
- && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
- && (bfd_link_dll (info) || !SYMBOL_REFERENCES_LOCAL (info, h)))
- indx = h->dynindx;
+ RISCV_TLS_GD_IE_NEED_DYN_RELOC (info, dyn, h, indx, need_relocs);
/* The GOT entries have not been initialized yet. Do it
now, and emit any relocations. */
- if ((bfd_link_dll (info) || indx != 0)
- && (h == NULL
- || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
- || h->root.type != bfd_link_hash_undefweak))
- need_relocs = true;
-
if (tls_type & GOT_TLS_GD)
{
if (need_relocs)
--
2.40.1