diff --git a/add_idle_manpages_in_Makefile.patch b/add_idle_manpages_in_Makefile.patch deleted file mode 100644 index 307e6e2..0000000 --- a/add_idle_manpages_in_Makefile.patch +++ /dev/null @@ -1,13 +0,0 @@ -Index: cpupower-3.13/Makefile -=================================================================== ---- cpupower-3.13.orig/Makefile -+++ cpupower-3.13/Makefile -@@ -274,6 +274,8 @@ install-man: - $(INSTALL_DATA) -D man/cpupower.1 $(DESTDIR)${mandir}/man1/cpupower.1 - $(INSTALL_DATA) -D man/cpupower-frequency-set.1 $(DESTDIR)${mandir}/man1/cpupower-frequency-set.1 - $(INSTALL_DATA) -D man/cpupower-frequency-info.1 $(DESTDIR)${mandir}/man1/cpupower-frequency-info.1 -+ $(INSTALL_DATA) -D man/cpupower-idle-set.1 $(DESTDIR)${mandir}/man1/cpupower-idle-set.1 -+ $(INSTALL_DATA) -D man/cpupower-idle-info.1 $(DESTDIR)${mandir}/man1/cpupower-idle-info.1 - $(INSTALL_DATA) -D man/cpupower-set.1 $(DESTDIR)${mandir}/man1/cpupower-set.1 - $(INSTALL_DATA) -D man/cpupower-info.1 $(DESTDIR)${mandir}/man1/cpupower-info.1 - $(INSTALL_DATA) -D man/cpupower-monitor.1 $(DESTDIR)${mandir}/man1/cpupower-monitor.1 diff --git a/cpupower-3.13.tar.bz2 b/cpupower-3.13.tar.bz2 deleted file mode 100644 index c348f20..0000000 --- a/cpupower-3.13.tar.bz2 +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:e57739b412027a105539f8294b0972597858862722cae315152f4c22e014dc88 -size 70424 diff --git a/cpupower-3.19.tar.bz2 b/cpupower-3.19.tar.bz2 new file mode 100644 index 0000000..8bbee6a --- /dev/null +++ b/cpupower-3.19.tar.bz2 @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:fc866551e33bca8b6c2398335d93ed3e0db7487566b873197bf68a104c14ef81 +size 70536 diff --git a/cpupower-always_try_to_load_msr_driver_as_root.patch b/cpupower-always_try_to_load_msr_driver_as_root.patch deleted file mode 100644 index 03c4d1c..0000000 --- a/cpupower-always_try_to_load_msr_driver_as_root.patch +++ /dev/null @@ -1,43 +0,0 @@ -cpupower: If root, try to load msr driver on x86 if /dev/cpu/0/msr is not avail - -Signed-off-by: Thomas Renninger - -diff --git a/utils/cpupower.c b/utils/cpupower.c -index 7efc570..7cdcf88 100644 ---- a/utils/cpupower.c -+++ b/utils/cpupower.c -@@ -12,6 +12,9 @@ - #include - #include - #include -+#include -+#include -+#include - - #include "builtin.h" - #include "helpers/helpers.h" -@@ -169,6 +172,8 @@ int main(int argc, const char *argv[]) - { - const char *cmd; - unsigned int i, ret; -+ struct stat statbuf; -+ struct utsname uts; - - cpus_chosen = bitmask_alloc(sysconf(_SC_NPROCESSORS_CONF)); - -@@ -195,6 +200,15 @@ int main(int argc, const char *argv[]) - - get_cpu_info(0, &cpupower_cpu_info); - run_as_root = !getuid(); -+ if (run_as_root) { -+ ret = uname(&uts); -+ if (!ret && !strcmp(uts.machine, "x86_64") && -+ stat("/dev/cpu/0/msr", &statbuf) != 0) { -+ if (system("modprobe msr") == -1) -+ fprintf(stderr, _("MSR access not available.\n")); -+ } -+ } -+ - - for (i = 0; i < ARRAY_SIZE(commands); i++) { - struct cmd_struct *p = commands + i; diff --git a/cpupower-remove_mc_scheduler_bits.patch b/cpupower-remove_mc_scheduler_bits.patch deleted file mode 100644 index 2702ae9..0000000 --- a/cpupower-remove_mc_scheduler_bits.patch +++ /dev/null @@ -1,234 +0,0 @@ -cpupower: Remove mc and smt power aware scheduler info/settings - -These kernel interfaces got removed by: -commit 8e7fbcbc22c12414bcc9dfdd683637f58fb32759 -Author: Peter Zijlstra -Date: Mon Jan 9 11:28:35 2012 +0100 - - sched: Remove stale power aware scheduling remnants and dysfunctional knobs - -No need to further keep them as userspace configurations. - -Signed-off-by: Thomas Renninger - -diff --git a/tools/power/cpupower/man/cpupower-info.1 b/tools/power/cpupower/man/cpupower-info.1 -index 58e2119..340bcd0 100644 ---- a/tools/power/cpupower/man/cpupower-info.1 -+++ b/tools/power/cpupower/man/cpupower-info.1 -@@ -3,7 +3,7 @@ - cpupower\-info \- Shows processor power related kernel or hardware configurations - .SH SYNOPSIS - .ft B --.B cpupower info [ \-b ] [ \-s ] [ \-m ] -+.B cpupower info [ \-b ] - - .SH DESCRIPTION - \fBcpupower info \fP shows kernel configurations or processor hardware -diff --git a/tools/power/cpupower/man/cpupower-set.1 b/tools/power/cpupower/man/cpupower-set.1 -index 9dbd536..2bcc696 100644 ---- a/tools/power/cpupower/man/cpupower-set.1 -+++ b/tools/power/cpupower/man/cpupower-set.1 -@@ -3,7 +3,7 @@ - cpupower\-set \- Set processor power related kernel or hardware configurations - .SH SYNOPSIS - .ft B --.B cpupower set [ \-b VAL ] [ \-s VAL ] [ \-m VAL ] -+.B cpupower set [ \-b VAL ] - - - .SH DESCRIPTION -@@ -55,35 +55,6 @@ Use \fBcpupower -c all info -b\fP to verify. - - This options needs the msr kernel driver (CONFIG_X86_MSR) loaded. - .RE --.PP --\-\-sched\-mc, \-m [ VAL ] --.RE --\-\-sched\-smt, \-s [ VAL ] --.RS 4 --\-\-sched\-mc utilizes cores in one processor package/socket first before --processes are scheduled to other processor packages/sockets. -- --\-\-sched\-smt utilizes thread siblings of one processor core first before --processes are scheduled to other cores. -- --The impact on power consumption and performance (positiv or negativ) heavily --depends on processor support for deep sleep states, frequency scaling and --frequency boost modes and their dependencies between other thread siblings --and processor cores. -- --Taken over from kernel documentation: -- --Adjust the kernel's multi-core scheduler support. -- --Possible values are: --.RS 2 --0 - No power saving load balance (default value) -- --1 - Fill one thread/core/package first for long running threads -- --2 - Also bias task wakeups to semi-idle cpu package for power --savings --.RE - - .SH "SEE ALSO" - cpupower-info(1), cpupower-monitor(1), powertop(1) -diff --git a/tools/power/cpupower/utils/cpupower-info.c b/tools/power/cpupower/utils/cpupower-info.c -index 0ac2577..136d979 100644 ---- a/tools/power/cpupower/utils/cpupower-info.c -+++ b/tools/power/cpupower/utils/cpupower-info.c -@@ -18,8 +18,6 @@ - - static struct option set_opts[] = { - { .name = "perf-bias", .has_arg = optional_argument, .flag = NULL, .val = 'b'}, -- { .name = "sched-mc", .has_arg = optional_argument, .flag = NULL, .val = 'm'}, -- { .name = "sched-smt", .has_arg = optional_argument, .flag = NULL, .val = 's'}, - { }, - }; - -@@ -37,8 +35,6 @@ int cmd_info(int argc, char **argv) - - union { - struct { -- int sched_mc:1; -- int sched_smt:1; - int perf_bias:1; - }; - int params; -@@ -49,23 +45,13 @@ int cmd_info(int argc, char **argv) - textdomain(PACKAGE); - - /* parameter parsing */ -- while ((ret = getopt_long(argc, argv, "msb", set_opts, NULL)) != -1) { -+ while ((ret = getopt_long(argc, argv, "b", set_opts, NULL)) != -1) { - switch (ret) { - case 'b': - if (params.perf_bias) - print_wrong_arg_exit(); - params.perf_bias = 1; - break; -- case 'm': -- if (params.sched_mc) -- print_wrong_arg_exit(); -- params.sched_mc = 1; -- break; -- case 's': -- if (params.sched_smt) -- print_wrong_arg_exit(); -- params.sched_smt = 1; -- break; - default: - print_wrong_arg_exit(); - } -@@ -78,25 +64,6 @@ int cmd_info(int argc, char **argv) - if (bitmask_isallclear(cpus_chosen)) - bitmask_setbit(cpus_chosen, 0); - -- if (params.sched_mc) { -- ret = sysfs_get_sched("mc"); -- printf(_("System's multi core scheduler setting: ")); -- if (ret < 0) -- /* if sysfs file is missing it's: errno == ENOENT */ -- printf(_("not supported\n")); -- else -- printf("%d\n", ret); -- } -- if (params.sched_smt) { -- ret = sysfs_get_sched("smt"); -- printf(_("System's thread sibling scheduler setting: ")); -- if (ret < 0) -- /* if sysfs file is missing it's: errno == ENOENT */ -- printf(_("not supported\n")); -- else -- printf("%d\n", ret); -- } -- - /* Add more per cpu options here */ - if (!params.perf_bias) - return ret; -diff --git a/tools/power/cpupower/utils/cpupower-set.c b/tools/power/cpupower/utils/cpupower-set.c -index bcf1d2f..573c75f 100644 ---- a/tools/power/cpupower/utils/cpupower-set.c -+++ b/tools/power/cpupower/utils/cpupower-set.c -@@ -19,8 +19,6 @@ - - static struct option set_opts[] = { - { .name = "perf-bias", .has_arg = required_argument, .flag = NULL, .val = 'b'}, -- { .name = "sched-mc", .has_arg = required_argument, .flag = NULL, .val = 'm'}, -- { .name = "sched-smt", .has_arg = required_argument, .flag = NULL, .val = 's'}, - { }, - }; - -@@ -38,13 +36,11 @@ int cmd_set(int argc, char **argv) - - union { - struct { -- int sched_mc:1; -- int sched_smt:1; - int perf_bias:1; - }; - int params; - } params; -- int sched_mc = 0, sched_smt = 0, perf_bias = 0; -+ int perf_bias = 0; - int ret = 0; - - setlocale(LC_ALL, ""); -@@ -52,7 +48,7 @@ int cmd_set(int argc, char **argv) - - params.params = 0; - /* parameter parsing */ -- while ((ret = getopt_long(argc, argv, "m:s:b:", -+ while ((ret = getopt_long(argc, argv, "b:", - set_opts, NULL)) != -1) { - switch (ret) { - case 'b': -@@ -66,28 +62,6 @@ int cmd_set(int argc, char **argv) - } - params.perf_bias = 1; - break; -- case 'm': -- if (params.sched_mc) -- print_wrong_arg_exit(); -- sched_mc = atoi(optarg); -- if (sched_mc < 0 || sched_mc > 2) { -- printf(_("--sched-mc param out " -- "of range [0-%d]\n"), 2); -- print_wrong_arg_exit(); -- } -- params.sched_mc = 1; -- break; -- case 's': -- if (params.sched_smt) -- print_wrong_arg_exit(); -- sched_smt = atoi(optarg); -- if (sched_smt < 0 || sched_smt > 2) { -- printf(_("--sched-smt param out " -- "of range [0-%d]\n"), 2); -- print_wrong_arg_exit(); -- } -- params.sched_smt = 1; -- break; - default: - print_wrong_arg_exit(); - } -@@ -96,19 +70,6 @@ int cmd_set(int argc, char **argv) - if (!params.params) - print_wrong_arg_exit(); - -- if (params.sched_mc) { -- ret = sysfs_set_sched("mc", sched_mc); -- if (ret) -- fprintf(stderr, _("Error setting sched-mc %s\n"), -- (ret == -ENODEV) ? "not supported" : ""); -- } -- if (params.sched_smt) { -- ret = sysfs_set_sched("smt", sched_smt); -- if (ret) -- fprintf(stderr, _("Error setting sched-smt %s\n"), -- (ret == -ENODEV) ? "not supported" : ""); -- } -- - /* Default is: set all CPUs */ - if (bitmask_isallclear(cpus_chosen)) - bitmask_setall(cpus_chosen); diff --git a/cpupower-return_zero_on_success.patch b/cpupower-return_zero_on_success.patch deleted file mode 100644 index 9f17c71..0000000 --- a/cpupower-return_zero_on_success.patch +++ /dev/null @@ -1,23 +0,0 @@ -cpupower: cpupower info -b should return 0 on success, not the perf bias value - -Signed-off-by: Thomas Renninger - -diff --git a/utils/cpupower-info.c b/utils/cpupower-info.c -index 3f68632..3e27975 100644 ---- a/utils/cpupower-info.c -+++ b/utils/cpupower-info.c -@@ -125,11 +125,11 @@ int cmd_info(int argc, char **argv) - if (params.perf_bias) { - ret = msr_intel_get_perf_bias(cpu); - if (ret < 0) { -- printf(_("Could not read perf-bias value\n")); -- break; -+ printf(_("Could not read perf-bias value[%d]\n"), ret); -+ exit(EXIT_FAILURE); - } else - printf(_("perf-bias: %d\n"), ret); - } - } -- return ret; -+ return 0; - } diff --git a/cpupower.changes b/cpupower.changes index 205e6ce..b374127 100644 --- a/cpupower.changes +++ b/cpupower.changes @@ -1,3 +1,32 @@ +------------------------------------------------------------------- +Wed Jan 6 10:22:14 UTC 2016 - jdelvare@suse.com + +- Drop dead link. +- Fix Obsoletes statement, cpufrequtils package versions were + greater than cpupower package versions so we must obsolete all + versions of cpufrequtils. + +------------------------------------------------------------------- +Wed Jan 28 18:18:52 UTC 2015 - trenn@suse.de + +- Make sources also build against 13.1 and older by providing + asm-index.h which is included in linux-glibc-devel in newer + distributions +*Add turbostat_set_asm_header_fixed.patch + +------------------------------------------------------------------- +Wed Jan 28 17:11:07 UTC 2015 - trenn@suse.de + +- Update cpupower and turbostat to latest git kernel HEAD version + this currently is 3.19-rc6, but it is expected that there are no + changes anymore and the version gets named 3.19 already. + The patches are already included mainline and get removed from osc: + cpupower_disable_by_latency.patch + add_idle_manpages_in_Makefile.patch + cpupower-always_try_to_load_msr_driver_as_root.patch + cpupower-return_zero_on_success.patch + cpupower-remove_mc_scheduler_bits.patch + ------------------------------------------------------------------- Wed Aug 13 13:06:27 UTC 2014 - trenn@suse.de diff --git a/cpupower.spec b/cpupower.spec index d04a869..c21ca79 100644 --- a/cpupower.spec +++ b/cpupower.spec @@ -1,7 +1,7 @@ # # spec file for package cpupower # -# Copyright (c) 2014 SUSE LINUX Products GmbH, Nuernberg, Germany. +# Copyright (c) 2016 SUSE LINUX GmbH, Nuernberg, Germany. # Author: Thomas Renninger # # All modifications and additions to the file contributed by third parties @@ -17,32 +17,30 @@ # - Name: cpupower -Url: http://www.kernel.org/pub/linux/utils/kernel/cpufreq/cpufrequtils.html # Use this as version when things are in mainline kernel %define version %(rpm -q --qf '%{VERSION}' kernel-source) -Version: 3.13 +Version: 3.19 Release: 0 -%define tsversion 3.17 +%define tsversion 3.19 Summary: Tools to determine and set CPU Power related Settings License: GPL-2.0 Group: System/Base Source: %{name}-%{version}.tar.bz2 Source1: turbostat-%{tsversion}.tar.bz2 Source2: cpupower_export_tarball_from_git.sh -Patch1: cpupower_disable_by_latency.patch -Patch2: add_idle_manpages_in_Makefile.patch -Patch3: cpupower-always_try_to_load_msr_driver_as_root.patch -Patch4: cpupower-return_zero_on_success.patch -Patch5: cpupower-remove_mc_scheduler_bits.patch +Source3: msr-index.h Patch20: turbostat_fix_man_perm.patch Patch21: make_header_file_passable_from_outside.patch +Patch22: turbostat_set_asm_header_fixed.patch +%if 0%{?suse_version} > 1315 +BuildRequires: linux-glibc-devel +%endif BuildRoot: %{_tmppath}/%{name}-%{version}-build BuildRequires: gettext-tools BuildRequires: pciutils BuildRequires: pciutils-devel -Obsoletes: cpufrequtils < %version +Obsoletes: cpufrequtils Provides: cpufrequtils = %version %description @@ -82,14 +80,12 @@ powersave module. %prep %setup -D -b 1 -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p4 cd ../turbostat-%{tsversion} %patch20 -p1 %patch21 -p1 +%if 0%{?suse_version} <= 1315 +%patch22 -p1 +%endif %build # This package failed when testing with -Wl,-as-needed being default. @@ -101,6 +97,9 @@ make $CONF %{?_smp_mflags} %ifarch ix86 x86_64 cd ../turbostat-%{tsversion} +%if 0%{?suse_version} <= 1315 +cp %{SOURCE3} . +%endif CFLAGS="%optflags -I. -DMSRHEADER=\"\"" make %{?_smp_mflags} %endif diff --git a/cpupower_disable_by_latency.patch b/cpupower_disable_by_latency.patch deleted file mode 100644 index 7578b16..0000000 --- a/cpupower_disable_by_latency.patch +++ /dev/null @@ -1,143 +0,0 @@ -cpupower: Introduce idle state disable-by-latency and enable-all - -Signed-off-by: Thomas Renninger - -diff --git a/man/cpupower-idle-set.1 b/man/cpupower-idle-set.1 -index 6b16072..1de0bd9 100644 ---- a/man/cpupower-idle-set.1 -+++ b/man/cpupower-idle-set.1 -@@ -13,11 +13,15 @@ sleep states. This can be handy for power vs performance tuning. - .SH "OPTIONS" - .LP - .TP --\fB\-d\fR \fB\-\-disable\fR -+\fB\-d\fR \fB\-\-disable\fR - Disable a specific processor sleep state. - .TP --\fB\-e\fR \fB\-\-enable\fR -+\fB\-e\fR \fB\-\-enable\fR - Enable a specific processor sleep state. -+\fB\-D\fR \fB\-\-disable-by-latency\fR -+Disable all idle states with a equal or higher latency than -+\fB\-E\fR \fB\-\-enable-all\fR -+Enable all idle states if not enabled already. - - .SH "REMARKS" - .LP -diff --git a/utils/cpuidle-set.c b/utils/cpuidle-set.c -index c78141c..d45d8d7 100644 ---- a/utils/cpuidle-set.c -+++ b/utils/cpuidle-set.c -@@ -13,8 +13,14 @@ - #include "helpers/sysfs.h" - - static struct option info_opts[] = { -- { .name = "disable", .has_arg = required_argument, .flag = NULL, .val = 'd'}, -- { .name = "enable", .has_arg = required_argument, .flag = NULL, .val = 'e'}, -+ { .name = "disable", -+ .has_arg = required_argument, .flag = NULL, .val = 'd'}, -+ { .name = "enable", -+ .has_arg = required_argument, .flag = NULL, .val = 'e'}, -+ { .name = "disable-by-latency", -+ .has_arg = required_argument, .flag = NULL, .val = 'D'}, -+ { .name = "enable-all", -+ .has_arg = no_argument, .flag = NULL, .val = 'E'}, - { }, - }; - -@@ -23,11 +29,13 @@ int cmd_idle_set(int argc, char **argv) - { - extern char *optarg; - extern int optind, opterr, optopt; -- int ret = 0, cont = 1, param = 0, idlestate = 0; -- unsigned int cpu = 0; -+ int ret = 0, cont = 1, param = 0, disabled; -+ unsigned long long latency = 0, state_latency; -+ unsigned int cpu = 0, idlestate = 0, idlestates = 0; -+ char *endptr; - - do { -- ret = getopt_long(argc, argv, "d:e:", info_opts, NULL); -+ ret = getopt_long(argc, argv, "d:e:ED:", info_opts, NULL); - if (ret == -1) - break; - switch (ret) { -@@ -53,6 +61,27 @@ int cmd_idle_set(int argc, char **argv) - param = ret; - idlestate = atoi(optarg); - break; -+ case 'D': -+ if (param) { -+ param = -1; -+ cont = 0; -+ break; -+ } -+ param = ret; -+ latency = strtoull(optarg, &endptr, 10); -+ if (*endptr != '\0') { -+ printf(_("Bad latency value: %s\n"), optarg); -+ exit(EXIT_FAILURE); -+ } -+ break; -+ case 'E': -+ if (param) { -+ param = -1; -+ cont = 0; -+ break; -+ } -+ param = ret; -+ break; - case -1: - cont = 0; - break; -@@ -79,8 +108,14 @@ int cmd_idle_set(int argc, char **argv) - if (!bitmask_isbitset(cpus_chosen, cpu)) - continue; - -- switch (param) { -+ if (sysfs_is_cpu_online(cpu) != 1) -+ continue; -+ -+ idlestates = sysfs_get_idlestate_count(cpu); -+ if (idlestates <= 0) -+ continue; - -+ switch (param) { - case 'd': - ret = sysfs_idlestate_disable(cpu, idlestate, 1); - if (ret == 0) -@@ -107,6 +142,34 @@ int cmd_idle_set(int argc, char **argv) - printf(_("Idlestate %u not enabled on CPU %u\n"), - idlestate, cpu); - break; -+ case 'D': -+ for (idlestate = 0; idlestate < idlestates; idlestate++) { -+ disabled = sysfs_is_idlestate_disabled -+ (cpu, idlestate); -+ state_latency = sysfs_get_idlestate_latency -+ (cpu, idlestate); -+ printf("CPU: %u - idlestate %u - state_latency: %llu - latency: %llu\n", -+ cpu, idlestate, state_latency, latency); -+ if (disabled == 1 || latency > state_latency) -+ continue; -+ ret = sysfs_idlestate_disable -+ (cpu, idlestate, 1); -+ if (ret == 0) -+ printf(_("Idlestate %u disabled on CPU %u\n"), idlestate, cpu); -+ } -+ break; -+ case 'E': -+ for (idlestate = 0; idlestate < idlestates; idlestate++) { -+ disabled = sysfs_is_idlestate_disabled -+ (cpu, idlestate); -+ if (disabled == 1) { -+ ret = sysfs_idlestate_disable -+ (cpu, idlestate, 0); -+ if (ret == 0) -+ printf(_("Idlestate %u enabled on CPU %u\n"), idlestate, cpu); -+ } -+ } -+ break; - default: - /* Not reachable with proper args checking */ - printf(_("Invalid or unknown argument\n")); diff --git a/msr-index.h b/msr-index.h new file mode 100644 index 0000000..2a1211e --- /dev/null +++ b/msr-index.h @@ -0,0 +1,624 @@ +#ifndef _ASM_X86_MSR_INDEX_H +#define _ASM_X86_MSR_INDEX_H + +/* CPU model specific register (MSR) numbers */ + +/* x86-64 specific MSRs */ +#define MSR_EFER 0xc0000080 /* extended feature register */ +#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ +#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ +#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ +#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */ +#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ +#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ +#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ +#define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */ + +/* EFER bits: */ +#define _EFER_SCE 0 /* SYSCALL/SYSRET */ +#define _EFER_LME 8 /* Long mode enable */ +#define _EFER_LMA 10 /* Long mode active (read-only) */ +#define _EFER_NX 11 /* No execute enable */ +#define _EFER_SVME 12 /* Enable virtualization */ +#define _EFER_LMSLE 13 /* Long Mode Segment Limit Enable */ +#define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */ + +#define EFER_SCE (1<<_EFER_SCE) +#define EFER_LME (1<<_EFER_LME) +#define EFER_LMA (1<<_EFER_LMA) +#define EFER_NX (1<<_EFER_NX) +#define EFER_SVME (1<<_EFER_SVME) +#define EFER_LMSLE (1<<_EFER_LMSLE) +#define EFER_FFXSR (1<<_EFER_FFXSR) + +/* Intel MSRs. Some also available on other CPUs */ +#define MSR_IA32_PERFCTR0 0x000000c1 +#define MSR_IA32_PERFCTR1 0x000000c2 +#define MSR_FSB_FREQ 0x000000cd +#define MSR_NHM_PLATFORM_INFO 0x000000ce + +#define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 +#define NHM_C3_AUTO_DEMOTE (1UL << 25) +#define NHM_C1_AUTO_DEMOTE (1UL << 26) +#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25) +#define SNB_C1_AUTO_UNDEMOTE (1UL << 27) +#define SNB_C3_AUTO_UNDEMOTE (1UL << 28) + +#define MSR_PLATFORM_INFO 0x000000ce +#define MSR_MTRRcap 0x000000fe +#define MSR_IA32_BBL_CR_CTL 0x00000119 +#define MSR_IA32_BBL_CR_CTL3 0x0000011e + +#define MSR_IA32_SYSENTER_CS 0x00000174 +#define MSR_IA32_SYSENTER_ESP 0x00000175 +#define MSR_IA32_SYSENTER_EIP 0x00000176 + +#define MSR_IA32_MCG_CAP 0x00000179 +#define MSR_IA32_MCG_STATUS 0x0000017a +#define MSR_IA32_MCG_CTL 0x0000017b + +#define MSR_OFFCORE_RSP_0 0x000001a6 +#define MSR_OFFCORE_RSP_1 0x000001a7 +#define MSR_NHM_TURBO_RATIO_LIMIT 0x000001ad +#define MSR_IVT_TURBO_RATIO_LIMIT 0x000001ae + +#define MSR_LBR_SELECT 0x000001c8 +#define MSR_LBR_TOS 0x000001c9 +#define MSR_LBR_NHM_FROM 0x00000680 +#define MSR_LBR_NHM_TO 0x000006c0 +#define MSR_LBR_CORE_FROM 0x00000040 +#define MSR_LBR_CORE_TO 0x00000060 + +#define MSR_IA32_PEBS_ENABLE 0x000003f1 +#define MSR_IA32_DS_AREA 0x00000600 +#define MSR_IA32_PERF_CAPABILITIES 0x00000345 +#define MSR_PEBS_LD_LAT_THRESHOLD 0x000003f6 + +#define MSR_MTRRfix64K_00000 0x00000250 +#define MSR_MTRRfix16K_80000 0x00000258 +#define MSR_MTRRfix16K_A0000 0x00000259 +#define MSR_MTRRfix4K_C0000 0x00000268 +#define MSR_MTRRfix4K_C8000 0x00000269 +#define MSR_MTRRfix4K_D0000 0x0000026a +#define MSR_MTRRfix4K_D8000 0x0000026b +#define MSR_MTRRfix4K_E0000 0x0000026c +#define MSR_MTRRfix4K_E8000 0x0000026d +#define MSR_MTRRfix4K_F0000 0x0000026e +#define MSR_MTRRfix4K_F8000 0x0000026f +#define MSR_MTRRdefType 0x000002ff + +#define MSR_IA32_CR_PAT 0x00000277 + +#define MSR_IA32_DEBUGCTLMSR 0x000001d9 +#define MSR_IA32_LASTBRANCHFROMIP 0x000001db +#define MSR_IA32_LASTBRANCHTOIP 0x000001dc +#define MSR_IA32_LASTINTFROMIP 0x000001dd +#define MSR_IA32_LASTINTTOIP 0x000001de + +/* DEBUGCTLMSR bits (others vary by model): */ +#define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */ +#define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */ +#define DEBUGCTLMSR_TR (1UL << 6) +#define DEBUGCTLMSR_BTS (1UL << 7) +#define DEBUGCTLMSR_BTINT (1UL << 8) +#define DEBUGCTLMSR_BTS_OFF_OS (1UL << 9) +#define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10) +#define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11) + +#define MSR_IA32_POWER_CTL 0x000001fc + +#define MSR_IA32_MC0_CTL 0x00000400 +#define MSR_IA32_MC0_STATUS 0x00000401 +#define MSR_IA32_MC0_ADDR 0x00000402 +#define MSR_IA32_MC0_MISC 0x00000403 + +/* C-state Residency Counters */ +#define MSR_PKG_C3_RESIDENCY 0x000003f8 +#define MSR_PKG_C6_RESIDENCY 0x000003f9 +#define MSR_PKG_C7_RESIDENCY 0x000003fa +#define MSR_CORE_C3_RESIDENCY 0x000003fc +#define MSR_CORE_C6_RESIDENCY 0x000003fd +#define MSR_CORE_C7_RESIDENCY 0x000003fe +#define MSR_PKG_C2_RESIDENCY 0x0000060d +#define MSR_PKG_C8_RESIDENCY 0x00000630 +#define MSR_PKG_C9_RESIDENCY 0x00000631 +#define MSR_PKG_C10_RESIDENCY 0x00000632 + +/* Run Time Average Power Limiting (RAPL) Interface */ + +#define MSR_RAPL_POWER_UNIT 0x00000606 + +#define MSR_PKG_POWER_LIMIT 0x00000610 +#define MSR_PKG_ENERGY_STATUS 0x00000611 +#define MSR_PKG_PERF_STATUS 0x00000613 +#define MSR_PKG_POWER_INFO 0x00000614 + +#define MSR_DRAM_POWER_LIMIT 0x00000618 +#define MSR_DRAM_ENERGY_STATUS 0x00000619 +#define MSR_DRAM_PERF_STATUS 0x0000061b +#define MSR_DRAM_POWER_INFO 0x0000061c + +#define MSR_PP0_POWER_LIMIT 0x00000638 +#define MSR_PP0_ENERGY_STATUS 0x00000639 +#define MSR_PP0_POLICY 0x0000063a +#define MSR_PP0_PERF_STATUS 0x0000063b + +#define MSR_PP1_POWER_LIMIT 0x00000640 +#define MSR_PP1_ENERGY_STATUS 0x00000641 +#define MSR_PP1_POLICY 0x00000642 + +#define MSR_CORE_C1_RES 0x00000660 + +#define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668 +#define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669 + +/* Hardware P state interface */ +#define MSR_PPERF 0x0000064e +#define MSR_PERF_LIMIT_REASONS 0x0000064f +#define MSR_PM_ENABLE 0x00000770 +#define MSR_HWP_CAPABILITIES 0x00000771 +#define MSR_HWP_REQUEST_PKG 0x00000772 +#define MSR_HWP_INTERRUPT 0x00000773 +#define MSR_HWP_REQUEST 0x00000774 +#define MSR_HWP_STATUS 0x00000777 + +/* CPUID.6.EAX */ +#define HWP_BASE_BIT (1<<7) +#define HWP_NOTIFICATIONS_BIT (1<<8) +#define HWP_ACTIVITY_WINDOW_BIT (1<<9) +#define HWP_ENERGY_PERF_PREFERENCE_BIT (1<<10) +#define HWP_PACKAGE_LEVEL_REQUEST_BIT (1<<11) + +/* IA32_HWP_CAPABILITIES */ +#define HWP_HIGHEST_PERF(x) (x & 0xff) +#define HWP_GUARANTEED_PERF(x) ((x & (0xff << 8)) >>8) +#define HWP_MOSTEFFICIENT_PERF(x) ((x & (0xff << 16)) >>16) +#define HWP_LOWEST_PERF(x) ((x & (0xff << 24)) >>24) + +/* IA32_HWP_REQUEST */ +#define HWP_MIN_PERF(x) (x & 0xff) +#define HWP_MAX_PERF(x) ((x & 0xff) << 8) +#define HWP_DESIRED_PERF(x) ((x & 0xff) << 16) +#define HWP_ENERGY_PERF_PREFERENCE(x) ((x & 0xff) << 24) +#define HWP_ACTIVITY_WINDOW(x) ((x & 0xff3) << 32) +#define HWP_PACKAGE_CONTROL(x) ((x & 0x1) << 42) + +/* IA32_HWP_STATUS */ +#define HWP_GUARANTEED_CHANGE(x) (x & 0x1) +#define HWP_EXCURSION_TO_MINIMUM(x) (x & 0x4) + +/* IA32_HWP_INTERRUPT */ +#define HWP_CHANGE_TO_GUARANTEED_INT(x) (x & 0x1) +#define HWP_EXCURSION_TO_MINIMUM_INT(x) (x & 0x2) + +#define MSR_AMD64_MC0_MASK 0xc0010044 + +#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) +#define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) +#define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x)) +#define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x)) + +#define MSR_AMD64_MCx_MASK(x) (MSR_AMD64_MC0_MASK + (x)) + +/* These are consecutive and not in the normal 4er MCE bank block */ +#define MSR_IA32_MC0_CTL2 0x00000280 +#define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x)) + +#define MSR_P6_PERFCTR0 0x000000c1 +#define MSR_P6_PERFCTR1 0x000000c2 +#define MSR_P6_EVNTSEL0 0x00000186 +#define MSR_P6_EVNTSEL1 0x00000187 + +#define MSR_KNC_PERFCTR0 0x00000020 +#define MSR_KNC_PERFCTR1 0x00000021 +#define MSR_KNC_EVNTSEL0 0x00000028 +#define MSR_KNC_EVNTSEL1 0x00000029 + +/* Alternative perfctr range with full access. */ +#define MSR_IA32_PMC0 0x000004c1 + +/* AMD64 MSRs. Not complete. See the architecture manual for a more + complete list. */ + +#define MSR_AMD64_PATCH_LEVEL 0x0000008b +#define MSR_AMD64_TSC_RATIO 0xc0000104 +#define MSR_AMD64_NB_CFG 0xc001001f +#define MSR_AMD64_PATCH_LOADER 0xc0010020 +#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 +#define MSR_AMD64_OSVW_STATUS 0xc0010141 +#define MSR_AMD64_LS_CFG 0xc0011020 +#define MSR_AMD64_DC_CFG 0xc0011022 +#define MSR_AMD64_BU_CFG2 0xc001102a +#define MSR_AMD64_IBSFETCHCTL 0xc0011030 +#define MSR_AMD64_IBSFETCHLINAD 0xc0011031 +#define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 +#define MSR_AMD64_IBSFETCH_REG_COUNT 3 +#define MSR_AMD64_IBSFETCH_REG_MASK ((1UL< + #include + #include