Luigi Baldoni
c8c20f87a5
- Add dav1d-nasm-2.15.patch: Fix compilation with nasm 2.15. OBS-URL: https://build.opensuse.org/request/show/831058 OBS-URL: https://build.opensuse.org/package/show/multimedia:libs/dav1d?expand=0&rev=36
143 lines
4.3 KiB
Diff
143 lines
4.3 KiB
Diff
From 2b567aaa367c63975ad7f4fcbad96051a276a8d1 Mon Sep 17 00:00:00 2001
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From: Henrik Gramner <gramner@twoorioles.com>
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Date: Tue, 30 Jun 2020 23:33:27 +0200
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Subject: [PATCH] Fix compilation with nasm 2.15
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%{:} macro operand ranges were broken in nasm 2.15 which causes
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errors when compiling, so avoid using those for now.
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Some new warnings regarding use of empty macro parameters has also
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been added, adjust some x86inc code to silence those.
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---
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src/ext/x86/x86inc.asm | 46 +++++++++++++++++++++++++++---------------
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src/x86/mc_sse.asm | 6 +-----
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2 files changed, 31 insertions(+), 21 deletions(-)
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diff --git a/src/ext/x86/x86inc.asm b/src/ext/x86/x86inc.asm
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index 1ccd5cda..38a54710 100644
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--- a/src/ext/x86/x86inc.asm
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+++ b/src/ext/x86/x86inc.asm
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@@ -425,16 +425,6 @@ DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
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%endif
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%endmacro
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-%macro DEFINE_ARGS_INTERNAL 3+
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- %ifnum %2
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- DEFINE_ARGS %3
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- %elif %1 == 4
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- DEFINE_ARGS %2
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- %elif %1 > 4
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- DEFINE_ARGS %2, %3
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- %endif
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-%endmacro
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-
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%if WIN64 ; Windows x64 ;=================================================
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DECLARE_REG 0, rcx
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@@ -453,7 +443,7 @@ DECLARE_REG 12, R15, 104
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DECLARE_REG 13, R12, 112
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DECLARE_REG 14, R13, 120
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-%macro PROLOGUE 2-5+ 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
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+%macro PROLOGUE 2-5+ 0, 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
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%assign num_args %1
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%assign regs_used %2
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ASSERT regs_used >= num_args
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@@ -465,7 +455,15 @@ DECLARE_REG 14, R13, 120
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WIN64_SPILL_XMM %3
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%endif
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LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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- DEFINE_ARGS_INTERNAL %0, %4, %5
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+ %if %0 > 4
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+ %ifnum %4
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+ DEFINE_ARGS %5
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+ %else
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+ DEFINE_ARGS %4, %5
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+ %endif
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+ %elifnnum %4
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+ DEFINE_ARGS %4
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+ %endif
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%endmacro
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%macro WIN64_PUSH_XMM 0
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@@ -561,7 +559,7 @@ DECLARE_REG 12, R15, 56
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DECLARE_REG 13, R12, 64
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DECLARE_REG 14, R13, 72
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-%macro PROLOGUE 2-5+ 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
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+%macro PROLOGUE 2-5+ 0, 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
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%assign num_args %1
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%assign regs_used %2
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%assign xmm_regs_used %3
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@@ -571,7 +569,15 @@ DECLARE_REG 14, R13, 72
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PUSH_IF_USED 9, 10, 11, 12, 13, 14
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ALLOC_STACK %4
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LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
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- DEFINE_ARGS_INTERNAL %0, %4, %5
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+ %if %0 > 4
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+ %ifnum %4
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+ DEFINE_ARGS %5
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+ %else
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+ DEFINE_ARGS %4, %5
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+ %endif
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+ %elifnnum %4
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+ DEFINE_ARGS %4
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+ %endif
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%endmacro
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%define has_epilogue regs_used > 9 || stack_size > 0 || vzeroupper_required
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@@ -612,7 +618,7 @@ DECLARE_REG 6, ebp, 28
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DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
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-%macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
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+%macro PROLOGUE 2-5+ 0, 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
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%assign num_args %1
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%assign regs_used %2
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ASSERT regs_used >= num_args
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@@ -627,7 +633,15 @@ DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
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PUSH_IF_USED 3, 4, 5, 6
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ALLOC_STACK %4
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LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
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- DEFINE_ARGS_INTERNAL %0, %4, %5
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+ %if %0 > 4
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+ %ifnum %4
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+ DEFINE_ARGS %5
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+ %else
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+ DEFINE_ARGS %4, %5
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+ %endif
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+ %elifnnum %4
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+ DEFINE_ARGS %4
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+ %endif
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%endmacro
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%define has_epilogue regs_used > 3 || stack_size > 0 || vzeroupper_required
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diff --git a/src/x86/mc_sse.asm b/src/x86/mc_sse.asm
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index 5402ccce..30d1603a 100644
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--- a/src/x86/mc_sse.asm
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+++ b/src/x86/mc_sse.asm
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@@ -2743,7 +2743,7 @@ cglobal put_8tap, 1, 9, 0, dst, ds, src, ss, w, h, mx, my, ss3
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%endif
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%endmacro
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-%macro PREP_8TAP_HV_LOAD 4 ; dst0, src_memloc, tmp[1-2]
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+%macro PREP_8TAP_HV 4 ; dst, src_memloc, tmp[1-2]
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%if cpuflag(ssse3)
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movu %1, [%2]
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pshufb m2, %1, shufB
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@@ -2754,10 +2754,6 @@ cglobal put_8tap, 1, 9, 0, dst, ds, src, ss, w, h, mx, my, ss3
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PREP_8TAP_H_LOAD4 m2, %2+4, m1, %3, %4
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PREP_8TAP_H_LOAD4 m3, %2+8, m1, %3, %4
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%endif
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-%endmacro
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-
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-%macro PREP_8TAP_HV 4 ; dst, src_memloc, tmp[1-2]
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- PREP_8TAP_HV_LOAD %{1:4}
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mova m1, m2
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PMADDUBSW m1, subpelh0, %3, %4, 1 ; subpel +0 C0
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PMADDUBSW m3, subpelh1, %3, %4, 0 ; subpel +4 B4
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--
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GitLab
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