From: Jean Delvare Date: Wed, 23 Oct 2019 12:44:13 +0200 Subject: dmidecode: Add enumerated values from SMBIOS 3.3.0 Git-commit: 3fa833fd78ff5eb74f9459e061e26e063ed648d5 Patch-mainline: yes References: bsc#1153533 Add all the enumerated values from the SMBIOS 3.3.0 specification update that was released last month. Signed-off-by: Jean Delvare Reviewed-by: Jerry Hoemann --- dmidecode.c | 44 +++++++++++++++++++++++++++++++++++--------- 1 file changed, 35 insertions(+), 9 deletions(-) --- a/dmidecode.c +++ b/dmidecode.c @@ -932,6 +932,10 @@ static const char *dmi_processor_family( { 0x140, "WinChip" }, { 0x15E, "DSP" }, { 0x1F4, "Video Processor" }, + + { 0x200, "RV32" }, + { 0x201, "RV64" }, + { 0x202, "RV128" }, }; /* * Note to developers: when adding entries to this list, check if @@ -1815,6 +1819,9 @@ static const char *dmi_slot_type(u8 code "PCI Express Mini 52-pin without bottom-side keep-outs", "PCI Express Mini 76-pin" /* 0x23 */ }; + static const char *type_0x30[] = { + "CXL FLexbus 1.0" /* 0x30 */ + }; static const char *type_0xA0[] = { "PC-98/C20", /* 0xA0 */ "PC-98/C24", @@ -1838,7 +1845,14 @@ static const char *dmi_slot_type(u8 code "PCI Express 3 x2", "PCI Express 3 x4", "PCI Express 3 x8", - "PCI Express 3 x16" /* 0xB6 */ + "PCI Express 3 x16", + out_of_spec, /* 0xB7 */ + "PCI Express 4", + "PCI Express 4 x1", + "PCI Express 4 x2", + "PCI Express 4 x4", + "PCI Express 4 x8", + "PCI Express 4 x16" /* 0xBD */ }; /* * Note to developers: when adding entries to these lists, check if @@ -1847,7 +1861,9 @@ static const char *dmi_slot_type(u8 code if (code >= 0x01 && code <= 0x23) return type[code - 0x01]; - if (code >= 0xA0 && code <= 0xB6) + if (code == 0x30) + return type_0x30[code - 0x30]; + if (code >= 0xA0 && code <= 0xBD) return type_0xA0[code - 0xA0]; return out_of_spec; } @@ -1951,6 +1967,12 @@ static void dmi_slot_id(u8 code1, u8 cod case 0xB4: /* PCI Express 3 */ case 0xB5: /* PCI Express 3 */ case 0xB6: /* PCI Express 3 */ + case 0xB8: /* PCI Express 4 */ + case 0xB9: /* PCI Express 4 */ + case 0xBA: /* PCI Express 4 */ + case 0xBB: /* PCI Express 4 */ + case 0xBC: /* PCI Express 4 */ + case 0xBD: /* PCI Express 4 */ printf("%sID: %u\n", prefix, code1); break; case 0x07: /* PCMCIA */ @@ -2292,12 +2314,13 @@ static const char *dmi_memory_array_loca "PC-98/C20 Add-on Card", /* 0xA0 */ "PC-98/C24 Add-on Card", "PC-98/E Add-on Card", - "PC-98/Local Bus Add-on Card" /* 0xA3 */ + "PC-98/Local Bus Add-on Card", + "CXL Flexbus 1.0" /* 0xA4 */ }; if (code >= 0x01 && code <= 0x0A) return location[code - 0x01]; - if (code >= 0xA0 && code <= 0xA3) + if (code >= 0xA0 && code <= 0xA4) return location_0xA0[code - 0xA0]; return out_of_spec; } @@ -2420,10 +2443,11 @@ static const char *dmi_memory_device_for "RIMM", "SODIMM", "SRIMM", - "FB-DIMM" /* 0x0F */ + "FB-DIMM", + "Die" /* 0x10 */ }; - if (code >= 0x01 && code <= 0x0F) + if (code >= 0x01 && code <= 0x10) return form_factor[code - 0x01]; return out_of_spec; } @@ -2472,10 +2496,12 @@ static const char *dmi_memory_device_typ "LPDDR2", "LPDDR3", "LPDDR4", - "Logical non-volatile device" /* 0x1F */ + "Logical non-volatile device", + "HBM", + "HBM2" /* 0x21 */ }; - if (code >= 0x01 && code <= 0x1F) + if (code >= 0x01 && code <= 0x21) return type[code - 0x01]; return out_of_spec; } @@ -2531,7 +2557,7 @@ static void dmi_memory_technology(u8 cod "NVDIMM-N", "NVDIMM-F", "NVDIMM-P", - "Intel persistent memory" /* 0x07 */ + "Intel Optane DC persistent memory" /* 0x07 */ }; if (code >= 0x01 && code <= 0x07) printf(" %s", technology[code - 0x01]);