f308d382bd
- dmidecode-fix-system-slot-information-for-pcie-ssd.patch: Fix System Slot Information for PCIe SSD. Partial support for SMBIOS 3.3.0: - dmidecode-add-enumerated-values-from-smbios-3.3.0.patch: Add enumerated values from SMBIOS 3.3.0 (bsc#1153533). OBS-URL: https://build.opensuse.org/package/show/Base:System/dmidecode?expand=0&rev=54
134 lines
3.7 KiB
Diff
134 lines
3.7 KiB
Diff
From: Jean Delvare <jdelvare@suse.de>
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Date: Wed, 23 Oct 2019 12:44:13 +0200
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Subject: dmidecode: Add enumerated values from SMBIOS 3.3.0
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Git-commit: 3fa833fd78ff5eb74f9459e061e26e063ed648d5
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Patch-mainline: yes
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References: bsc#1153533
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Add all the enumerated values from the SMBIOS 3.3.0 specification
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update that was released last month.
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Signed-off-by: Jean Delvare <jdelvare@suse.de>
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Reviewed-by: Jerry Hoemann <jerry.hoemann@hpe.com>
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---
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dmidecode.c | 44 +++++++++++++++++++++++++++++++++++---------
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1 file changed, 35 insertions(+), 9 deletions(-)
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--- a/dmidecode.c
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+++ b/dmidecode.c
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@@ -932,6 +932,10 @@ static const char *dmi_processor_family(
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{ 0x140, "WinChip" },
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{ 0x15E, "DSP" },
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{ 0x1F4, "Video Processor" },
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+
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+ { 0x200, "RV32" },
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+ { 0x201, "RV64" },
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+ { 0x202, "RV128" },
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};
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/*
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* Note to developers: when adding entries to this list, check if
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@@ -1815,6 +1819,9 @@ static const char *dmi_slot_type(u8 code
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"PCI Express Mini 52-pin without bottom-side keep-outs",
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"PCI Express Mini 76-pin" /* 0x23 */
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};
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+ static const char *type_0x30[] = {
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+ "CXL FLexbus 1.0" /* 0x30 */
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+ };
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static const char *type_0xA0[] = {
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"PC-98/C20", /* 0xA0 */
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"PC-98/C24",
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@@ -1838,7 +1845,14 @@ static const char *dmi_slot_type(u8 code
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"PCI Express 3 x2",
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"PCI Express 3 x4",
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"PCI Express 3 x8",
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- "PCI Express 3 x16" /* 0xB6 */
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+ "PCI Express 3 x16",
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+ out_of_spec, /* 0xB7 */
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+ "PCI Express 4",
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+ "PCI Express 4 x1",
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+ "PCI Express 4 x2",
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+ "PCI Express 4 x4",
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+ "PCI Express 4 x8",
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+ "PCI Express 4 x16" /* 0xBD */
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};
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/*
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* Note to developers: when adding entries to these lists, check if
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@@ -1847,7 +1861,9 @@ static const char *dmi_slot_type(u8 code
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if (code >= 0x01 && code <= 0x23)
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return type[code - 0x01];
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- if (code >= 0xA0 && code <= 0xB6)
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+ if (code == 0x30)
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+ return type_0x30[code - 0x30];
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+ if (code >= 0xA0 && code <= 0xBD)
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return type_0xA0[code - 0xA0];
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return out_of_spec;
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}
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@@ -1951,6 +1967,12 @@ static void dmi_slot_id(u8 code1, u8 cod
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case 0xB4: /* PCI Express 3 */
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case 0xB5: /* PCI Express 3 */
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case 0xB6: /* PCI Express 3 */
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+ case 0xB8: /* PCI Express 4 */
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+ case 0xB9: /* PCI Express 4 */
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+ case 0xBA: /* PCI Express 4 */
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+ case 0xBB: /* PCI Express 4 */
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+ case 0xBC: /* PCI Express 4 */
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+ case 0xBD: /* PCI Express 4 */
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printf("%sID: %u\n", prefix, code1);
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break;
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case 0x07: /* PCMCIA */
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@@ -2292,12 +2314,13 @@ static const char *dmi_memory_array_loca
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"PC-98/C20 Add-on Card", /* 0xA0 */
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"PC-98/C24 Add-on Card",
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"PC-98/E Add-on Card",
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- "PC-98/Local Bus Add-on Card" /* 0xA3 */
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+ "PC-98/Local Bus Add-on Card",
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+ "CXL Flexbus 1.0" /* 0xA4 */
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};
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if (code >= 0x01 && code <= 0x0A)
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return location[code - 0x01];
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- if (code >= 0xA0 && code <= 0xA3)
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+ if (code >= 0xA0 && code <= 0xA4)
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return location_0xA0[code - 0xA0];
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return out_of_spec;
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}
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@@ -2420,10 +2443,11 @@ static const char *dmi_memory_device_for
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"RIMM",
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"SODIMM",
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"SRIMM",
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- "FB-DIMM" /* 0x0F */
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+ "FB-DIMM",
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+ "Die" /* 0x10 */
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};
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- if (code >= 0x01 && code <= 0x0F)
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+ if (code >= 0x01 && code <= 0x10)
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return form_factor[code - 0x01];
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return out_of_spec;
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}
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@@ -2472,10 +2496,12 @@ static const char *dmi_memory_device_typ
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"LPDDR2",
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"LPDDR3",
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"LPDDR4",
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- "Logical non-volatile device" /* 0x1F */
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+ "Logical non-volatile device",
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+ "HBM",
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+ "HBM2" /* 0x21 */
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};
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- if (code >= 0x01 && code <= 0x1F)
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+ if (code >= 0x01 && code <= 0x21)
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return type[code - 0x01];
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return out_of_spec;
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}
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@@ -2531,7 +2557,7 @@ static void dmi_memory_technology(u8 cod
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"NVDIMM-N",
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"NVDIMM-F",
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"NVDIMM-P",
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- "Intel persistent memory" /* 0x07 */
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+ "Intel Optane DC persistent memory" /* 0x07 */
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};
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if (code >= 0x01 && code <= 0x07)
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printf(" %s", technology[code - 0x01]);
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