f9063f0adf
- Add RISC-V specific patches: * 0001-libelf-Sync-elf.h-from-glibc.patch * 0002-backends-Handle-new-RISC-V-specific-definitions.patch * 0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch * 0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch * 0005-backends-Add-RISC-V-object-attribute-printing.patch OBS-URL: https://build.opensuse.org/request/show/1010630 OBS-URL: https://build.opensuse.org/package/show/Base:System/elfutils?expand=0&rev=186
131 lines
3.8 KiB
Diff
131 lines
3.8 KiB
Diff
From 04b83727c0a48e8d6f4c7e633886439cc1e8a7b3 Mon Sep 17 00:00:00 2001
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From: Andreas Schwab <schwab@suse.de>
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Date: Mon, 8 Aug 2022 13:35:20 +0200
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Subject: [PATCH] backends: Add RISC-V object attribute printing
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Signed-off-by: Andreas Schwab <schwab@suse.de>
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---
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backends/ChangeLog | 6 ++++
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backends/Makefile.am | 3 +-
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backends/riscv_attrs.c | 80 ++++++++++++++++++++++++++++++++++++++++++
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backends/riscv_init.c | 2 ++
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4 files changed, 90 insertions(+), 1 deletion(-)
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create mode 100644 backends/riscv_attrs.c
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diff --git a/backends/Makefile.am b/backends/Makefile.am
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index 9566377f..1863f66a 100644
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--- a/backends/Makefile.am
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+++ b/backends/Makefile.am
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@@ -91,7 +91,8 @@ m68k_corenote_no_Wpacked_not_aligned = yes
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bpf_SRCS = bpf_init.c bpf_regs.c bpf_symbol.c
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riscv_SRCS = riscv_init.c riscv_symbol.c riscv_cfi.c riscv_regs.c \
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- riscv_initreg.c riscv_corenote.c riscv64_corenote.c riscv_retval.c
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+ riscv_initreg.c riscv_corenote.c riscv64_corenote.c \
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+ riscv_retval.c riscv_attrs.c
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csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \
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csky_regs.c csky_initreg.c csky_corenote.c
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diff --git a/backends/riscv_attrs.c b/backends/riscv_attrs.c
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new file mode 100644
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index 00000000..d74aac5c
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--- /dev/null
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+++ b/backends/riscv_attrs.c
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@@ -0,0 +1,80 @@
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+/* RISC-V ABI-specified defaults for DWARF CFI.
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+ This file is part of elfutils.
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+
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+ This file is free software; you can redistribute it and/or modify
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+ it under the terms of either
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+
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+ * the GNU Lesser General Public License as published by the Free
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+ Software Foundation; either version 3 of the License, or (at
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+ your option) any later version
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+
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+ or
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+
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+ * the GNU General Public License as published by the Free
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+ Software Foundation; either version 2 of the License, or (at
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+ your option) any later version
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+
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+ or both in parallel, as here.
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+
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+ elfutils is distributed in the hope that it will be useful, but
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+ WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ General Public License for more details.
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+
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+ You should have received copies of the GNU General Public License and
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+ the GNU Lesser General Public License along with this program. If
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+ not, see <http://www.gnu.org/licenses/>. */
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+
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+#ifdef HAVE_CONFIG_H
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+# include <config.h>
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+#endif
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+
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+#include <string.h>
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+#include <dwarf.h>
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+
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+#define BACKEND riscv_
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+#include "libebl_CPU.h"
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+
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+#define KNOWN_VALUES(...) do \
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+ { \
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+ static const char *table[] = { __VA_ARGS__ }; \
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+ if (value < sizeof table / sizeof table[0]) \
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+ *value_name = table[value]; \
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+ } while (0)
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+
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+bool
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+riscv_check_object_attribute (Ebl *ebl __attribute__ ((unused)),
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+ const char *vendor, int tag, uint64_t value,
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+ const char **tag_name, const char **value_name)
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+{
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+ if (!strcmp (vendor, "riscv"))
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+ switch (tag)
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+ {
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+ case 4:
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+ *tag_name = "RISCV_stack_align";
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+ return true;
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+
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+ case 5:
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+ *tag_name = "RISCV_arch";
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+ return true;
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+
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+ case 6:
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+ *tag_name = "RISCV_unaligned_access";
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+ KNOWN_VALUES ("No unaligned access", "Unaligned access");
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+ return true;
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+
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+ case 8:
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+ *tag_name = "RISCV_priv_spec";
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+ return true;
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+
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+ case 10:
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+ *tag_name = "RISCV_priv_spec_minor";
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+ return true;
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+
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+ case 12:
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+ *tag_name = "RISCV_priv_spec_revision";
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+ return true;
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+ }
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+
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+ return false;
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+}
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diff --git a/backends/riscv_init.c b/backends/riscv_init.c
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index f2d46082..e5e9e33e 100644
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--- a/backends/riscv_init.c
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+++ b/backends/riscv_init.c
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@@ -69,6 +69,8 @@ riscv_init (Elf *elf,
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HOOK (eh, section_type_name);
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HOOK (eh, dynamic_tag_name);
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HOOK (eh, dynamic_tag_check);
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+ HOOK (eh, check_object_attribute);
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+ HOOK (eh, set_initial_registers_tid);
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if (eh->class == ELFCLASS64)
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eh->core_note = riscv64_core_note;
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else
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--
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2.37.1
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