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Accepting request 176570 from home:Andreas_Schwab:Factory

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- libatomic_ops-aarch64.patch: update makefile to install missing headers,
  don't use AO_EXPECT_FALSE.

OBS-URL: https://build.opensuse.org/request/show/176570
OBS-URL: https://build.opensuse.org/package/show/devel:libraries:c_c++/gc?expand=0&rev=26
This commit is contained in:
Dr. Werner Fink 2013-05-26 09:37:56 +00:00 committed by Git OBS Bridge
parent 57cce54a33
commit 7b748db8a3
2 changed files with 16 additions and 9 deletions
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6
gc.changes
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@ -1,3 +1,9 @@
-------------------------------------------------------------------
Sat May 25 19:16:48 UTC 2013 - root@localhost
- libatomic_ops-aarch64.patch: update makefile to install missing headers,
don't use AO_EXPECT_FALSE.
------------------------------------------------------------------- -------------------------------------------------------------------
Sat May 18 08:10:09 UTC 2013 - schwab@suse.de Sat May 18 08:10:09 UTC 2013 - schwab@suse.de

19
libatomic_ops-aarch64.patch
View File

@ -17,11 +17,12 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/Makefile.am
=================================================================== ===================================================================
--- libatomic_ops/src/atomic_ops/sysdeps/Makefile.am.orig --- libatomic_ops/src/atomic_ops/sysdeps/Makefile.am.orig
+++ libatomic_ops/src/atomic_ops/sysdeps/Makefile.am +++ libatomic_ops/src/atomic_ops/sysdeps/Makefile.am
@@ -30,6 +30,7 @@ nobase_sysdep_HEADERS= generic_pthread.h @@ -30,6 +30,8 @@ nobase_sysdep_HEADERS= generic_pthread.h
gcc/hexagon.h gcc/hppa.h gcc/ia64.h gcc/m68k.h \ gcc/hexagon.h gcc/hppa.h gcc/ia64.h gcc/m68k.h \
gcc/mips.h gcc/powerpc.h gcc/s390.h \ gcc/mips.h gcc/powerpc.h gcc/s390.h \
gcc/sh.h gcc/sparc.h gcc/x86.h gcc/x86_64.h \ gcc/sh.h gcc/sparc.h gcc/x86.h gcc/x86_64.h \
+ gcc/aarch64.h gcc/generic.h + gcc/aarch64.h gcc/generic.h \
+ gcc/generic-small.h gcc/generic-arithm.h \
\ \
hpc/hppa.h hpc/ia64.h \ hpc/hppa.h hpc/ia64.h \
\ \
@ -77,7 +78,7 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/gcc/aarch64.h
+ " stxp %w2, %0, %1, %3" + " stxp %w2, %0, %1, %3"
+ : "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status) + : "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status)
+ : "Q" (*addr)); + : "Q" (*addr));
+ } while (AO_EXPECT_FALSE(status)); + } while (status);
+ return result; + return result;
+ } + }
+# define AO_HAVE_double_load +# define AO_HAVE_double_load
@ -94,7 +95,7 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/gcc/aarch64.h
+ " stxp %w2, %0, %1, %3" + " stxp %w2, %0, %1, %3"
+ : "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status) + : "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status)
+ : "Q" (*addr)); + : "Q" (*addr));
+ } while (AO_EXPECT_FALSE(status)); + } while (status);
+ return result; + return result;
+ } + }
+# define AO_HAVE_double_load_acquire +# define AO_HAVE_double_load_acquire
@ -114,7 +115,7 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/gcc/aarch64.h
+ : "r" (value.AO_val1), "r" (value.AO_val2)); + : "r" (value.AO_val1), "r" (value.AO_val2));
+ /* Compared to the arm.h implementation, the 'cc' (flags) are not */ + /* Compared to the arm.h implementation, the 'cc' (flags) are not */
+ /* clobbered because A64 has no concept of conditional execution. */ + /* clobbered because A64 has no concept of conditional execution. */
+ } while (AO_EXPECT_FALSE(status)); + } while (status);
+ } + }
+# define AO_HAVE_double_store +# define AO_HAVE_double_store
+ +
@ -131,7 +132,7 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/gcc/aarch64.h
+ : "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status), + : "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status),
+ "=Q" (*addr) + "=Q" (*addr)
+ : "r" (value.AO_val1), "r" (value.AO_val2)); + : "r" (value.AO_val1), "r" (value.AO_val2));
+ } while (AO_EXPECT_FALSE(status)); + } while (status);
+ } + }
+# define AO_HAVE_double_store_release +# define AO_HAVE_double_store_release
+ +
@ -153,7 +154,7 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/gcc/aarch64.h
+ " stxp %w0, %2, %3, %1\n" + " stxp %w0, %2, %3, %1\n"
+ : "=&r" (result), "=Q" (*addr) + : "=&r" (result), "=Q" (*addr)
+ : "r" (new_val.AO_val1), "r" (new_val.AO_val2)); + : "r" (new_val.AO_val1), "r" (new_val.AO_val2));
+ } while (AO_EXPECT_FALSE(result)); + } while (result);
+ return !result; + return !result;
+ } + }
+# define AO_HAVE_double_compare_and_swap +# define AO_HAVE_double_compare_and_swap
@ -176,7 +177,7 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/gcc/aarch64.h
+ " stxp %w0, %2, %3, %1\n" + " stxp %w0, %2, %3, %1\n"
+ : "=&r" (result), "=Q" (*addr) + : "=&r" (result), "=Q" (*addr)
+ : "r" (new_val.AO_val1), "r" (new_val.AO_val2)); + : "r" (new_val.AO_val1), "r" (new_val.AO_val2));
+ } while (AO_EXPECT_FALSE(result)); + } while (result);
+ return !result; + return !result;
+ } + }
+# define AO_HAVE_double_compare_and_swap_acquire +# define AO_HAVE_double_compare_and_swap_acquire
@ -199,7 +200,7 @@ Index: libatomic_ops/src/atomic_ops/sysdeps/gcc/aarch64.h
+ " stlxp %w0, %2, %3, %1\n" + " stlxp %w0, %2, %3, %1\n"
+ : "=&r" (result), "=Q" (*addr) + : "=&r" (result), "=Q" (*addr)
+ : "r" (new_val.AO_val1), "r" (new_val.AO_val2)); + : "r" (new_val.AO_val1), "r" (new_val.AO_val2));
+ } while (AO_EXPECT_FALSE(result)); + } while (result);
+ return !result; + return !result;
+ } + }
+# define AO_HAVE_double_compare_and_swap_release +# define AO_HAVE_double_compare_and_swap_release