diff --git a/cross-aarch64-gcc11-bootstrap.changes b/cross-aarch64-gcc11-bootstrap.changes index d17cdc8..6670830 100644 --- a/cross-aarch64-gcc11-bootstrap.changes +++ b/cross-aarch64-gcc11-bootstrap.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-aarch64-gcc11-bootstrap.spec b/cross-aarch64-gcc11-bootstrap.spec index b528c08..9ad45e0 100644 --- a/cross-aarch64-gcc11-bootstrap.spec +++ b/cross-aarch64-gcc11-bootstrap.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-aarch64-gcc11.changes b/cross-aarch64-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-aarch64-gcc11.changes +++ b/cross-aarch64-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-aarch64-gcc11.spec b/cross-aarch64-gcc11.spec index 3118dca..a3d7cbe 100644 --- a/cross-aarch64-gcc11.spec +++ b/cross-aarch64-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-amdgcn-gcc11.changes b/cross-amdgcn-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-amdgcn-gcc11.changes +++ b/cross-amdgcn-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-amdgcn-gcc11.spec b/cross-amdgcn-gcc11.spec index 7838938..e4251c8 100644 --- a/cross-amdgcn-gcc11.spec +++ b/cross-amdgcn-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-arm-gcc11.changes b/cross-arm-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-arm-gcc11.changes +++ b/cross-arm-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-arm-gcc11.spec b/cross-arm-gcc11.spec index 848dd21..f401044 100644 --- a/cross-arm-gcc11.spec +++ b/cross-arm-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-arm-none-gcc11-bootstrap.changes b/cross-arm-none-gcc11-bootstrap.changes index d17cdc8..6670830 100644 --- a/cross-arm-none-gcc11-bootstrap.changes +++ b/cross-arm-none-gcc11-bootstrap.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-arm-none-gcc11-bootstrap.spec b/cross-arm-none-gcc11-bootstrap.spec index daa235f..04bbef1 100644 --- a/cross-arm-none-gcc11-bootstrap.spec +++ b/cross-arm-none-gcc11-bootstrap.spec @@ -571,14 +571,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -591,24 +583,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-arm-none-gcc11.changes b/cross-arm-none-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-arm-none-gcc11.changes +++ b/cross-arm-none-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-arm-none-gcc11.spec b/cross-arm-none-gcc11.spec index 1403566..cfb1041 100644 --- a/cross-arm-none-gcc11.spec +++ b/cross-arm-none-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-avr-gcc11-bootstrap.changes b/cross-avr-gcc11-bootstrap.changes index d17cdc8..6670830 100644 --- a/cross-avr-gcc11-bootstrap.changes +++ b/cross-avr-gcc11-bootstrap.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-avr-gcc11-bootstrap.spec b/cross-avr-gcc11-bootstrap.spec index 4d5aae8..e592490 100644 --- a/cross-avr-gcc11-bootstrap.spec +++ b/cross-avr-gcc11-bootstrap.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-avr-gcc11.changes b/cross-avr-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-avr-gcc11.changes +++ b/cross-avr-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-avr-gcc11.spec b/cross-avr-gcc11.spec index 504769a..5fab739 100644 --- a/cross-avr-gcc11.spec +++ b/cross-avr-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-epiphany-gcc11-bootstrap.changes b/cross-epiphany-gcc11-bootstrap.changes index d17cdc8..6670830 100644 --- a/cross-epiphany-gcc11-bootstrap.changes +++ b/cross-epiphany-gcc11-bootstrap.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-epiphany-gcc11-bootstrap.spec b/cross-epiphany-gcc11-bootstrap.spec index 3aca1a2..a12d301 100644 --- a/cross-epiphany-gcc11-bootstrap.spec +++ b/cross-epiphany-gcc11-bootstrap.spec @@ -571,14 +571,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -591,24 +583,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-epiphany-gcc11.changes b/cross-epiphany-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-epiphany-gcc11.changes +++ b/cross-epiphany-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-epiphany-gcc11.spec b/cross-epiphany-gcc11.spec index a3ecad0..3abfa5c 100644 --- a/cross-epiphany-gcc11.spec +++ b/cross-epiphany-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-hppa-gcc11.changes b/cross-hppa-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-hppa-gcc11.changes +++ b/cross-hppa-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-hppa-gcc11.spec b/cross-hppa-gcc11.spec index a846c78..eab52c7 100644 --- a/cross-hppa-gcc11.spec +++ b/cross-hppa-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-m68k-gcc11.changes b/cross-m68k-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-m68k-gcc11.changes +++ b/cross-m68k-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-m68k-gcc11.spec b/cross-m68k-gcc11.spec index bf62b6d..113d4b3 100644 --- a/cross-m68k-gcc11.spec +++ b/cross-m68k-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-mips-gcc11.changes b/cross-mips-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-mips-gcc11.changes +++ b/cross-mips-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-mips-gcc11.spec b/cross-mips-gcc11.spec index 1bc46f3..6092220 100644 --- a/cross-mips-gcc11.spec +++ b/cross-mips-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-nvptx-gcc11.changes b/cross-nvptx-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-nvptx-gcc11.changes +++ b/cross-nvptx-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-nvptx-gcc11.spec b/cross-nvptx-gcc11.spec index 8bf51e2..14b12a5 100644 --- a/cross-nvptx-gcc11.spec +++ b/cross-nvptx-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-ppc64-gcc11.changes b/cross-ppc64-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-ppc64-gcc11.changes +++ b/cross-ppc64-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-ppc64-gcc11.spec b/cross-ppc64-gcc11.spec index d2bee7b..96cb4f1 100644 --- a/cross-ppc64-gcc11.spec +++ b/cross-ppc64-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-ppc64le-gcc11.changes b/cross-ppc64le-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-ppc64le-gcc11.changes +++ b/cross-ppc64le-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-ppc64le-gcc11.spec b/cross-ppc64le-gcc11.spec index 8e6699b..47e77fc 100644 --- a/cross-ppc64le-gcc11.spec +++ b/cross-ppc64le-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-riscv64-elf-gcc11-bootstrap.changes b/cross-riscv64-elf-gcc11-bootstrap.changes index d17cdc8..6670830 100644 --- a/cross-riscv64-elf-gcc11-bootstrap.changes +++ b/cross-riscv64-elf-gcc11-bootstrap.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-riscv64-elf-gcc11-bootstrap.spec b/cross-riscv64-elf-gcc11-bootstrap.spec index 1694e84..8285f77 100644 --- a/cross-riscv64-elf-gcc11-bootstrap.spec +++ b/cross-riscv64-elf-gcc11-bootstrap.spec @@ -571,14 +571,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -591,24 +583,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-riscv64-elf-gcc11.changes b/cross-riscv64-elf-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-riscv64-elf-gcc11.changes +++ b/cross-riscv64-elf-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-riscv64-elf-gcc11.spec b/cross-riscv64-elf-gcc11.spec index 4a02126..f331a34 100644 --- a/cross-riscv64-elf-gcc11.spec +++ b/cross-riscv64-elf-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-riscv64-gcc11-bootstrap.changes b/cross-riscv64-gcc11-bootstrap.changes index d17cdc8..6670830 100644 --- a/cross-riscv64-gcc11-bootstrap.changes +++ b/cross-riscv64-gcc11-bootstrap.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-riscv64-gcc11-bootstrap.spec b/cross-riscv64-gcc11-bootstrap.spec index 602fa80..ba2cd7e 100644 --- a/cross-riscv64-gcc11-bootstrap.spec +++ b/cross-riscv64-gcc11-bootstrap.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-riscv64-gcc11.changes b/cross-riscv64-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-riscv64-gcc11.changes +++ b/cross-riscv64-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-riscv64-gcc11.spec b/cross-riscv64-gcc11.spec index ecb43be..8c8e2a4 100644 --- a/cross-riscv64-gcc11.spec +++ b/cross-riscv64-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-rx-gcc11-bootstrap.changes b/cross-rx-gcc11-bootstrap.changes index d17cdc8..6670830 100644 --- a/cross-rx-gcc11-bootstrap.changes +++ b/cross-rx-gcc11-bootstrap.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-rx-gcc11-bootstrap.spec b/cross-rx-gcc11-bootstrap.spec index 0c9d3e5..320a6fa 100644 --- a/cross-rx-gcc11-bootstrap.spec +++ b/cross-rx-gcc11-bootstrap.spec @@ -571,14 +571,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -591,24 +583,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-rx-gcc11.changes b/cross-rx-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-rx-gcc11.changes +++ b/cross-rx-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-rx-gcc11.spec b/cross-rx-gcc11.spec index 26a505b..e9519b0 100644 --- a/cross-rx-gcc11.spec +++ b/cross-rx-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-s390x-gcc11.changes b/cross-s390x-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-s390x-gcc11.changes +++ b/cross-s390x-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-s390x-gcc11.spec b/cross-s390x-gcc11.spec index 6682adc..09c89c7 100644 --- a/cross-s390x-gcc11.spec +++ b/cross-s390x-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-sparc-gcc11.changes b/cross-sparc-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-sparc-gcc11.changes +++ b/cross-sparc-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-sparc-gcc11.spec b/cross-sparc-gcc11.spec index 3fa63b9..c07eccf 100644 --- a/cross-sparc-gcc11.spec +++ b/cross-sparc-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-sparc64-gcc11.changes b/cross-sparc64-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-sparc64-gcc11.changes +++ b/cross-sparc64-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-sparc64-gcc11.spec b/cross-sparc64-gcc11.spec index 810ca9d..f566877 100644 --- a/cross-sparc64-gcc11.spec +++ b/cross-sparc64-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/cross-x86_64-gcc11.changes b/cross-x86_64-gcc11.changes index d17cdc8..6670830 100644 --- a/cross-x86_64-gcc11.changes +++ b/cross-x86_64-gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/cross-x86_64-gcc11.spec b/cross-x86_64-gcc11.spec index 5a9e30f..13dfd31 100644 --- a/cross-x86_64-gcc11.spec +++ b/cross-x86_64-gcc11.spec @@ -570,14 +570,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -590,24 +582,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/gcc.spec.in b/gcc.spec.in index 4b91280..ab8da5d 100644 --- a/gcc.spec.in +++ b/gcc.spec.in @@ -1439,14 +1439,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -1459,24 +1451,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/gcc11-testresults.changes b/gcc11-testresults.changes index d17cdc8..6670830 100644 --- a/gcc11-testresults.changes +++ b/gcc11-testresults.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/gcc11-testresults.spec b/gcc11-testresults.spec index 95e776b..a059cb1 100644 --- a/gcc11-testresults.spec +++ b/gcc11-testresults.spec @@ -761,14 +761,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -781,24 +773,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \ diff --git a/gcc11.changes b/gcc11.changes index d17cdc8..6670830 100644 --- a/gcc11.changes +++ b/gcc11.changes @@ -1,3 +1,9 @@ +------------------------------------------------------------------- +Mon Mar 7 22:43:44 UTC 2022 - Dirk Müller + +- drop armv5tel, merge arm and armv6hl +- use --with-cpu rather than specifying --with-arch/--with-tune + ------------------------------------------------------------------- Wed Mar 2 09:14:45 UTC 2022 - Richard Biener diff --git a/gcc11.spec b/gcc11.spec index 951af02..b732b09 100644 --- a/gcc11.spec +++ b/gcc11.spec @@ -2244,14 +2244,6 @@ amdgcn-amdhsa,\ --with-native-system-header-dir=/include \ %endif %endif -%if "%{TARGET_ARCH}" == "arm" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "arm-none" --enable-multilib \ --with-multilib-list=aprofile,rmprofile \ @@ -2264,24 +2256,15 @@ amdgcn-amdhsa,\ --disable-threads \ --disable-tls \ %endif -%if "%{TARGET_ARCH}" == "armv5tel" - --with-arch=armv5te \ - --with-float=soft \ - --with-mode=arm \ +%if "%{TARGET_ARCH}" == "armv6hl" || "%{TARGET_ARCH}" == "arm" + --with-cpu=arm1176jzf-s \ + --with-float=hard \ --with-abi=aapcs-linux \ + --with-fpu=vfpv2 \ --disable-sjlj-exceptions \ %endif -%if "%{TARGET_ARCH}" == "armv6hl" - --with-arch=armv6zk \ - --with-tune=arm1176jzf-s \ - --with-float=hard \ - --with-abi=aapcs-linux \ - --with-fpu=vfp \ - --disable-sjlj-exceptions \ -%endif %if "%{TARGET_ARCH}" == "armv7hl" - --with-arch=armv7-a \ - --with-tune=generic-armv7-a \ + --with-cpu=generic-armv7-a \ --with-float=hard \ --with-abi=aapcs-linux \ --with-fpu=vfpv3-d16 \