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OBS-URL: https://build.opensuse.org/package/show/devel:gcc/gcc7?expand=0&rev=216
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Richard Biener 2021-10-22 07:27:21 +00:00 committed by Git OBS Bridge
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314
gcc7-pfe-0016-Backport-AArch64-PR92424-Fix-fpatchable-function-ent.patch
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@ -1,314 +0,0 @@
From 6d8714163cd0b94514ad8d1d98d17e99b00f3d2f Mon Sep 17 00:00:00 2001
From: Szabolcs Nagy <szabolcs.nagy@arm.com>
Date: Wed, 15 Jan 2020 12:23:40 +0000
Subject: [PATCH 16/23] Backport [AArch64] PR92424: Fix
-fpatchable-function-entry=N,M with BTI
This is a workaround that emits a BTI after the function label if that
is followed by a patch area. We try to remove the BTI that follows the
patch area (this may fail e.g. if the first instruction is a PACIASP).
So before this commit -fpatchable-function-entry=3,1 with bti generates
.section __patchable_function_entries
.8byte .LPFE
.text
.LPFE:
nop
foo:
nop
nop
bti c // or paciasp
...
and after this commit
.section __patchable_function_entries
.8byte .LPFE
.text
.LPFE:
nop
foo:
bti c
nop
nop
// may be paciasp
...
and with -fpatchable-function-entry=1 (M=0) the code now is
foo:
bti c
.section __patchable_function_entries
.8byte .LPFE
.text
.LPFE:
nop
// may be paciasp
...
There is a new bti insn in the middle of the patchable area users need
to be aware of unless M=0 (patch area is after the new bti) or M=N
(patch area is before the label, no new bti). Note: bti is not added to
all functions consistently (it can be turned off per function using a
target attribute or the compiler may detect that the function is never
called indirectly), so if bti is inserted in the middle of a patch area
then user code needs to deal with detecting it.
Tested on aarch64-none-linux-gnu.
gcc/ChangeLog:
PR target/92424
* config/aarch64/aarch64.c (aarch64_declare_function_name): Set
cfun->machine->label_is_assembled.
(aarch64_print_patchable_function_entry): New.
(TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
* config/aarch64/aarch64.h (struct machine_function): New field,
label_is_assembled.
gcc/testsuite/ChangeLog:
PR target/92424
* gcc.target/aarch64/pr92424-1.c: New test.
* gcc.target/aarch64/pr92424-2.c: New test.
* gcc.target/aarch64/pr92424-3.c: New test.
---
gcc/config/aarch64/aarch64.c | 31 +++++
gcc/config/aarch64/aarch64.h | 1 +
gcc/testsuite/gcc.target/aarch64/pr92424-1.c | 122 +++++++++++++++++++
gcc/testsuite/gcc.target/aarch64/pr92424-2.c | 12 ++
gcc/testsuite/gcc.target/aarch64/pr92424-3.c | 12 ++
5 files changed, 178 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-2.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-3.c
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 4e94be3b0b4..744b436a54d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -11753,6 +11753,34 @@ aarch64_declare_function_name (FILE *stream, const char* name,
/* Don't forget the type directive for ELF. */
ASM_OUTPUT_TYPE_DIRECTIVE (stream, name, "function");
ASM_OUTPUT_LABEL (stream, name);
+
+ cfun->machine->label_is_assembled = true;
+}
+
+/* Implement PRINT_PATCHABLE_FUNCTION_ENTRY. Check if the patch area is after
+ the function label and emit a BTI if necessary. */
+
+void
+aarch64_print_patchable_function_entry (FILE *file,
+ unsigned HOST_WIDE_INT patch_area_size,
+ bool record_p)
+{
+ if (cfun->machine->label_is_assembled
+ && aarch64_bti_enabled ()
+ && !cgraph_node::get (cfun->decl)->only_called_directly_p ())
+ {
+ /* Remove the BTI that follows the patch area and insert a new BTI
+ before the patch area right after the function label. */
+ rtx_insn *insn = next_real_nondebug_insn (get_insns ());
+ if (insn
+ && INSN_P (insn)
+ && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
+ && XINT (PATTERN (insn), 1) == UNSPECV_BTI_C)
+ delete_insn (insn);
+ asm_fprintf (file, "\thint\t34 // bti c\n");
+ }
+
+ default_print_patchable_function_entry (file, patch_area_size, record_p);
}
/* Implements TARGET_ASM_FILE_START. Output the assembly header. */
@@ -14779,6 +14807,9 @@ aarch64_run_selftests (void)
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
#define TARGET_ASM_TRAMPOLINE_TEMPLATE aarch64_asm_trampoline_template
+#undef TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY
+#define TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY aarch64_print_patchable_function_entry
+
#undef TARGET_BUILD_BUILTIN_VA_LIST
#define TARGET_BUILD_BUILTIN_VA_LIST aarch64_build_builtin_va_list
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index ddf833ebfe8..8cac2da1070 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -601,6 +601,7 @@ typedef struct GTY (()) machine_function
bool reg_is_wrapped_separately[LAST_SAVED_REGNUM];
/* One entry for each general purpose register. */
rtx call_via[SP_REGNUM];
+ bool label_is_assembled;
} machine_function;
#endif
diff --git a/gcc/testsuite/gcc.target/aarch64/pr92424-1.c b/gcc/testsuite/gcc.target/aarch64/pr92424-1.c
new file mode 100644
index 00000000000..c413a2c306e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr92424-1.c
@@ -0,0 +1,122 @@
+/* { dg-do "compile" } */
+/* { dg-options "-O1" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/* Note: this test only checks the instructions in the function bodies,
+ not the placement of the patch label or nops before the futncion. */
+
+/*
+**f10_none:
+** nop
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=none"),
+ patchable_function_entry (1, 0)))
+f10_none ()
+{
+}
+
+/*
+**f10_pac:
+** hint 34 // bti c
+** nop
+** hint 25 // paciasp
+** hint 29 // autiasp
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=bti+pac-ret+leaf"),
+ patchable_function_entry (1, 0)))
+f10_pac ()
+{
+}
+
+/*
+**f10_bti:
+** hint 34 // bti c
+** nop
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=bti"),
+ patchable_function_entry (1, 0)))
+f10_bti ()
+{
+}
+
+/*
+**f11_none:
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=none"),
+ patchable_function_entry (1, 1)))
+f11_none ()
+{
+}
+
+/*
+**f11_pac:
+** hint 25 // paciasp
+** hint 29 // autiasp
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=bti+pac-ret+leaf"),
+ patchable_function_entry (1, 1)))
+f11_pac ()
+{
+}
+
+/*
+**f11_bti:
+** hint 34 // bti c
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=bti"),
+ patchable_function_entry (1, 1)))
+f11_bti ()
+{
+}
+
+/*
+**f21_none:
+** nop
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=none"),
+ patchable_function_entry (2, 1)))
+f21_none ()
+{
+}
+
+/*
+**f21_pac:
+** hint 34 // bti c
+** nop
+** hint 25 // paciasp
+** hint 29 // autiasp
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=bti+pac-ret+leaf"),
+ patchable_function_entry (2, 1)))
+f21_pac ()
+{
+}
+
+/*
+**f21_bti:
+** hint 34 // bti c
+** nop
+** ret
+*/
+void
+__attribute__ ((target("branch-protection=bti"),
+ patchable_function_entry (2, 1)))
+f21_bti ()
+{
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr92424-2.c b/gcc/testsuite/gcc.target/aarch64/pr92424-2.c
new file mode 100644
index 00000000000..0e75657a153
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr92424-2.c
@@ -0,0 +1,12 @@
+/* { dg-do "compile" } */
+/* { dg-options "-O1" } */
+
+/* Test the placement of the .LPFE1 label. */
+
+void
+__attribute__ ((target("branch-protection=bti"),
+ patchable_function_entry (1, 0)))
+f10_bti ()
+{
+}
+/* { dg-final { scan-assembler "f10_bti:\n\thint\t34 // bti c\n.*\.LPFE1:\n\tnop\n.*\tret\n" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pr92424-3.c b/gcc/testsuite/gcc.target/aarch64/pr92424-3.c
new file mode 100644
index 00000000000..0a1f74d4096
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr92424-3.c
@@ -0,0 +1,12 @@
+/* { dg-do "compile" } */
+/* { dg-options "-O1" } */
+
+/* Test the placement of the .LPFE1 label. */
+
+void
+__attribute__ ((target("branch-protection=bti+pac-ret+leaf"),
+ patchable_function_entry (1, 0)))
+f10_pac ()
+{
+}
+/* { dg-final { scan-assembler "f10_pac:\n\thint\t34 // bti c\n.*\.LPFE1:\n\tnop\n.*\thint\t25 // paciasp\n.*\thint\t29 // autiasp\n.*\tret\n" } } */
--
2.33.1

38
gcc7-pfe-0017-Backport-Fix-patchable-function-entry-on-arc.patch
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@ -1,38 +0,0 @@
From 8387783b66844e2ec2bcce0758088b309ab8559a Mon Sep 17 00:00:00 2001
From: Andrew Pinski <apinski@marvell.com>
Date: Wed, 22 Jan 2020 23:34:34 +0000
Subject: [PATCH 17/23] Backport Fix patchable-function-entry on arc
The problem here is arc looks at current_output_insn unconditional
but sometimes current_output_insn is NULL. With patchable-function-entry,
it will be. This is similar to how the nios2, handles "%.".
Committed as obvious after a simple test with -fpatchable-function-entry=1.
gcc/ChangeLog
2021-10-07 Giuliano Belinassi <gbelinassi@suse.de>
Backport from mainline
2020-01-22 Andrew Pinski <apinski@marvell.com>
* config/arc/arc.c (output_short_suffix): Check insn for nullness.
---
gcc/config/arc/arc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 92fecad93d9..5e92983929d 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -4195,6 +4195,8 @@ static void
output_short_suffix (FILE *file)
{
rtx_insn *insn = current_output_insn;
+ if (!insn)
+ return;
if (arc_verify_short (insn, cfun->machine->unalign, 1))
{
--
2.33.1

249
gcc7-pfe-0018-Backport-Add-patch_area_size-and-patch_area_entry-to.patch
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@ -1,249 +0,0 @@
From 8ea7fd2def80f1473bf488c2ffefefc43f669a71 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Fri, 1 May 2020 21:03:10 -0700
Subject: [PATCH 18/23] Backport Add patch_area_size and patch_area_entry to
crtl
Currently patchable area is at the wrong place. It is placed immediately
after function label and before .cfi_startproc. A backend should be able
to add a pseudo patchable area instruction durectly into RTL. This patch
adds patch_area_size and patch_area_entry to crtl so that the patchable
area info is available in RTL passes.
It also limits patch_area_size and patch_area_entry to 65535, which is
a reasonable maximum size for patchable area.
gcc/
PR target/93492
* cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
and crtl->patch_area_entry.
* emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
* opts.c (common_handle_option): Limit
function_entry_patch_area_size and function_entry_patch_area_start
to USHRT_MAX. Fix a typo in error message.
* varasm.c (assemble_start_function): Use crtl->patch_area_size
and crtl->patch_area_entry.
* doc/invoke.texi: Document the maximum value for
-fpatchable-function-entry.
gcc/c-family/
PR target/93492
* c-attribs.c (handle_patchable_function_entry_attribute): Limit
value to USHRT_MAX (65535).
gcc/testsuite/
PR target/93492
* c-c++-common/patchable_function_entry-error-1.c: New test.
* c-c++-common/patchable_function_entry-error-2.c: Likewise.
* c-c++-common/patchable_function_entry-error-3.c: Likewise.
---
gcc/c-family/c-attribs.c | 9 ++++
gcc/cfgexpand.c | 44 +++++++++++++++++++
gcc/doc/invoke.texi | 1 +
gcc/emit-rtl.h | 6 +++
gcc/opts.c | 4 +-
.../patchable_function_entry-error-1.c | 9 ++++
.../patchable_function_entry-error-2.c | 9 ++++
.../patchable_function_entry-error-3.c | 17 +++++++
gcc/varasm.c | 4 +-
9 files changed, 100 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/c-c++-common/patchable_function_entry-error-1.c
create mode 100644 gcc/testsuite/c-c++-common/patchable_function_entry-error-2.c
create mode 100644 gcc/testsuite/c-c++-common/patchable_function_entry-error-3.c
diff --git a/gcc/c-family/c-attribs.c b/gcc/c-family/c-attribs.c
index f0d2b1ed500..c01baffbc57 100644
--- a/gcc/c-family/c-attribs.c
+++ b/gcc/c-family/c-attribs.c
@@ -3206,6 +3206,15 @@ handle_patchable_function_entry_attribute (tree *, tree name, tree args,
*no_add_attrs = true;
return NULL_TREE;
}
+
+ if (tree_to_uhwi (val) > USHRT_MAX)
+ {
+ warning (OPT_Wattributes,
+ "%qE attribute argument %qE is out of range (> 65535)",
+ name, val);
+ *no_add_attrs = true;
+ return NULL_TREE;
+ }
}
return NULL_TREE;
}
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 7fd3916a3c7..2a603823a71 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -6481,6 +6481,50 @@ pass_expand::execute (function *fun)
if (crtl->tail_call_emit)
fixup_tail_calls ();
+ unsigned HOST_WIDE_INT patch_area_size = function_entry_patch_area_size;
+ unsigned HOST_WIDE_INT patch_area_entry = function_entry_patch_area_start;
+
+ tree patchable_function_entry_attr
+ = lookup_attribute ("patchable_function_entry",
+ DECL_ATTRIBUTES (cfun->decl));
+ if (patchable_function_entry_attr)
+ {
+ tree pp_val = TREE_VALUE (patchable_function_entry_attr);
+ tree patchable_function_entry_value1 = TREE_VALUE (pp_val);
+
+ patch_area_size = tree_to_uhwi (patchable_function_entry_value1);
+ patch_area_entry = 0;
+ if (TREE_CHAIN (pp_val) != NULL_TREE)
+ {
+ tree patchable_function_entry_value2
+ = TREE_VALUE (TREE_CHAIN (pp_val));
+ patch_area_entry = tree_to_uhwi (patchable_function_entry_value2);
+ }
+ }
+
+ if (patch_area_entry > patch_area_size)
+ {
+ if (patch_area_size > 0)
+ warning (OPT_Wattributes,
+ "patchable function entry %wu exceeds size %wu",
+ patch_area_entry, patch_area_size);
+ patch_area_entry = 0;
+ }
+
+ crtl->patch_area_size = patch_area_size;
+ crtl->patch_area_entry = patch_area_entry;
+
+ /* This function is not present in gcc 7, nor the profile_count datastructures,
+ so it may be safe to assume that there is not enough engine implemented so
+ far to support that. */
+#if 0
+ /* BB subdivision may have created basic blocks that are only reachable
+ from unlikely bbs but not marked as such in the profile. */
+
+ if (optimize)
+ propagate_unlikely_bbs_forward ();
+#endif
+
/* Remove unreachable blocks, otherwise we cannot compute dominators
which are needed for loop state verification. As a side-effect
this also compacts blocks.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ad71be54e07..9fd3b013ff7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -11445,6 +11445,7 @@ If @code{N=0}, no pad location is recorded.
The NOP instructions are inserted at---and maybe before, depending on
@var{M}---the function entry address, even before the prologue.
+The maximum value of @var{N} and @var{M} is 65535.
@end table
diff --git a/gcc/emit-rtl.h b/gcc/emit-rtl.h
index da60a2d808c..66bc1bef391 100644
--- a/gcc/emit-rtl.h
+++ b/gcc/emit-rtl.h
@@ -163,6 +163,12 @@ struct GTY(()) rtl_data {
local stack. */
unsigned int stack_alignment_estimated;
+ /* How many NOP insns to place at each function entry by default. */
+ unsigned short patch_area_size;
+
+ /* How far the real asm entry point is into this area. */
+ unsigned short patch_area_entry;
+
/* For reorg. */
/* Nonzero if function being compiled called builtin_return_addr or
diff --git a/gcc/opts.c b/gcc/opts.c
index d0430e777ee..3de12b3662f 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -2220,10 +2220,12 @@ common_handle_option (struct gcc_options *opts,
function_entry_patch_area_start = 0;
}
if (function_entry_patch_area_size < 0
+ || function_entry_patch_area_size > USHRT_MAX
|| function_entry_patch_area_start < 0
+ || function_entry_patch_area_start > USHRT_MAX
|| function_entry_patch_area_size
< function_entry_patch_area_start)
- error ("invalid arguments for %<-fpatchable_function_entry%>");
+ error ("invalid arguments for %<-fpatchable-function-entry%>");
free (patch_area_arg);
}
break;
diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-error-1.c b/gcc/testsuite/c-c++-common/patchable_function_entry-error-1.c
new file mode 100644
index 00000000000..f60bf46cfe3
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/patchable_function_entry-error-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */
+/* { dg-options "-O2 -fpatchable-function-entry=65536,1" } */
+/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
+/* { dg-error "invalid arguments for '-fpatchable-function-entry'" "" { target *-*-* } 0 } */
+
+void
+foo (void)
+{
+}
diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-error-2.c b/gcc/testsuite/c-c++-common/patchable_function_entry-error-2.c
new file mode 100644
index 00000000000..90f88c78be7
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/patchable_function_entry-error-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */
+/* { dg-options "-O2 -fpatchable-function-entry=1,65536" } */
+/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
+/* { dg-error "invalid arguments for '-fpatchable-function-entry'" "" { target *-*-* } 0 } */
+
+void
+foo (void)
+{
+}
diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-error-3.c b/gcc/testsuite/c-c++-common/patchable_function_entry-error-3.c
new file mode 100644
index 00000000000..4490e5c15ca
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/patchable_function_entry-error-3.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */
+/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
+
+void
+ __attribute__((patchable_function_entry(65536)))
+foo1 (void) { /* { dg-warning "'patchable_function_entry' attribute argument '65536' is out of range" } */
+}
+
+void
+ __attribute__((patchable_function_entry(65536,1)))
+foo2 (void) { /* { dg-warning "'patchable_function_entry' attribute argument '65536' is out of range" } */
+}
+
+void
+ __attribute__((patchable_function_entry(65536,65536)))
+foo3 (void) { /* { dg-warning "'patchable_function_entry' attribute argument '65536' is out of range" } */
+}
diff --git a/gcc/varasm.c b/gcc/varasm.c
index 0e6f20db361..8d4c0386fe3 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -1829,8 +1829,8 @@ assemble_start_function (tree decl, const char *fnname)
if (DECL_PRESERVE_P (decl))
targetm.asm_out.mark_decl_preserved (fnname);
- unsigned HOST_WIDE_INT patch_area_size = function_entry_patch_area_size;
- unsigned HOST_WIDE_INT patch_area_entry = function_entry_patch_area_start;
+ unsigned short patch_area_size = crtl->patch_area_size;
+ unsigned short patch_area_entry = crtl->patch_area_entry;
tree patchable_function_entry_attr
= lookup_attribute ("patchable_function_entry", DECL_ATTRIBUTES (decl));
--
2.33.1

66
gcc7-pfe-0019-Backport-testsuite-Adjust-patchable_function-tests-f.patch
View File

@ -1,66 +0,0 @@
From c77e8505e9b8e1bbfc8520f52472b29c5e1709e9 Mon Sep 17 00:00:00 2001
From: Hans-Peter Nilsson <hp@bitrange.com>
Date: Fri, 24 Jul 2020 23:50:05 +0200
Subject: [PATCH 19/23] Backport testsuite: Adjust patchable_function tests for
mmix.
There's no reason anyone would want to use the "patchable function"
feature for MMIX and also no reason to exclude those tests. For MMIX,
the NOP equivalent is SWYM ("swymming" is a healthy exercise).
Text-wise, making the tests pass by adjusting the regexp, is shorter,
and it seems unlikely to both appear as a mnemonic for other targets
*and* being emitted in uppercase.
gcc/testsuite:
* c-c++-common/patchable_function_entry-decl.c,
c-c++-common/patchable_function_entry-default.c,
c-c++-common/patchable_function_entry-definition.c: Adjust for mmix.
---
gcc/testsuite/c-c++-common/patchable_function_entry-decl.c | 2 +-
gcc/testsuite/c-c++-common/patchable_function_entry-default.c | 2 +-
.../c-c++-common/patchable_function_entry-definition.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c b/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c
index 4f707b31f0d..3ce7a5b8790 100644
--- a/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c
+++ b/gcc/testsuite/c-c++-common/patchable_function_entry-decl.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */
/* { dg-options "-O2 -fpatchable-function-entry=3,1" } */
/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
-/* { dg-final { scan-assembler-times "nop|NOP" 2 { target { ! { alpha*-*-* } } } } } */
+/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 2 { target { ! { alpha*-*-* } } } } } */
/* { dg-final { scan-assembler-times "bis" 2 { target alpha*-*-* } } } */
extern int a;
diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-default.c b/gcc/testsuite/c-c++-common/patchable_function_entry-default.c
index 97d8a81fbc6..7036f7bfbea 100644
--- a/gcc/testsuite/c-c++-common/patchable_function_entry-default.c
+++ b/gcc/testsuite/c-c++-common/patchable_function_entry-default.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */
/* { dg-options "-O2 -fpatchable-function-entry=3,1" } */
/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
-/* { dg-final { scan-assembler-times "nop|NOP" 3 { target { ! { alpha*-*-* } } } } } */
+/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 3 { target { ! { alpha*-*-* } } } } } */
/* { dg-final { scan-assembler-times "bis" 3 { target alpha*-*-* } } } */
extern int a;
diff --git a/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c b/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c
index ab94533ffec..ad7d7a9e076 100644
--- a/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c
+++ b/gcc/testsuite/c-c++-common/patchable_function_entry-definition.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { ! { nvptx*-*-* visium-*-* } } } } */
/* { dg-options "-O2 -fpatchable-function-entry=3,1" } */
/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
-/* { dg-final { scan-assembler-times "nop|NOP" 1 { target { ! { alpha*-*-* } } } } } */
+/* { dg-final { scan-assembler-times "nop|NOP|SWYM" 1 { target { ! { alpha*-*-* } } } } } */
/* { dg-final { scan-assembler-times "bis" 1 { target alpha*-*-* } } } */
extern int a;
--
2.33.1

1009
gcc7-pfe-0020-Backport-Use-the-section-flag-o-for-__patchable_func.patch
View File

File diff suppressed because it is too large Load Diff

88
gcc7-pfe-0021-Backport-varasm-Fix-up-__patchable_function_entries-.patch
View File

@ -1,88 +0,0 @@
From cd53df36c6bd6cdae12f3bb96490fdebad3eb220 Mon Sep 17 00:00:00 2001
From: Jakub Jelinek <jakub@redhat.com>
Date: Wed, 16 Dec 2020 16:15:35 +0100
Subject: [PATCH 21/23] Backport varasm: Fix up __patchable_function_entries
handling
The SECTION_LINK_ORDER changes don't seem to work properly.
If I compile:
static inline __attribute__((__gnu_inline__)) __attribute__((__unused__)) __attribute__((patchable_function_entry(0, 0))) int foo (int x)
{
return x + 1;
}
static inline __attribute__((__gnu_inline__)) __attribute__((__unused__)) __attribute__((patchable_function_entry(0, 0))) int bar (int x)
{
return x + 2;
}
int
baz (int x)
{
return foo (x) + 1;
}
int
qux (int x)
{
return bar (x) + 2;
}
(distilled from aarch64 Linux kernel) with
-O2 -fpatchable-function-entry=2 on aarch64 compiler configured against
latest binutils, I get:
...
.section __patchable_function_entries,"awo",@progbits,baz
...
.section __patchable_function_entries
...
in the assembly, but when it is assembled, one gets:
[ 4] __patchable_function_entries PROGBITS 0000000000000000 000060 000008 00 WAL 1 0 8
[ 5] .rela__patchable_function_entries RELA 0000000000000000 000280 000018 18 I 12 4 8
[ 6] __patchable_function_entries PROGBITS 0000000000000000 000068 000008 00 0 0 8
[ 7] .rela__patchable_function_entries RELA 0000000000000000 000298 000018 18 I 12 6 8
i.e. one writable allocated section with SHF_LINK_ORDER and another
non-allocated non-writable without link order. In the kernel case there is
always one entry in the WAL section and then dozens or more in the
non-allocated one.
The kernel then fails to link:
WARNING: modpost: vmlinux.o (__patchable_function_entries): unexpected non-allocatable section.
Did you forget to use "ax"/"aw" in a .S file?
Note that for example <linux/init.h> contains
section definitions for use in .S files.
ld: .init.data has both ordered [`__patchable_function_entries' in init/main.o] and unordered [`.init.data' in
+./drivers/firmware/efi/libstub/vsprintf.stub.o] sections
ld: final link failed: bad value
make: *** [Makefile:1175: vmlinux] Error 1
The following patch fixes it by always forcing full section flags for
SECTION_LINK_ORDER sections.
2020-12-16 Jakub Jelinek <jakub@redhat.com>
* varasm.c (default_elf_asm_named_section): Always force
section flags even for sections with SECTION_LINK_ORDER flag.
---
gcc/varasm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/gcc/varasm.c b/gcc/varasm.c
index 7b0792ddaed..9e0e7c0976f 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -6363,9 +6363,10 @@ default_elf_asm_named_section (const char *name, unsigned int flags,
/* If we have already declared this section, we can use an
abbreviated form to switch back to it -- unless this section is
- part of a COMDAT groups, in which case GAS requires the full
- declaration every time. */
+ part of a COMDAT groups or with SHF_GNU_RETAIN or with SHF_LINK_ORDER,
+ in which case GAS requires the full declaration every time. */
if (!(HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
+ && !(flags & (SECTION_RETAIN | SECTION_LINK_ORDER))
&& (flags & SECTION_DECLARED))
{
fprintf (asm_out_file, "\t.section\t%s\n", name);
--
2.33.1

185
gcc7-pfe-0022-Backport-rs6000-Avoid-fpatchable-function-entry-regr.patch
View File

@ -1,185 +0,0 @@
From cea6ee90a846468f87f71a592c9761a5136646b7 Mon Sep 17 00:00:00 2001
From: Jakub Jelinek <jakub@redhat.com>
Date: Sat, 3 Apr 2021 10:03:15 +0200
Subject: [PATCH 22/23] Backport rs6000: Avoid -fpatchable-function-entry*
regressions on powerpc64 be [PR98125]
The SECTION_LINK_ORDER changes broke powerpc64-linux ELFv1. Seems
that the assembler/linker relies on the symbol mentioned for the
"awo" section to be in the same section as the symbols mentioned in
the relocations in that section (i.e. labels for the patchable area
in this case). That is the case for most targets, including powerpc-linux
32-bit or powerpc64 ELFv2 (that one has -fpatchable-function-entry*
support broken for other reasons and it doesn't seem to be a regression).
But it doesn't work on powerpc64-linux ELFv1.
We emit:
.section ".opd","aw"
.align 3
_Z3foov:
.quad .L._Z3foov,.TOC.@tocbase,0
.previous
.type _Z3foov, @function
.L._Z3foov:
.section __patchable_function_entries,"awo",@progbits,_Z3foov
.align 3
.8byte .LPFE1
.section .text._Z3foov,"axG",@progbits,_Z3foov,comdat
.LPFE1:
nop
.LFB0:
.cfi_startproc
and because _Z3foov is in the .opd section rather than the function text
section, it doesn't work.
I'm afraid I don't know what exactly should be done, whether e.g.
it could use
.section __patchable_function_entries,"awo",@progbits,.L._Z3foov
instead, or whether the linker should be changed to handle it as is, or
something else.
But because we have a P1 regression that didn't see useful progress over the
4 months since it has been filed and we don't really have much time, below
is an attempt to do a targetted reversion of H.J's patch, basically act as
if HAVE_GAS_SECTION_LINK_ORDER is never true for powerpc64-linux ELFv1,
but for 32-bit or 64-bit ELFv2 keep working as is.
This would give us time to resolve it for GCC 12 properly.
2021-04-03 Jakub Jelinek <jakub@redhat.com>
PR testsuite/98125
* targhooks.h (default_print_patchable_function_entry_1): Declare.
* targhooks.c (default_print_patchable_function_entry_1): New function,
copied from default_print_patchable_function_entry with an added flags
argument.
(default_print_patchable_function_entry): Rewritten into a small
wrapper around default_print_patchable_function_entry_1.
* config/rs6000/rs6000.c (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY):
Redefine.
(rs6000_print_patchable_function_entry): New function.
* g++.dg/pr93195a.C: Skip on powerpc*-*-* 64-bit.
---
gcc/config/rs6000/rs6000.c | 8 +++++--
gcc/targhooks.c | 38 ++++++++++++++++++++++-----------
gcc/targhooks.h | 3 +++
gcc/testsuite/g++.dg/pr93195a.C | 1 +
4 files changed, 36 insertions(+), 14 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index af0c7ce1656..ac60d6d39ac 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1615,6 +1615,10 @@ static const struct attribute_spec rs6000_attribute_table[] =
#define TARGET_ASM_ASSEMBLE_VISIBILITY rs6000_assemble_visibility
#endif
+#undef TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY
+#define TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY \
+ rs6000_print_patchable_function_entry
+
#undef TARGET_SET_UP_BY_PROLOGUE
#define TARGET_SET_UP_BY_PROLOGUE rs6000_set_up_by_prologue
@@ -27933,8 +27937,8 @@ debug_stack_info (rs6000_stack_t *info)
fprintf (stderr, "\n");
}
-rtx
-rs6000_return_addr (int count, rtx frame)
+enum rtx_code
+rs6000_reverse_condition (machine_mode mode, enum rtx_code code)
{
/* We can't use get_hard_reg_initial_val for LR when count == 0 if LR
is trashed by the prologue, as it is for PIC on ABI_V4 and Darwin. */
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 8aa610f5cde..958ec4ba6ff 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -1610,17 +1610,15 @@ default_compare_by_pieces_branch_ratio (machine_mode)
return 1;
}
-/* Write PATCH_AREA_SIZE NOPs into the asm outfile FILE around a function
- entry. If RECORD_P is true and the target supports named sections,
- the location of the NOPs will be recorded in a special object section
- called "__patchable_function_entries". This routine may be called
- twice per function to put NOPs before and after the function
- entry. */
+/* Helper for default_print_patchable_function_entry and other
+ print_patchable_function_entry hook implementations. */
void
-default_print_patchable_function_entry (FILE *file,
- unsigned HOST_WIDE_INT patch_area_size,
- bool record_p)
+default_print_patchable_function_entry_1 (FILE *file,
+ unsigned HOST_WIDE_INT
+ patch_area_size,
+ bool record_p,
+ unsigned int flags)
{
const char *nop_templ = 0;
int code_num;
@@ -1642,9 +1640,6 @@ default_print_patchable_function_entry (FILE *file,
patch_area_number++;
ASM_GENERATE_INTERNAL_LABEL (buf, "LPFE", patch_area_number);
- unsigned int flags = SECTION_WRITE | SECTION_RELRO;
- if (HAVE_GAS_SECTION_LINK_ORDER)
- flags |= SECTION_LINK_ORDER;
switch_to_section (get_section ("__patchable_function_entries",
flags, current_function_decl));
assemble_align (POINTER_SIZE);
@@ -1661,6 +1656,25 @@ default_print_patchable_function_entry (FILE *file,
output_asm_insn (nop_templ, NULL);
}
+/* Write PATCH_AREA_SIZE NOPs into the asm outfile FILE around a function
+ entry. If RECORD_P is true and the target supports named sections,
+ the location of the NOPs will be recorded in a special object section
+ called "__patchable_function_entries". This routine may be called
+ twice per function to put NOPs before and after the function
+ entry. */
+
+void
+default_print_patchable_function_entry (FILE *file,
+ unsigned HOST_WIDE_INT patch_area_size,
+ bool record_p)
+{
+ unsigned int flags = SECTION_WRITE | SECTION_RELRO;
+ if (HAVE_GAS_SECTION_LINK_ORDER)
+ flags |= SECTION_LINK_ORDER;
+ default_print_patchable_function_entry_1 (file, patch_area_size, record_p,
+ flags);
+}
+
bool
default_profile_before_prologue (void)
{
diff --git a/gcc/targhooks.h b/gcc/targhooks.h
index 6206fe20823..7b6d2fb9138 100644
--- a/gcc/targhooks.h
+++ b/gcc/targhooks.h
@@ -203,6 +203,9 @@ extern bool default_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT,
bool);
extern int default_compare_by_pieces_branch_ratio (machine_mode);
+extern void default_print_patchable_function_entry_1 (FILE *,
+ unsigned HOST_WIDE_INT,
+ bool, unsigned int);
extern void default_print_patchable_function_entry (FILE *,
unsigned HOST_WIDE_INT,
bool);
diff --git a/gcc/testsuite/g++.dg/pr93195a.C b/gcc/testsuite/g++.dg/pr93195a.C
index 26d265da74e..b14f1b3e341 100644
--- a/gcc/testsuite/g++.dg/pr93195a.C
+++ b/gcc/testsuite/g++.dg/pr93195a.C
@@ -1,4 +1,5 @@
/* { dg-do link { target { ! { nvptx*-*-* visium-*-* } } } } */
+/* { dg-skip-if "not supported" { { powerpc*-*-* } && lp64 } } */
// { dg-require-effective-target o_flag_in_section }
/* { dg-options "-O0 -fpatchable-function-entry=1" } */
/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
--
2.33.1

355
gcc7-pfe-0023-Fix-unwinding-issues-when-pfe-is-enabled.patch
View File

@ -1,355 +0,0 @@
From b3190ec938171251b800d626d2d10f3afadf0e9b Mon Sep 17 00:00:00 2001
From: Giuliano Belinassi <gbelinassi@suse.de>
Date: Mon, 18 Oct 2021 18:00:28 -0300
Subject: [PATCH 23/23] Fix unwinding issues when pfe is enabled.
This patch has basically the same behaviour as 3dcea658c, but avoid
relying on the backend and CET mechanisms which are not implemented in
gcc-7.
gcc/ChangeLog
2021-10-18 Michael Matz <matz@suse.de>
* final.c (get_some_local_dynamic_name): Call
emit_patchable_function_entry.
* varasm.c (emit_patchable_function_entry): New.
gcc/testsuite/ChangeLog
2021-10-18 Giuliano Belinassi <gbelinassi@suse.de>
Backport from mainline
2020-02-03 H.J. Lu <hjl.tools@gmail.com>
PR target/93492
* gcc.target/i386/pr93492-1.c: New test.
* gcc.target/i386/pr93492-2.c: Likewise.
* gcc.target/i386/pr93492-3.c: Likewise.
* gcc.target/i386/pr93492-4.c: Likewise.
* gcc.target/i386/pr93492-5.c: Likewise.
Authored-by: Michael Matz <matz@suse.de>
---
gcc/ChangeLog | 6 ++
gcc/final.c | 4 +
gcc/testsuite/gcc.target/i386/pr93492-1.c | 76 +++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr93492-2.c | 12 +++
gcc/testsuite/gcc.target/i386/pr93492-3.c | 13 ++++
gcc/testsuite/gcc.target/i386/pr93492-4.c | 11 +++
gcc/testsuite/gcc.target/i386/pr93492-5.c | 12 +++
gcc/varasm.c | 91 +++++++++++++----------
8 files changed, 187 insertions(+), 38 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr93492-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr93492-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr93492-3.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr93492-4.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr93492-5.c
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 51fed5508dc..537c343e6f1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2021-10-18 Michael Matz <matz@suse.de>
+
+ * final.c (get_some_local_dynamic_name): Call
+ emit_patchable_function_entry.
+ * varasm.c (emit_patchable_function_entry): New.
+
2019-11-14 Release Manager
* GCC 7.5.0 released.
diff --git a/gcc/final.c b/gcc/final.c
index 43743f05d84..53528620545 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -1745,6 +1745,8 @@ get_some_local_dynamic_name ()
return 0;
}
+void emit_patchable_function_entry (tree decl, bool before);
+
/* Output assembler code for the start of a function,
and initialize some of the variables in this file
for the new function. The label for the function and associated
@@ -1781,6 +1783,8 @@ final_start_function (rtx_insn *first, FILE *file,
if (!dwarf2_debug_info_emitted_p (current_function_decl))
dwarf2out_begin_prologue (0, 0, NULL);
+ emit_patchable_function_entry (current_function_decl, false);
+
#ifdef LEAF_REG_REMAP
if (crtl->uses_only_leaf_regs)
leaf_renumber_regs (first);
diff --git a/gcc/testsuite/gcc.target/i386/pr93492-1.c b/gcc/testsuite/gcc.target/i386/pr93492-1.c
new file mode 100644
index 00000000000..3383b0dc27b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr93492-1.c
@@ -0,0 +1,76 @@
+/* { dg-do "compile" } */
+/* { dg-options "-O1" } */
+
+/* Note: this test only checks the instructions in the function bodies,
+ not the placement of the patch label or nops before the function. */
+
+/*
+**f10_none:
+** nop
+** ret
+*/
+void
+__attribute__ ((patchable_function_entry (1, 0)))
+f10_none (void)
+{
+}
+
+/*
+**f10_endbr:
+** endbr(32|64)
+** nop
+** ret
+*/
+void
+__attribute__ ((patchable_function_entry (1, 0)))
+f10_endbr (void)
+{
+}
+
+/*
+**f11_none:
+** ret
+*/
+void
+__attribute__ ((patchable_function_entry (1, 1)))
+f11_none (void)
+{
+}
+
+/*
+**f11_endbr:
+** endbr(32|64)
+** ret
+*/
+void
+__attribute__ ((patchable_function_entry (1, 1)))
+f11_endbr (void)
+{
+}
+
+/*
+**f21_none:
+** nop
+** ret
+*/
+void
+__attribute__ ((patchable_function_entry (2, 1)))
+f21_none (void)
+{
+}
+
+/*
+**f21_endbr:
+** endbr(32|64)
+** nop
+** ret
+*/
+void
+__attribute__ ((patchable_function_entry (2, 1)))
+f21_endbr (void)
+{
+}
+
+/* { dg-final { scan-assembler "\.LPFE1:\n\tnop\n\trep ret" } } */
+/* { dg-final { scan-assembler "\.LPFE2:\n\tnop\n\trep ret" } } */
+/* { dg-final { scan-assembler "f11_none:\n\.LFB2:\n\t\.cfi_startproc\n\trep ret" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr93492-2.c b/gcc/testsuite/gcc.target/i386/pr93492-2.c
new file mode 100644
index 00000000000..d52d7a41637
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr93492-2.c
@@ -0,0 +1,12 @@
+/* { dg-do "compile" } */
+/* { dg-options "-O1 -fasynchronous-unwind-tables -Wno-attributes" } */
+
+/* Test the placement of the .LPFE1 label. */
+
+void
+__attribute__ ((cf_check,patchable_function_entry (1, 0)))
+f10_endbr (void)
+{
+}
+
+/* { dg-final { scan-assembler "\.cfi_startproc\n.*\.LPFE1:\n\tnop\n\trep ret" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr93492-3.c b/gcc/testsuite/gcc.target/i386/pr93492-3.c
new file mode 100644
index 00000000000..d391e117004
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr93492-3.c
@@ -0,0 +1,13 @@
+/* { dg-do "compile" } */
+/* { dg-require-effective-target mfentry } */
+/* { dg-options "-O1 -mfentry -pg -fasynchronous-unwind-tables -Wno-attributes" } */
+
+/* Test the placement of the .LPFE1 label. */
+
+void
+__attribute__ ((cf_check,patchable_function_entry (1, 0)))
+f10_endbr (void)
+{
+}
+
+/* { dg-final { scan-assembler "\t\.cfi_startproc\n.*\.LPFE1:\n\tnop\n1:\tcall\t__fentry__\n\trep ret\n" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr93492-4.c b/gcc/testsuite/gcc.target/i386/pr93492-4.c
new file mode 100644
index 00000000000..d5bfc58f7d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr93492-4.c
@@ -0,0 +1,11 @@
+/* { dg-do "compile" } */
+/* { dg-options "-O1 -fpatchable-function-entry=1 -fasynchronous-unwind-tables -Wno-attributes" } */
+
+/* Test the placement of the .LPFE1 label. */
+
+void
+foo (void)
+{
+}
+
+/* { dg-final { scan-assembler "\t\.cfi_startproc\n.*\.LPFE1:\n\tnop\n\trep ret\n" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr93492-5.c b/gcc/testsuite/gcc.target/i386/pr93492-5.c
new file mode 100644
index 00000000000..0eb900b5a45
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr93492-5.c
@@ -0,0 +1,12 @@
+/* { dg-do "compile" } */
+/* { dg-require-effective-target mfentry } */
+/* { dg-options "-O1 -fpatchable-function-entry=1 -mfentry -pg -fasynchronous-unwind-tables -Wno-attributes" } */
+
+/* Test the placement of the .LPFE1 label. */
+
+void
+foo (void)
+{
+}
+
+/* { dg-final { scan-assembler "\t\.cfi_startproc\n.*\.LPFE1:\n\tnop\n1:\tcall\t__fentry__\n\trep ret\n" } } */
diff --git a/gcc/varasm.c b/gcc/varasm.c
index 9e0e7c0976f..e197fbdaed5 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -1698,6 +1698,58 @@ get_fnname_from_decl (tree decl)
return XSTR (x, 0);
}
+/* Emit the patchable function entry NOPs for function DECL.
+ BEFORE is true if we should emit the nops in front of the function
+ label (i.e. before prologue), or the ones after the function label
+ (part of the prologue). */
+void
+emit_patchable_function_entry (tree decl, bool before)
+{
+ unsigned short patch_area_size = crtl->patch_area_size;
+ unsigned short patch_area_entry = crtl->patch_area_entry;
+
+ tree patchable_function_entry_attr
+ = lookup_attribute ("patchable_function_entry", DECL_ATTRIBUTES (decl));
+ if (patchable_function_entry_attr)
+ {
+ tree pp_val = TREE_VALUE (patchable_function_entry_attr);
+ tree patchable_function_entry_value1 = TREE_VALUE (pp_val);
+
+ patch_area_size = tree_to_uhwi (patchable_function_entry_value1);
+ patch_area_entry = 0;
+ if (TREE_CHAIN (pp_val) != NULL_TREE)
+ {
+ tree patchable_function_entry_value2
+ = TREE_VALUE (TREE_CHAIN (pp_val));
+ patch_area_entry = tree_to_uhwi (patchable_function_entry_value2);
+ }
+ }
+
+ if (patch_area_entry > patch_area_size)
+ {
+ if (patch_area_size > 0 && before)
+ warning (OPT_Wattributes, "patchable function entry > size");
+ patch_area_entry = 0;
+ }
+
+ if (before)
+ {
+ /* Emit the patching area before the entry label, if any. */
+ if (patch_area_entry > 0)
+ targetm.asm_out.print_patchable_function_entry (asm_out_file,
+ patch_area_entry, true);
+ }
+ else
+ {
+ /* And the area after the label. Record it if we haven't done so yet. */
+ if (patch_area_size > patch_area_entry)
+ targetm.asm_out.print_patchable_function_entry (asm_out_file,
+ patch_area_size
+ - patch_area_entry,
+ patch_area_entry == 0);
+ }
+}
+
/* Output assembler code for the constant pool of a function and associated
with defining the name of the function. DECL describes the function.
NAME is the function's name. For the constant pool, we use the current
@@ -1829,37 +1881,7 @@ assemble_start_function (tree decl, const char *fnname)
if (DECL_PRESERVE_P (decl))
targetm.asm_out.mark_decl_preserved (fnname);
- unsigned short patch_area_size = crtl->patch_area_size;
- unsigned short patch_area_entry = crtl->patch_area_entry;
-
- tree patchable_function_entry_attr
- = lookup_attribute ("patchable_function_entry", DECL_ATTRIBUTES (decl));
- if (patchable_function_entry_attr)
- {
- tree pp_val = TREE_VALUE (patchable_function_entry_attr);
- tree patchable_function_entry_value1 = TREE_VALUE (pp_val);
-
- patch_area_size = tree_to_uhwi (patchable_function_entry_value1);
- patch_area_entry = 0;
- if (TREE_CHAIN (pp_val) != NULL_TREE)
- {
- tree patchable_function_entry_value2
- = TREE_VALUE (TREE_CHAIN (pp_val));
- patch_area_entry = tree_to_uhwi (patchable_function_entry_value2);
- }
- }
-
- if (patch_area_entry > patch_area_size)
- {
- if (patch_area_size > 0)
- warning (OPT_Wattributes, "patchable function entry > size");
- patch_area_entry = 0;
- }
-
- /* Emit the patching area before the entry label, if any. */
- if (patch_area_entry > 0)
- targetm.asm_out.print_patchable_function_entry (asm_out_file,
- patch_area_entry, true);
+ emit_patchable_function_entry (decl, true);
/* Do any machine/system dependent processing of the function name. */
#ifdef ASM_DECLARE_FUNCTION_NAME
@@ -1869,13 +1891,6 @@ assemble_start_function (tree decl, const char *fnname)
ASM_OUTPUT_FUNCTION_LABEL (asm_out_file, fnname, current_function_decl);
#endif /* ASM_DECLARE_FUNCTION_NAME */
- /* And the area after the label. Record it if we haven't done so yet. */
- if (patch_area_size > patch_area_entry)
- targetm.asm_out.print_patchable_function_entry (asm_out_file,
- patch_area_size
- - patch_area_entry,
- patch_area_entry == 0);
-
if (lookup_attribute ("no_split_stack", DECL_ATTRIBUTES (decl)))
saw_no_split_stack = true;
}
--
2.33.1