From aac8915c8cbdf284db9eb7818befd384247518cebd9b849000e2e69606df7c3e Mon Sep 17 00:00:00 2001
From: Richard Biener <rguenther@suse.com>
Date: Tue, 12 Sep 2023 17:52:19 +0000
Subject: [PATCH] - Add gcc7-aarch64-bsc1214052.patch to fix -fstack-protector
 issues   with variable length stack allocations on aarch64.   Fixes
 CVE-2023-4039.  [bsc#1214052] - Add gcc7-aarch64-untyped_call.patch to fix
 issue with __builtin_apply - Add gcc7-lra-elim.patch to fix internal compiler
 error when forming   paired loads and stores on aarch64.

OBS-URL: https://build.opensuse.org/package/show/devel:gcc/gcc7?expand=0&rev=240
---
 cross-aarch64-gcc7.spec            |   6 +
 cross-arm-gcc7.spec                |   6 +
 cross-arm-none-gcc7-bootstrap.spec |   6 +
 cross-arm-none-gcc7.spec           |   6 +
 cross-avr-gcc7-bootstrap.spec      |   6 +
 cross-avr-gcc7.spec                |   6 +
 cross-epiphany-gcc7-bootstrap.spec |   6 +
 cross-epiphany-gcc7.spec           |   6 +
 cross-hppa-gcc7.spec               |   6 +
 cross-i386-gcc7.spec               |   6 +
 cross-m68k-gcc7.spec               |   6 +
 cross-mips-gcc7.spec               |   6 +
 cross-nvptx-gcc7.spec              |   6 +
 cross-ppc64-gcc7.spec              |   6 +
 cross-ppc64le-gcc7.spec            |   6 +
 cross-rx-gcc7-bootstrap.spec       |   6 +
 cross-rx-gcc7.spec                 |   6 +
 cross-s390x-gcc7.spec              |   6 +
 cross-sparc-gcc7.spec              |   6 +
 cross-sparc64-gcc7.spec            |   6 +
 cross-x86_64-gcc7.spec             |   6 +
 gcc.spec.in                        |   8 +-
 gcc7-aarch64-bsc1214052.patch      | 993 +++++++++++++++++++++++++++++
 gcc7-aarch64-untyped_call.patch    |  63 ++
 gcc7-lra-elim.patch                |  47 ++
 gcc7-rpmlintrc                     |   3 +-
 gcc7-testresults.spec              |   6 +
 gcc7.changes                       |  10 +
 gcc7.spec                          |   6 +
 29 files changed, 1260 insertions(+), 2 deletions(-)
 create mode 100644 gcc7-aarch64-bsc1214052.patch
 create mode 100644 gcc7-aarch64-untyped_call.patch
 create mode 100644 gcc7-lra-elim.patch

diff --git a/cross-aarch64-gcc7.spec b/cross-aarch64-gcc7.spec
index 403cb35..7530ba9 100644
--- a/cross-aarch64-gcc7.spec
+++ b/cross-aarch64-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-arm-gcc7.spec b/cross-arm-gcc7.spec
index b0b5c9c..208e317 100644
--- a/cross-arm-gcc7.spec
+++ b/cross-arm-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-arm-none-gcc7-bootstrap.spec b/cross-arm-none-gcc7-bootstrap.spec
index 4f4e776..120f2f8 100644
--- a/cross-arm-none-gcc7-bootstrap.spec
+++ b/cross-arm-none-gcc7-bootstrap.spec
@@ -151,6 +151,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -346,6 +349,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-arm-none-gcc7.spec b/cross-arm-none-gcc7.spec
index 9f7f70d..427ed1f 100644
--- a/cross-arm-none-gcc7.spec
+++ b/cross-arm-none-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-avr-gcc7-bootstrap.spec b/cross-avr-gcc7-bootstrap.spec
index 11f6db5..457266f 100644
--- a/cross-avr-gcc7-bootstrap.spec
+++ b/cross-avr-gcc7-bootstrap.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-avr-gcc7.spec b/cross-avr-gcc7.spec
index 87dc6c8..9b3bff7 100644
--- a/cross-avr-gcc7.spec
+++ b/cross-avr-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-epiphany-gcc7-bootstrap.spec b/cross-epiphany-gcc7-bootstrap.spec
index b4b10cc..a02c012 100644
--- a/cross-epiphany-gcc7-bootstrap.spec
+++ b/cross-epiphany-gcc7-bootstrap.spec
@@ -151,6 +151,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -346,6 +349,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-epiphany-gcc7.spec b/cross-epiphany-gcc7.spec
index 9d9ca31..4919899 100644
--- a/cross-epiphany-gcc7.spec
+++ b/cross-epiphany-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-hppa-gcc7.spec b/cross-hppa-gcc7.spec
index 667a86b..565738c 100644
--- a/cross-hppa-gcc7.spec
+++ b/cross-hppa-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-i386-gcc7.spec b/cross-i386-gcc7.spec
index d9b5551..ac7cd90 100644
--- a/cross-i386-gcc7.spec
+++ b/cross-i386-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-m68k-gcc7.spec b/cross-m68k-gcc7.spec
index 3d08645..b80bf8f 100644
--- a/cross-m68k-gcc7.spec
+++ b/cross-m68k-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-mips-gcc7.spec b/cross-mips-gcc7.spec
index e1b575f..113e119 100644
--- a/cross-mips-gcc7.spec
+++ b/cross-mips-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-nvptx-gcc7.spec b/cross-nvptx-gcc7.spec
index dc991db..f08e974 100644
--- a/cross-nvptx-gcc7.spec
+++ b/cross-nvptx-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-ppc64-gcc7.spec b/cross-ppc64-gcc7.spec
index f190474..93e1a19 100644
--- a/cross-ppc64-gcc7.spec
+++ b/cross-ppc64-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-ppc64le-gcc7.spec b/cross-ppc64le-gcc7.spec
index 7b439f7..c599edb 100644
--- a/cross-ppc64le-gcc7.spec
+++ b/cross-ppc64le-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-rx-gcc7-bootstrap.spec b/cross-rx-gcc7-bootstrap.spec
index d97bcdc..f0ae77e 100644
--- a/cross-rx-gcc7-bootstrap.spec
+++ b/cross-rx-gcc7-bootstrap.spec
@@ -151,6 +151,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -346,6 +349,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-rx-gcc7.spec b/cross-rx-gcc7.spec
index 834a077..6e05846 100644
--- a/cross-rx-gcc7.spec
+++ b/cross-rx-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-s390x-gcc7.spec b/cross-s390x-gcc7.spec
index d76cea9..0044831 100644
--- a/cross-s390x-gcc7.spec
+++ b/cross-s390x-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-sparc-gcc7.spec b/cross-sparc-gcc7.spec
index 19f590f..aef8b9d 100644
--- a/cross-sparc-gcc7.spec
+++ b/cross-sparc-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-sparc64-gcc7.spec b/cross-sparc64-gcc7.spec
index 095e1fb..cbf0fde 100644
--- a/cross-sparc64-gcc7.spec
+++ b/cross-sparc64-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/cross-x86_64-gcc7.spec b/cross-x86_64-gcc7.spec
index a00e148..d282fec 100644
--- a/cross-x86_64-gcc7.spec
+++ b/cross-x86_64-gcc7.spec
@@ -150,6 +150,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -345,6 +348,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/gcc.spec.in b/gcc.spec.in
index c396587..5db5677 100644
--- a/gcc.spec.in
+++ b/gcc.spec.in
@@ -336,7 +336,10 @@ Patch38:  gcc7-libsanitizer-cherry-pick-9cf13067cb5088626ba7-from-u.patch
 Patch39:  gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:	gcc7-pr72764.patch
 Patch41:	gcc7-pr89124.patch
-Patch42 :       libgcc-riscv-div.patch
+Patch42:	libgcc-riscv-div.patch
+Patch43:	gcc7-aarch64-bsc1214052.patch
+Patch44:	gcc7-aarch64-untyped_call.patch
+Patch45:	gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:	gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -1142,6 +1145,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/gcc7-aarch64-bsc1214052.patch b/gcc7-aarch64-bsc1214052.patch
new file mode 100644
index 0000000..6dab583
--- /dev/null
+++ b/gcc7-aarch64-bsc1214052.patch
@@ -0,0 +1,993 @@
+From 04553281f42e5c4340d554a93d1a73006365d8fb Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Fri, 16 Jun 2023 17:00:51 +0100
+Subject: [PATCH 1/7] aarch64: Explicitly handle frames with no saved registers
+To: gcc-patches@gcc.gnu.org
+
+If a frame has no saved registers, it can be allocated in one go.
+There is no need to treat the areas below and above the saved
+registers as separate.
+
+This is a no-op as thing stand, since a leaf function will have
+no outgoing arguments, and so all the frame will be above where
+the saved registers normally go.
+
+gcc/
+	* config/aarch64/aarch64.c (aarch64_layout_frame): Explicitly
+	allocate the frame in one go if there are no saved registers.
+---
+ gcc/config/aarch64/aarch64.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
+index 4e94be3b0b4..bb4f6020e5d 100644
+--- a/gcc/config/aarch64/aarch64.c
++++ b/gcc/config/aarch64/aarch64.c
+@@ -2901,8 +2901,10 @@ aarch64_layout_frame (void)
+   else if (cfun->machine->frame.wb_candidate1 != INVALID_REGNUM)
+     max_push_offset = 256;
+ 
+-  if (cfun->machine->frame.frame_size < max_push_offset
+-      && crtl->outgoing_args_size == 0)
++  if (cfun->machine->frame.saved_regs_size == 0)
++    cfun->machine->frame.initial_adjust = cfun->machine->frame.frame_size;
++  else if (cfun->machine->frame.frame_size < max_push_offset
++	   && crtl->outgoing_args_size == 0)
+     {
+       /* Simple, small frame with no outgoing arguments:
+ 	 stp reg1, reg2, [sp, -frame_size]!
+-- 
+2.25.1
+
+
+From e97c93de7ceadad75774f897424a50ece3215129 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Fri, 16 Jun 2023 16:55:12 +0100
+Subject: [PATCH 2/7] aarch64: Add bytes_below_hard_fp to frame info
+To: gcc-patches@gcc.gnu.org
+
+The frame layout code currently hard-codes the assumption that
+the number of bytes below the saved registers is equal to the
+size of the outgoing arguments.  This patch abstracts that
+value into a new field of aarch64_frame.
+
+gcc/
+	* config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
+	field.
+	* config/aarch64/aarch64.c (aarch64_layout_frame): Initialize it,
+	and use it instead of crtl->outgoing_args_size.
+	(aarch64_get_separate_components): Use bytes_below_hard_fp instead
+	of outgoing_args_size.
+	(aarch64_process_components): Likewise.
+---
+ gcc/config/aarch64/aarch64.c | 40 +++++++++++++++++++++---------------
+ gcc/config/aarch64/aarch64.h |  6 +++++-
+ 2 files changed, 28 insertions(+), 18 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
+index bb4f6020e5d..12df8bb783c 100644
+--- a/gcc/config/aarch64/aarch64.c
++++ b/gcc/config/aarch64/aarch64.c
+@@ -2826,6 +2826,8 @@ aarch64_layout_frame (void)
+ 	last_fp_reg = regno;
+       }
+ 
++  cfun->machine->frame.bytes_below_hard_fp = crtl->outgoing_args_size;
++
+   if (frame_pointer_needed)
+     {
+       /* FP and LR are placed in the linkage record.  */
+@@ -2885,7 +2887,7 @@ aarch64_layout_frame (void)
+ 
+   cfun->machine->frame.frame_size
+     = ROUND_UP (cfun->machine->frame.hard_fp_offset
+-		+ crtl->outgoing_args_size,
++		+ cfun->machine->frame.bytes_below_hard_fp,
+ 		STACK_BOUNDARY / BITS_PER_UNIT);
+ 
+   cfun->machine->frame.locals_offset = cfun->machine->frame.saved_varargs_size;
+@@ -2904,32 +2906,33 @@ aarch64_layout_frame (void)
+   if (cfun->machine->frame.saved_regs_size == 0)
+     cfun->machine->frame.initial_adjust = cfun->machine->frame.frame_size;
+   else if (cfun->machine->frame.frame_size < max_push_offset
+-	   && crtl->outgoing_args_size == 0)
++	   && cfun->machine->frame.bytes_below_hard_fp == 0)
+     {
+-      /* Simple, small frame with no outgoing arguments:
++      /* Simple, small frame with no data below the saved registers.
+ 	 stp reg1, reg2, [sp, -frame_size]!
+ 	 stp reg3, reg4, [sp, 16]  */
+       cfun->machine->frame.callee_adjust = cfun->machine->frame.frame_size;
+     }
+-  else if ((crtl->outgoing_args_size
++  else if ((cfun->machine->frame.bytes_below_hard_fp
+ 	    + cfun->machine->frame.saved_regs_size < 512)
+ 	   && !(cfun->calls_alloca
+ 		&& cfun->machine->frame.hard_fp_offset < max_push_offset))
+     {
+-      /* Frame with small outgoing arguments:
++      /* Frame with small area below the saved registers:
+ 	 sub sp, sp, frame_size
+-	 stp reg1, reg2, [sp, outgoing_args_size]
+-	 stp reg3, reg4, [sp, outgoing_args_size + 16]  */
++	 stp reg1, reg2, [sp, bytes_below_hard_fp]
++	 stp reg3, reg4, [sp, bytes_below_hard_fp + 16]  */
+       cfun->machine->frame.initial_adjust = cfun->machine->frame.frame_size;
+       cfun->machine->frame.callee_offset
+ 	= cfun->machine->frame.frame_size - cfun->machine->frame.hard_fp_offset;
+     }
+   else if (cfun->machine->frame.hard_fp_offset < max_push_offset)
+     {
+-      /* Frame with large outgoing arguments but a small local area:
++      /* Frame with large area below the saved registers, but with a
++	 small area above:
+ 	 stp reg1, reg2, [sp, -hard_fp_offset]!
+ 	 stp reg3, reg4, [sp, 16]
+-	 sub sp, sp, outgoing_args_size  */
++	 sub sp, sp, bytes_below_hard_fp  */
+       cfun->machine->frame.callee_adjust = cfun->machine->frame.hard_fp_offset;
+       cfun->machine->frame.final_adjust
+ 	= cfun->machine->frame.frame_size - cfun->machine->frame.callee_adjust;
+@@ -2945,17 +2948,19 @@ aarch64_layout_frame (void)
+       cfun->machine->frame.callee_adjust = varargs_and_saved_regs_size;
+       cfun->machine->frame.final_adjust
+ 	= cfun->machine->frame.frame_size - cfun->machine->frame.callee_adjust;
++      cfun->machine->frame.bytes_below_hard_fp
++	= cfun->machine->frame.final_adjust;
+       cfun->machine->frame.hard_fp_offset = cfun->machine->frame.callee_adjust;
+       cfun->machine->frame.locals_offset = cfun->machine->frame.hard_fp_offset;
+     }
+   else
+     {
+-      /* Frame with large local area and outgoing arguments using frame pointer:
++      /* General case:
+ 	 sub sp, sp, hard_fp_offset
+ 	 stp x29, x30, [sp, 0]
+ 	 add x29, sp, 0
+ 	 stp reg3, reg4, [sp, 16]
+-	 sub sp, sp, outgoing_args_size  */
++	 sub sp, sp, bytes_below_hard_fp  */
+       cfun->machine->frame.initial_adjust = cfun->machine->frame.hard_fp_offset;
+       cfun->machine->frame.final_adjust
+ 	= cfun->machine->frame.frame_size - cfun->machine->frame.initial_adjust;
+@@ -3313,9 +3318,11 @@ aarch64_get_separate_components (void)
+     if (aarch64_register_saved_on_entry (regno))
+       {
+ 	HOST_WIDE_INT offset = cfun->machine->frame.reg_offset[regno];
++
++	/* Get the offset relative to the register we'll use.  */
+ 	if (!frame_pointer_needed)
+-	  offset += cfun->machine->frame.frame_size
+-		    - cfun->machine->frame.hard_fp_offset;
++	  offset += cfun->machine->frame.bytes_below_hard_fp;
++
+ 	/* Check that we can access the stack slot of the register with one
+ 	   direct load with no adjustments needed.  */
+ 	if (offset_12bit_unsigned_scaled_p (DImode, offset))
+@@ -3418,8 +3425,8 @@ aarch64_process_components (sbitmap components, bool prologue_p)
+       rtx reg = gen_rtx_REG (mode, regno);
+       HOST_WIDE_INT offset = cfun->machine->frame.reg_offset[regno];
+       if (!frame_pointer_needed)
+-	offset += cfun->machine->frame.frame_size
+-		  - cfun->machine->frame.hard_fp_offset;
++	offset += cfun->machine->frame.bytes_below_hard_fp;
++
+       rtx addr = plus_constant (Pmode, ptr_reg, offset);
+       rtx mem = gen_frame_mem (mode, addr);
+ 
+@@ -3460,8 +3467,7 @@ aarch64_process_components (sbitmap components, bool prologue_p)
+       /* REGNO2 can be saved/restored in a pair with REGNO.  */
+       rtx reg2 = gen_rtx_REG (mode, regno2);
+       if (!frame_pointer_needed)
+-	offset2 += cfun->machine->frame.frame_size
+-		  - cfun->machine->frame.hard_fp_offset;
++	offset2 += cfun->machine->frame.bytes_below_hard_fp;
+       rtx addr2 = plus_constant (Pmode, ptr_reg, offset2);
+       rtx mem2 = gen_frame_mem (mode, addr2);
+       rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
+diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
+index ddf833ebfe8..6dc6ef2b989 100644
+--- a/gcc/config/aarch64/aarch64.h
++++ b/gcc/config/aarch64/aarch64.h
+@@ -558,9 +558,13 @@ struct GTY (()) aarch64_frame
+   HOST_WIDE_INT saved_varargs_size;
+ 
+   /* The size of the saved callee-save int/FP registers.  */
+-
+   HOST_WIDE_INT saved_regs_size;
+ 
++  /* The number of bytes between the bottom of the static frame (the bottom
++     of the outgoing arguments) and the hard frame pointer.  This value is
++     always a multiple of STACK_BOUNDARY.  */
++  HOST_WIDE_INT bytes_below_hard_fp;
++
+   /* Offset from the base of the frame (incomming SP) to the
+      top of the locals area.  This value is always a multiple of
+      STACK_BOUNDARY.  */
+-- 
+2.25.1
+
+
+From e628f34ef3a7db3a75aa146b3e75099a9c431d20 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 27 Jun 2023 11:25:40 +0100
+Subject: [PATCH 3/7] aarch64: Rename locals_offset to bytes_above_locals
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+To: gcc-patches@gcc.gnu.org
+
+locals_offset was described as:
+
+  /* Offset from the base of the frame (incomming SP) to the
+     top of the locals area.  This value is always a multiple of
+     STACK_BOUNDARY.  */
+
+This is implicitly an “upside down” view of the frame: the incoming
+SP is at offset 0, and anything N bytes below the incoming SP is at
+offset N (rather than -N).
+
+However, reg_offset instead uses a “right way up” view; that is,
+it views offsets in address terms.  Something above X is at a
+positive offset from X and something below X is at a negative
+offset from X.
+
+Also, even on FRAME_GROWS_DOWNWARD targets like AArch64,
+target-independent code views offsets in address terms too:
+locals are allocated at negative offsets to virtual_stack_vars.
+
+It seems confusing to have *_offset fields of the same structure
+using different polarities like this.  This patch tries to avoid
+that by renaming locals_offset to bytes_above_locals.
+
+gcc/
+	* config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
+	(aarch64_frame::bytes_above_locals): ...this.
+	* config/aarch64/aarch64.c (aarch64_layout_frame)
+	(aarch64_initial_elimination_offset): Update accordingly.
+---
+ gcc/config/aarch64/aarch64.c | 12 +++++++-----
+ gcc/config/aarch64/aarch64.h |  6 +++---
+ 2 files changed, 10 insertions(+), 8 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
+index 12df8bb783c..27dd3b7a62b 100644
+--- a/gcc/config/aarch64/aarch64.c
++++ b/gcc/config/aarch64/aarch64.c
+@@ -2890,7 +2890,8 @@ aarch64_layout_frame (void)
+ 		+ cfun->machine->frame.bytes_below_hard_fp,
+ 		STACK_BOUNDARY / BITS_PER_UNIT);
+ 
+-  cfun->machine->frame.locals_offset = cfun->machine->frame.saved_varargs_size;
++  cfun->machine->frame.bytes_above_locals
++    = cfun->machine->frame.saved_varargs_size;
+ 
+   cfun->machine->frame.initial_adjust = 0;
+   cfun->machine->frame.final_adjust = 0;
+@@ -2951,7 +2952,8 @@ aarch64_layout_frame (void)
+       cfun->machine->frame.bytes_below_hard_fp
+ 	= cfun->machine->frame.final_adjust;
+       cfun->machine->frame.hard_fp_offset = cfun->machine->frame.callee_adjust;
+-      cfun->machine->frame.locals_offset = cfun->machine->frame.hard_fp_offset;
++      cfun->machine->frame.bytes_above_locals
++	= cfun->machine->frame.hard_fp_offset;
+     }
+   else
+     {
+@@ -5653,14 +5655,14 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to)
+ 
+       if (from == FRAME_POINTER_REGNUM)
+ 	return cfun->machine->frame.hard_fp_offset
+-	       - cfun->machine->frame.locals_offset;
++	       - cfun->machine->frame.bytes_above_locals;
+     }
+ 
+   if (to == STACK_POINTER_REGNUM)
+     {
+       if (from == FRAME_POINTER_REGNUM)
+-	  return cfun->machine->frame.frame_size
+-		 - cfun->machine->frame.locals_offset;
++	return cfun->machine->frame.frame_size
++	       - cfun->machine->frame.bytes_above_locals;
+     }
+ 
+   return cfun->machine->frame.frame_size;
+diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
+index 6dc6ef2b989..79af237ada6 100644
+--- a/gcc/config/aarch64/aarch64.h
++++ b/gcc/config/aarch64/aarch64.h
+@@ -565,10 +565,10 @@ struct GTY (()) aarch64_frame
+      always a multiple of STACK_BOUNDARY.  */
+   HOST_WIDE_INT bytes_below_hard_fp;
+ 
+-  /* Offset from the base of the frame (incomming SP) to the
+-     top of the locals area.  This value is always a multiple of
++  /* The number of bytes between the top of the locals area and the top
++     of the frame (the incomming SP).  This value is always a multiple of
+      STACK_BOUNDARY.  */
+-  HOST_WIDE_INT locals_offset;
++  HOST_WIDE_INT bytes_above_locals;
+ 
+   /* Offset from the base of the frame (incomming SP) to the
+      hard_frame_pointer.  This value is always a multiple of
+-- 
+2.25.1
+
+
+From da0132a4cd2eb26ecaff20578bf2753b20014223 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 27 Jun 2023 11:28:11 +0100
+Subject: [PATCH 4/7] aarch64: Rename hard_fp_offset to bytes_above_hard_fp
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+To: gcc-patches@gcc.gnu.org
+
+Similarly to the previous locals_offset patch, hard_fp_offset
+was described as:
+
+  /* Offset from the base of the frame (incomming SP) to the
+     hard_frame_pointer.  This value is always a multiple of
+     STACK_BOUNDARY.  */
+  poly_int64 hard_fp_offset;
+
+which again took an “upside-down” view: higher offsets meant lower
+addresses.  This patch renames the field to bytes_above_hard_fp instead.
+
+gcc/
+	* config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
+	to...
+	(aarch64_frame::bytes_above_hard_fp): ...this.
+	* config/aarch64/aarch64.c (aarch64_layout_frame)
+	(aarch64_expand_prologue): Update accordingly.
+	(aarch64_initial_elimination_offset): Likewise.
+---
+ gcc/config/aarch64/aarch64.c | 29 ++++++++++++++++-------------
+ gcc/config/aarch64/aarch64.h |  6 +++---
+ 2 files changed, 19 insertions(+), 16 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
+index 27dd3b7a62b..e3c36abb1e3 100644
+--- a/gcc/config/aarch64/aarch64.c
++++ b/gcc/config/aarch64/aarch64.c
+@@ -2881,12 +2881,12 @@ aarch64_layout_frame (void)
+   HOST_WIDE_INT varargs_and_saved_regs_size
+     = offset + cfun->machine->frame.saved_varargs_size;
+ 
+-  cfun->machine->frame.hard_fp_offset
++  cfun->machine->frame.bytes_above_hard_fp
+     = ROUND_UP (varargs_and_saved_regs_size + get_frame_size (),
+ 		STACK_BOUNDARY / BITS_PER_UNIT);
+ 
+   cfun->machine->frame.frame_size
+-    = ROUND_UP (cfun->machine->frame.hard_fp_offset
++    = ROUND_UP (cfun->machine->frame.bytes_above_hard_fp
+ 		+ cfun->machine->frame.bytes_below_hard_fp,
+ 		STACK_BOUNDARY / BITS_PER_UNIT);
+ 
+@@ -2917,7 +2917,7 @@ aarch64_layout_frame (void)
+   else if ((cfun->machine->frame.bytes_below_hard_fp
+ 	    + cfun->machine->frame.saved_regs_size < 512)
+ 	   && !(cfun->calls_alloca
+-		&& cfun->machine->frame.hard_fp_offset < max_push_offset))
++		&& cfun->machine->frame.bytes_above_hard_fp < max_push_offset))
+     {
+       /* Frame with small area below the saved registers:
+ 	 sub sp, sp, frame_size
+@@ -2925,16 +2925,17 @@ aarch64_layout_frame (void)
+ 	 stp reg3, reg4, [sp, bytes_below_hard_fp + 16]  */
+       cfun->machine->frame.initial_adjust = cfun->machine->frame.frame_size;
+       cfun->machine->frame.callee_offset
+-	= cfun->machine->frame.frame_size - cfun->machine->frame.hard_fp_offset;
++	= cfun->machine->frame.frame_size - cfun->machine->frame.bytes_above_hard_fp;
+     }
+-  else if (cfun->machine->frame.hard_fp_offset < max_push_offset)
++  else if (cfun->machine->frame.bytes_above_hard_fp < max_push_offset)
+     {
+       /* Frame with large area below the saved registers, but with a
+ 	 small area above:
+-	 stp reg1, reg2, [sp, -hard_fp_offset]!
++	 stp reg1, reg2, [sp, -bytes_above_hard_fp]!
+ 	 stp reg3, reg4, [sp, 16]
+ 	 sub sp, sp, bytes_below_hard_fp  */
+-      cfun->machine->frame.callee_adjust = cfun->machine->frame.hard_fp_offset;
++      cfun->machine->frame.callee_adjust
++	= cfun->machine->frame.bytes_above_hard_fp;
+       cfun->machine->frame.final_adjust
+ 	= cfun->machine->frame.frame_size - cfun->machine->frame.callee_adjust;
+     }
+@@ -2951,19 +2952,21 @@ aarch64_layout_frame (void)
+ 	= cfun->machine->frame.frame_size - cfun->machine->frame.callee_adjust;
+       cfun->machine->frame.bytes_below_hard_fp
+ 	= cfun->machine->frame.final_adjust;
+-      cfun->machine->frame.hard_fp_offset = cfun->machine->frame.callee_adjust;
++      cfun->machine->frame.bytes_above_hard_fp
++	= cfun->machine->frame.callee_adjust;
+       cfun->machine->frame.bytes_above_locals
+-	= cfun->machine->frame.hard_fp_offset;
++	= cfun->machine->frame.bytes_above_hard_fp;
+     }
+   else
+     {
+       /* General case:
+-	 sub sp, sp, hard_fp_offset
++	 sub sp, sp, bytes_above_hard_fp
+ 	 stp x29, x30, [sp, 0]
+ 	 add x29, sp, 0
+ 	 stp reg3, reg4, [sp, 16]
+ 	 sub sp, sp, bytes_below_hard_fp  */
+-      cfun->machine->frame.initial_adjust = cfun->machine->frame.hard_fp_offset;
++      cfun->machine->frame.initial_adjust
++	= cfun->machine->frame.bytes_above_hard_fp;
+       cfun->machine->frame.final_adjust
+ 	= cfun->machine->frame.frame_size - cfun->machine->frame.initial_adjust;
+     }
+@@ -5651,10 +5654,10 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to)
+   if (to == HARD_FRAME_POINTER_REGNUM)
+     {
+       if (from == ARG_POINTER_REGNUM)
+-	return cfun->machine->frame.hard_fp_offset;
++	return cfun->machine->frame.bytes_above_hard_fp;
+ 
+       if (from == FRAME_POINTER_REGNUM)
+-	return cfun->machine->frame.hard_fp_offset
++	return cfun->machine->frame.bytes_above_hard_fp
+ 	       - cfun->machine->frame.bytes_above_locals;
+     }
+ 
+diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
+index 79af237ada6..35ba9681e03 100644
+--- a/gcc/config/aarch64/aarch64.h
++++ b/gcc/config/aarch64/aarch64.h
+@@ -570,10 +570,10 @@ struct GTY (()) aarch64_frame
+      STACK_BOUNDARY.  */
+   HOST_WIDE_INT bytes_above_locals;
+ 
+-  /* Offset from the base of the frame (incomming SP) to the
+-     hard_frame_pointer.  This value is always a multiple of
++  /* The number of bytes between the hard_frame_pointer and the top of
++     the frame (the incomming SP).  This value is always a multiple of
+      STACK_BOUNDARY.  */
+-  HOST_WIDE_INT hard_fp_offset;
++  HOST_WIDE_INT bytes_above_hard_fp;
+ 
+   /* The size of the frame.  This value is the offset from base of the
+    * frame (incomming SP) to the stack_pointer.  This value is always
+-- 
+2.25.1
+
+
+From 19776fcf06856ceff521f99a1ceddaf113cf0d09 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 22 Jun 2023 22:26:30 +0100
+Subject: [PATCH 5/7] aarch64: Tweak frame_size comment
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+To: gcc-patches@gcc.gnu.org
+
+This patch fixes another case in which a value was described with
+an “upside-down” view.
+
+gcc/
+	* config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
+---
+ gcc/config/aarch64/aarch64.h | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
+index 35ba9681e03..19b7082187a 100644
+--- a/gcc/config/aarch64/aarch64.h
++++ b/gcc/config/aarch64/aarch64.h
+@@ -575,9 +575,9 @@ struct GTY (()) aarch64_frame
+      STACK_BOUNDARY.  */
+   HOST_WIDE_INT bytes_above_hard_fp;
+ 
+-  /* The size of the frame.  This value is the offset from base of the
+-   * frame (incomming SP) to the stack_pointer.  This value is always
+-   * a multiple of STACK_BOUNDARY.  */
++  /* The size of the frame, i.e. the number of bytes between the bottom
++     of the outgoing arguments and the incoming SP.  This value is always
++     a multiple of STACK_BOUNDARY.  */
+   HOST_WIDE_INT frame_size;
+ 
+   /* The size of the initial stack adjustment before saving callee-saves.  */
+-- 
+2.25.1
+
+
+From 69c18301a2dea6dd686d4351ba3c095490707d16 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 15 Aug 2023 19:05:30 +0100
+Subject: [PATCH 6/7] Backport check-function-bodies support
+To: gcc-patches@gcc.gnu.org
+
+---
+ gcc/testsuite/lib/scanasm.exp | 191 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 191 insertions(+)
+
+diff --git a/gcc/testsuite/lib/scanasm.exp b/gcc/testsuite/lib/scanasm.exp
+index bab23e8e165..1103f86c602 100644
+--- a/gcc/testsuite/lib/scanasm.exp
++++ b/gcc/testsuite/lib/scanasm.exp
+@@ -514,3 +514,194 @@ proc scan-lto-assembler { args } {
+     verbose "output_file: $output_file"
+     dg-scan "scan-assembler" 1 $testcase $output_file $args
+ }
++
++# Read assembly file FILENAME and store a mapping from function names
++# to function bodies in array RESULT.  FILENAME has already been uploaded
++# locally where necessary and is known to exist.
++
++proc parse_function_bodies { filename result } {
++    upvar $result up_result
++
++    # Regexp for the start of a function definition (name in \1).
++    set label {^([a-zA-Z_]\S+):$}
++
++    # Regexp for the end of a function definition.
++    set terminator {^\s*\.size}
++
++    # Regexp for lines that aren't interesting.
++    set fluff {^\s*(?:\.|//|@|$)}
++
++    set fd [open $filename r]
++    set in_function 0
++    while { [gets $fd line] >= 0 } {
++	if { [regexp $label $line dummy function_name] } {
++	    set in_function 1
++	    set function_body ""
++	} elseif { $in_function } {
++	    if { [regexp $terminator $line] } {
++		set up_result($function_name) $function_body
++		set in_function 0
++	    } elseif { ![regexp $fluff $line] } {
++		append function_body $line "\n"
++	    }
++	}
++    }
++    close $fd
++}
++
++# FUNCTIONS is an array that maps function names to function bodies.
++# Return true if it contains a definition of function NAME and if
++# that definition matches BODY_REGEXP.
++
++proc check_function_body { functions name body_regexp } {
++    upvar $functions up_functions
++
++    if { ![info exists up_functions($name)] } {
++	return 0
++    }
++    set fn_res [regexp "^$body_regexp\$" $up_functions($name)]
++    if { !$fn_res } {
++      verbose -log "body: $body_regexp"
++      verbose -log "against: $up_functions($name)"
++    }
++    return $fn_res
++}
++
++# Check the implementations of functions against expected output.  Used as:
++#
++# { dg-do { check-function-bodies PREFIX TERMINATOR[ OPTION[ SELECTOR]] } }
++#
++# See sourcebuild.texi for details.
++
++proc check-function-bodies { args } {
++    if { [llength $args] < 2 } {
++	error "too few arguments to check-function-bodies"
++    }
++    if { [llength $args] > 4 } {
++	error "too many arguments to check-function-bodies"
++    }
++
++    if { [llength $args] >= 3 } {
++	set required_flags [lindex $args 2]
++
++	upvar 2 dg-extra-tool-flags extra_tool_flags
++	set flags $extra_tool_flags
++
++	global torture_current_flags
++	if { [info exists torture_current_flags] } {
++	    append flags " " $torture_current_flags
++	}
++	foreach required_flag $required_flags {
++	    switch -- $required_flag {
++		target -
++		xfail {
++		    error "misplaced $required_flag in check-function-bodies"
++		}
++	    }
++	}
++	foreach required_flag $required_flags {
++	    if { ![regexp " $required_flag " $flags] } {
++		return
++	    }
++	}
++    }
++
++    set xfail_all 0
++    if { [llength $args] >= 4 } {
++	switch [dg-process-target [lindex $args 3]] {
++	    "S" { }
++	    "N" { return }
++	    "F" { set xfail_all 1 }
++	    "P" { }
++	}
++    }
++
++    set testcase [testname-for-summary]
++    # The name might include a list of options; extract the file name.
++    set filename [lindex $testcase 0]
++
++    global srcdir
++    set input_filename "$srcdir/$filename"
++    set output_filename "[file rootname [file tail $filename]].s"
++
++    set prefix [lindex $args 0]
++    set prefix_len [string length $prefix]
++    set terminator [lindex $args 1]
++    if { [string equal $terminator ""] } {
++	set terminator "*/"
++    }
++    set terminator_len [string length $terminator]
++
++    set have_bodies 0
++    if { [is_remote host] } {
++	remote_upload host "$filename"
++    }
++    if { [file exists $output_filename] } {
++	parse_function_bodies $output_filename functions
++	set have_bodies 1
++    } else {
++	verbose -log "$testcase: output file does not exist"
++    }
++
++    set count 0
++    set function_regexp ""
++    set label {^(\S+):$}
++
++    set lineno 1
++    set fd [open $input_filename r]
++    set in_function 0
++    while { [gets $fd line] >= 0 } {
++	if { [string equal -length $prefix_len $line $prefix] } {
++	    set line [string trim [string range $line $prefix_len end]]
++	    if { !$in_function } {
++		if { [regexp "^(.*?\\S)\\s+{(.*)}\$" $line dummy \
++			  line selector] } {
++		    set selector [dg-process-target $selector]
++		} else {
++		    set selector "P"
++		}
++		if { ![regexp $label $line dummy function_name] } {
++		    close $fd
++		    error "check-function-bodies: line $lineno does not have a function label"
++		}
++		set in_function 1
++		set function_regexp ""
++	    } elseif { [string equal $line "("] } {
++		append function_regexp "(?:"
++	    } elseif { [string equal $line "|"] } {
++		append function_regexp "|"
++	    } elseif { [string equal $line ")"] } {
++		append function_regexp ")"
++	    } elseif { [string equal $line "..."] } {
++		append function_regexp ".*"
++	    } else {
++		append function_regexp "\t" $line "\n"
++	    }
++	} elseif { [string equal -length $terminator_len $line $terminator] } {
++	    if { ![string equal $selector "N"] } {
++		if { $xfail_all || [string equal $selector "F"] } {
++		    setup_xfail "*-*-*"
++		}
++		set testname "$testcase check-function-bodies $function_name"
++		if { !$have_bodies } {
++		    unresolved $testname
++		} elseif { [check_function_body functions $function_name \
++				$function_regexp] } {
++		    pass $testname
++		} else {
++		    fail $testname
++		}
++	    }
++	    set in_function 0
++	    incr count
++	}
++	incr lineno
++    }
++    close $fd
++    if { $in_function } {
++	error "check-function-bodies: missing \"$terminator\""
++    }
++    if { $count == 0 } {
++	error "check-function-bodies: no matches found"
++    }
++}
+-- 
+2.25.1
+
+
+From c2c772172f0478315ab94386ebf9963efd36eb75 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 15 Jun 2023 19:16:52 +0100
+Subject: [PATCH 7/7] aarch64: Make stack smash canary protect saved registers
+To: gcc-patches@gcc.gnu.org
+
+AArch64 normally puts the saved registers near the bottom of the frame,
+immediately above any dynamic allocations.  But this means that a
+stack-smash attack on those dynamic allocations could overwrite the
+saved registers without needing to reach as far as the stack smash
+canary.
+
+The same thing could also happen for variable-sized arguments that are
+passed by value, since those are allocated before a call and popped on
+return.
+
+This patch avoids that by putting the locals (and thus the canary) below
+the saved registers when stack smash protection is active.
+
+The patch fixes CVE-2023-4039.
+
+gcc/
+	* config/aarch64/aarch64.c (aarch64_save_regs_above_locals_p):
+	New function.
+	(aarch64_layout_frame): Use it to decide whether locals should
+	go above or below the saved registers.
+	(aarch64_expand_prologue): Update stack layout comment.
+	Emit a stack tie after the final adjustment.
+
+gcc/testsuite/
+	* gcc.target/aarch64/stack-protector-8.c: New test.
+	* gcc.target/aarch64/stack-protector-9.c: Likewise.
+---
+ gcc/config/aarch64/aarch64.c                  | 45 +++++++++-
+ .../gcc.target/aarch64/stack-protector-8.c    | 86 +++++++++++++++++++
+ .../gcc.target/aarch64/stack-protector-9.c    | 33 +++++++
+ 3 files changed, 161 insertions(+), 3 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-8.c
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-9.c
+
+diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
+index e3c36abb1e3..8708b4fe4ea 100644
+--- a/gcc/config/aarch64/aarch64.c
++++ b/gcc/config/aarch64/aarch64.c
+@@ -2780,6 +2780,20 @@ aarch64_frame_pointer_required (void)
+   return false;
+ }
+ 
++/* Return true if the current function should save registers above
++   the locals area, rather than below it.  */
++
++static bool
++aarch64_save_regs_above_locals_p ()
++{
++  /* When using stack smash protection, make sure that the canary slot
++     comes between the locals and the saved registers.  Otherwise,
++     it would be possible for a carefully sized smash attack to change
++     the saved registers (particularly LR and FP) without reaching the
++     canary.  */
++  return crtl->stack_protect_guard;
++}
++
+ /* Mark the registers that need to be saved by the callee and calculate
+    the size of the callee-saved registers area and frame record (both FP
+    and LR may be omitted).  */
+@@ -2828,6 +2842,16 @@ aarch64_layout_frame (void)
+ 
+   cfun->machine->frame.bytes_below_hard_fp = crtl->outgoing_args_size;
+ 
++  bool regs_at_top_p = aarch64_save_regs_above_locals_p ();
++
++  if (regs_at_top_p)
++    {
++      cfun->machine->frame.bytes_below_hard_fp += get_frame_size ();
++      cfun->machine->frame.bytes_below_hard_fp
++	= ROUND_UP (cfun->machine->frame.bytes_below_hard_fp,
++		    STACK_BOUNDARY / BITS_PER_UNIT);
++    }
++
+   if (frame_pointer_needed)
+     {
+       /* FP and LR are placed in the linkage record.  */
+@@ -2881,8 +2905,11 @@ aarch64_layout_frame (void)
+   HOST_WIDE_INT varargs_and_saved_regs_size
+     = offset + cfun->machine->frame.saved_varargs_size;
+ 
++  cfun->machine->frame.bytes_above_hard_fp = varargs_and_saved_regs_size;
++  if (!regs_at_top_p)
++    cfun->machine->frame.bytes_above_hard_fp += get_frame_size ();
+   cfun->machine->frame.bytes_above_hard_fp
+-    = ROUND_UP (varargs_and_saved_regs_size + get_frame_size (),
++    = ROUND_UP (cfun->machine->frame.bytes_above_hard_fp,
+ 		STACK_BOUNDARY / BITS_PER_UNIT);
+ 
+   cfun->machine->frame.frame_size
+@@ -2892,6 +2919,9 @@ aarch64_layout_frame (void)
+ 
+   cfun->machine->frame.bytes_above_locals
+     = cfun->machine->frame.saved_varargs_size;
++  if (regs_at_top_p)
++    cfun->machine->frame.bytes_above_locals
++      += cfun->machine->frame.saved_regs_size;
+ 
+   cfun->machine->frame.initial_adjust = 0;
+   cfun->machine->frame.final_adjust = 0;
+@@ -3537,10 +3567,10 @@ aarch64_set_handled_components (sbitmap components)
+ 	|  for register varargs         |
+ 	|                               |
+ 	+-------------------------------+
+-	|  local variables              | <-- frame_pointer_rtx
++	|  local variables (1)          | <-- frame_pointer_rtx
+ 	|                               |
+ 	+-------------------------------+
+-	|  padding0                     | \
++	|  padding (1)                  | \
+ 	+-------------------------------+  |
+ 	|  callee-saved registers       |  | frame.saved_regs_size
+ 	+-------------------------------+  |
+@@ -3548,6 +3578,10 @@ aarch64_set_handled_components (sbitmap components)
+ 	+-------------------------------+  |
+ 	|  FP'                          | / <- hard_frame_pointer_rtx (aligned)
+         +-------------------------------+
++	|  local variables (2)          |
++	+-------------------------------+
++	|  padding (2)                  |
++	+-------------------------------+
+ 	|  dynamic allocation           |
+ 	+-------------------------------+
+ 	|  padding                      |
+@@ -3557,6 +3591,9 @@ aarch64_set_handled_components (sbitmap components)
+ 	+-------------------------------+
+ 	|                               | <-- stack_pointer_rtx (aligned)
+ 
++   The regions marked (1) and (2) are mutually exclusive.  (2) is used
++   when aarch64_save_regs_above_locals_p is true.
++
+    Dynamic stack allocations via alloca() decrease stack_pointer_rtx
+    but leave frame_pointer_rtx and hard_frame_pointer_rtx
+    unchanged.  */
+@@ -3626,6 +3663,8 @@ aarch64_expand_prologue (void)
+   aarch64_save_callee_saves (DFmode, callee_offset, V0_REGNUM, V31_REGNUM,
+ 			     callee_adjust != 0 || frame_pointer_needed);
+   aarch64_sub_sp (IP1_REGNUM, final_adjust, !frame_pointer_needed);
++  if (frame_pointer_needed && final_adjust != 0)
++    emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx));
+ }
+ 
+ /* Return TRUE if we can use a simple_return insn.
+diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c
+new file mode 100644
+index 00000000000..2575abbec73
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c
+@@ -0,0 +1,86 @@
++/* { dg-options " -O -fstack-protector-strong" } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++void g(void *);
++
++/*
++** test1:
++**	sub	sp, sp, #304
++**	stp	x29, x30, \[sp, #?272\]
++**	add	x29, sp, #?272
++**	str	(x[0-9]+), \[sp, #?288\]
++**	...
++**	ldr	(x[0-9]+), \[\1\]
++**	str	\2, \[(?:sp, #?264|x29, #?-8)\]
++**	mov	\2, *0
++** (
++**	add	x0, sp, #?8
++** |
++**	sub	x0, x29, #?264
++** )
++**	bl	g
++**	...
++**	ldr	x[0-9]+, \[\1\]
++**	...
++** (
++**	bne	.*
++** |
++**	cbnz	.*
++** )
++**	...
++**	ldr	\1, \[sp, #?288\]
++**	ldp	x29, x30, \[sp, #?272\]
++**	add	sp, sp, #?304
++**	ret
++**	bl	__stack_chk_fail
++*/
++int test1() {
++  int y[0x40];
++  g(y);
++  return 1;
++}
++
++/*
++** test2:
++**	stp	x29, x30, \[sp, #?-32\]!
++** (
++**	mov	x29, sp
++** |
++**	add	x29, sp, #?0
++** )
++**	str	(x[0-9]+), \[sp, #?16\]
++**	sub	sp, sp, #1040
++**	...
++**	ldr	(x[0-9]+), \[\1\]
++**	str	\2, \[(?:sp, #?1032|x29, #?-8)\]
++**	mov	\2, *0
++** (
++**	add	x0, sp, #?8
++** |
++**	sub	x0, x29, #?1032
++** )
++**	bl	g
++**	...
++**	ldr	x[0-9]+, \[\1\]
++**	...
++** (
++**	bne	.*
++** |
++**	cbnz	.*
++** )
++**	...
++** (
++**	add	sp, sp, #?1040
++** |
++**	add	sp, x29, #?0
++** )
++**	ldr	\1, \[sp, #?16\]
++**	ldp	x29, x30, \[sp\], #?32
++**	ret
++**	bl	__stack_chk_fail
++*/
++int test2() {
++  int y[0x100];
++  g(y);
++  return 1;
++}
+diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c
+new file mode 100644
+index 00000000000..1d267343806
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c
+@@ -0,0 +1,33 @@
++/* { dg-options "-O2 -mcpu=cortex-a73 -fstack-protector-all" } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** main:
++**	...
++**	stp	x29, x30, \[sp, #?-[0-9]+\]!
++**	...
++**	sub	sp, sp, #[0-9]+
++**	...
++**	str	x[0-9]+, \[x29, #?-8\]
++**	...
++*/
++int f(const char *);
++void g(void *);
++int main(int argc, char* argv[])
++{
++  int a;
++  int b;
++  char c[2+f(argv[1])];
++  int d[0x100];
++  char y;
++
++  y=42; a=4; b=10;
++  c[0] = 'h'; c[1] = '\0';
++
++  c[f(argv[2])] = '\0';
++
++  __builtin_printf("%d %d\n%s\n", a, b, c);
++  g(d);
++
++  return 0;
++}
+-- 
+2.25.1
+
diff --git a/gcc7-aarch64-untyped_call.patch b/gcc7-aarch64-untyped_call.patch
new file mode 100644
index 0000000..482a00c
--- /dev/null
+++ b/gcc7-aarch64-untyped_call.patch
@@ -0,0 +1,63 @@
+From 6787268a289bdbc32920b13b4697eaf756f9f7e0 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 31 Aug 2023 16:15:10 +0100
+Subject: [PATCH] aarch64: Fix return register handling in untyped_call
+To: gcc-patches@gcc.gnu.org
+
+While working on another patch, I hit a problem with the aarch64
+expansion of untyped_call.  The expander emits the usual:
+
+  (set (mem ...) (reg resN))
+
+instructions to store the result registers to memory, but it didn't
+say in RTL where those resN results came from.  This eventually led
+to a failure of gcc.dg/torture/stackalign/builtin-return-2.c,
+via regrename.
+
+This patch turns the untyped call from a plain call to a call_value,
+to represent that the call returns (or might return) a useful value.
+The patch also uses a PARALLEL return rtx to represent all the possible
+return registers.
+
+gcc/
+	* config/aarch64/aarch64.md (untyped_call): Emit a call_value
+	rather than a call.  List each possible destination register
+	in the call pattern.
+---
+ gcc/config/aarch64/aarch64.md | 20 +++++++++++++++++++-
+ 1 file changed, 19 insertions(+), 1 deletion(-)
+
+diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
+index 90f9ee658c5..97d27677985 100644
+--- a/gcc/config/aarch64/aarch64.md
++++ b/gcc/config/aarch64/aarch64.md
+@@ -934,7 +934,25 @@
+ {
+   int i;
+ 
+-  emit_call_insn (gen_call (operands[0], const0_rtx, NULL));
++  /* Generate a PARALLEL that contains all of the register results.
++     The offsets are somewhat arbitrary, since we don't know the
++     actual return type.  The main thing we need to avoid is having
++     overlapping byte ranges, since those might give the impression
++     that two registers are known to have data in common.  */
++  rtvec rets = rtvec_alloc (XVECLEN (operands[2], 0));
++  unsigned HOST_WIDE_INT offset = 0;
++  for (i = 0; i < XVECLEN (operands[2], 0); i++)
++    {
++      rtx reg = SET_SRC (XVECEXP (operands[2], 0, i));
++      gcc_assert (REG_P (reg));
++      rtx offset_rtx = gen_int_mode (offset, Pmode);
++      rtx piece = gen_rtx_EXPR_LIST (VOIDmode, reg, offset_rtx);
++      RTVEC_ELT (rets, i) = piece;
++      offset += GET_MODE_SIZE (GET_MODE (reg));
++    }
++  rtx ret = gen_rtx_PARALLEL (VOIDmode, rets);
++
++  emit_call_insn (gen_call_value (ret, operands[0], const0_rtx, NULL));
+ 
+   for (i = 0; i < XVECLEN (operands[2], 0); i++)
+     {
+-- 
+2.35.3
+
diff --git a/gcc7-lra-elim.patch b/gcc7-lra-elim.patch
new file mode 100644
index 0000000..b9ecfd4
--- /dev/null
+++ b/gcc7-lra-elim.patch
@@ -0,0 +1,47 @@
+From 9cd11fd48509234e18122036bf504981f5a91b9a Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 31 Aug 2023 11:59:56 +0100
+Subject: [PATCH] lra: Avoid unfolded plus-0
+To: gcc-patches@gcc.gnu.org
+
+While backporting another patch to an earlier release, I hit a
+situation in which lra_eliminate_regs_1 would eliminate an address to:
+
+    (plus (reg:P R) (const_int 0))
+
+This address compared not-equal to plain:
+
+    (reg:P R)
+
+which caused an ICE in a later peephole2.  (The ICE showed up in
+gfortran.fortran-torture/compile/pr80464.f90 on the branch but seems
+to be latent on trunk.)
+
+These unfolded PLUSes shouldn't occur in the insn stream, and later code
+in the same function tried to avoid them.
+
+gcc/
+	* lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
+	rather than gen_rtx_PLUS.
+---
+ gcc/lra-eliminations.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
+index 993da861cf9..a3daf443caf 100644
+--- a/gcc/lra-eliminations.c
++++ b/gcc/lra-eliminations.c
+@@ -391,8 +391,8 @@ lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
+ 	      rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
+ 
+ 	      if (! update_p && ! full_p)
+-		return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
+-	      
++		return simplify_gen_binary (PLUS, Pmode, to, XEXP (x, 1));
++
+ 	      if (update_sp_offset != 0)
+ 		offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
+ 	      else
+-- 
+2.35.3
+
diff --git a/gcc7-rpmlintrc b/gcc7-rpmlintrc
index 585ffb3..f40af91 100644
--- a/gcc7-rpmlintrc
+++ b/gcc7-rpmlintrc
@@ -15,4 +15,5 @@ addFilter ("shlib-legacy-policy-name-error")
 # Packages provide libgcc_s1 = $version and conflict with other providers
 # of libgcc_s1
 addFilter ("conflicts-with-provides")
-
+# SLE12 rpmlint complains about valid SPDX licenses
+addFilter ("invalid-license")
diff --git a/gcc7-testresults.spec b/gcc7-testresults.spec
index 63ed00c..d16e58b 100644
--- a/gcc7-testresults.spec
+++ b/gcc7-testresults.spec
@@ -351,6 +351,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -531,6 +534,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61
diff --git a/gcc7.changes b/gcc7.changes
index 8e58969..80a34b1 100644
--- a/gcc7.changes
+++ b/gcc7.changes
@@ -1,3 +1,13 @@
+-------------------------------------------------------------------
+Thu Aug 17 06:37:28 UTC 2023 - Richard Biener <rguenther@suse.com>
+
+- Add gcc7-aarch64-bsc1214052.patch to fix -fstack-protector issues
+  with variable length stack allocations on aarch64.
+  Fixes CVE-2023-4039.  [bsc#1214052]
+- Add gcc7-aarch64-untyped_call.patch to fix issue with __builtin_apply
+- Add gcc7-lra-elim.patch to fix internal compiler error when forming
+  paired loads and stores on aarch64.
+
 -------------------------------------------------------------------
 Tue May 23 13:29:37 UTC 2023 - Andreas Schwab <schwab@suse.de>
 
diff --git a/gcc7.spec b/gcc7.spec
index 740126f..d94837a 100644
--- a/gcc7.spec
+++ b/gcc7.spec
@@ -330,6 +330,9 @@ Patch39:        gcc7-libgo-don-t-include-linux-fs.h-when-building-gen-sys.patch
 Patch40:        gcc7-pr72764.patch
 Patch41:        gcc7-pr89124.patch
 Patch42:        libgcc-riscv-div.patch
+Patch43:        gcc7-aarch64-bsc1214052.patch
+Patch44:        gcc7-aarch64-untyped_call.patch
+Patch45:        gcc7-lra-elim.patch
 # A set of patches from the RH srpm
 Patch51:        gcc41-ppc32-retaddr.patch
 # Some patches taken from Debian
@@ -1868,6 +1871,9 @@ ln -s nvptx-newlib/newlib .
 %patch40 -p1
 %patch41 -p1
 %patch42 -p1
+%patch43 -p1
+%patch44 -p1
+%patch45 -p1
 %patch51
 %patch60
 %patch61