diff --git a/cross-aarch64-gcc7.changes b/cross-aarch64-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-aarch64-gcc7.changes
+++ b/cross-aarch64-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-aarch64-gcc7.spec b/cross-aarch64-gcc7.spec
index f9b0ea3..108f68d 100644
--- a/cross-aarch64-gcc7.spec
+++ b/cross-aarch64-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-arm-gcc7.changes b/cross-arm-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-arm-gcc7.changes
+++ b/cross-arm-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-arm-gcc7.spec b/cross-arm-gcc7.spec
index e97ddbf..b7d810e 100644
--- a/cross-arm-gcc7.spec
+++ b/cross-arm-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-arm-none-gcc7-bootstrap.changes b/cross-arm-none-gcc7-bootstrap.changes
index 311deea..6b514e6 100644
--- a/cross-arm-none-gcc7-bootstrap.changes
+++ b/cross-arm-none-gcc7-bootstrap.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-arm-none-gcc7-bootstrap.spec b/cross-arm-none-gcc7-bootstrap.spec
index d830149..b118954 100644
--- a/cross-arm-none-gcc7-bootstrap.spec
+++ b/cross-arm-none-gcc7-bootstrap.spec
@@ -485,6 +485,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-arm-none-gcc7.changes b/cross-arm-none-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-arm-none-gcc7.changes
+++ b/cross-arm-none-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-arm-none-gcc7.spec b/cross-arm-none-gcc7.spec
index d9d3e5a..b125011 100644
--- a/cross-arm-none-gcc7.spec
+++ b/cross-arm-none-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-avr-gcc7-bootstrap.changes b/cross-avr-gcc7-bootstrap.changes
index 311deea..6b514e6 100644
--- a/cross-avr-gcc7-bootstrap.changes
+++ b/cross-avr-gcc7-bootstrap.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-avr-gcc7-bootstrap.spec b/cross-avr-gcc7-bootstrap.spec
index b7cfc01..700efd2 100644
--- a/cross-avr-gcc7-bootstrap.spec
+++ b/cross-avr-gcc7-bootstrap.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-avr-gcc7.changes b/cross-avr-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-avr-gcc7.changes
+++ b/cross-avr-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-avr-gcc7.spec b/cross-avr-gcc7.spec
index 26c4c58..97dabb5 100644
--- a/cross-avr-gcc7.spec
+++ b/cross-avr-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-epiphany-gcc7-bootstrap.changes b/cross-epiphany-gcc7-bootstrap.changes
index 311deea..6b514e6 100644
--- a/cross-epiphany-gcc7-bootstrap.changes
+++ b/cross-epiphany-gcc7-bootstrap.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-epiphany-gcc7-bootstrap.spec b/cross-epiphany-gcc7-bootstrap.spec
index 3441903..e44b287 100644
--- a/cross-epiphany-gcc7-bootstrap.spec
+++ b/cross-epiphany-gcc7-bootstrap.spec
@@ -485,6 +485,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-epiphany-gcc7.changes b/cross-epiphany-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-epiphany-gcc7.changes
+++ b/cross-epiphany-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-epiphany-gcc7.spec b/cross-epiphany-gcc7.spec
index 1216bb6..d4b1734 100644
--- a/cross-epiphany-gcc7.spec
+++ b/cross-epiphany-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-hppa-gcc7.changes b/cross-hppa-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-hppa-gcc7.changes
+++ b/cross-hppa-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-hppa-gcc7.spec b/cross-hppa-gcc7.spec
index 4b22333..3ac441c 100644
--- a/cross-hppa-gcc7.spec
+++ b/cross-hppa-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-i386-gcc7.changes b/cross-i386-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-i386-gcc7.changes
+++ b/cross-i386-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-i386-gcc7.spec b/cross-i386-gcc7.spec
index eceef9c..96b8ab5 100644
--- a/cross-i386-gcc7.spec
+++ b/cross-i386-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-m68k-gcc7.changes b/cross-m68k-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-m68k-gcc7.changes
+++ b/cross-m68k-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-m68k-gcc7.spec b/cross-m68k-gcc7.spec
index 3b48e12..c2d888c 100644
--- a/cross-m68k-gcc7.spec
+++ b/cross-m68k-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-mips-gcc7.changes b/cross-mips-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-mips-gcc7.changes
+++ b/cross-mips-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-mips-gcc7.spec b/cross-mips-gcc7.spec
index 6fd0d47..461e02e 100644
--- a/cross-mips-gcc7.spec
+++ b/cross-mips-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-nvptx-gcc7.changes b/cross-nvptx-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-nvptx-gcc7.changes
+++ b/cross-nvptx-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-nvptx-gcc7.spec b/cross-nvptx-gcc7.spec
index a0c2a6b..2bf2ae9 100644
--- a/cross-nvptx-gcc7.spec
+++ b/cross-nvptx-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-ppc64-gcc7.changes b/cross-ppc64-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-ppc64-gcc7.changes
+++ b/cross-ppc64-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-ppc64-gcc7.spec b/cross-ppc64-gcc7.spec
index 4302f4a..421d5aa 100644
--- a/cross-ppc64-gcc7.spec
+++ b/cross-ppc64-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-ppc64le-gcc7.changes b/cross-ppc64le-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-ppc64le-gcc7.changes
+++ b/cross-ppc64le-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-ppc64le-gcc7.spec b/cross-ppc64le-gcc7.spec
index 015cc6f..a0a4ac1 100644
--- a/cross-ppc64le-gcc7.spec
+++ b/cross-ppc64le-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-rx-gcc7-bootstrap.changes b/cross-rx-gcc7-bootstrap.changes
index 311deea..6b514e6 100644
--- a/cross-rx-gcc7-bootstrap.changes
+++ b/cross-rx-gcc7-bootstrap.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-rx-gcc7-bootstrap.spec b/cross-rx-gcc7-bootstrap.spec
index 40c161f..ef7f007 100644
--- a/cross-rx-gcc7-bootstrap.spec
+++ b/cross-rx-gcc7-bootstrap.spec
@@ -485,6 +485,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-rx-gcc7.changes b/cross-rx-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-rx-gcc7.changes
+++ b/cross-rx-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-rx-gcc7.spec b/cross-rx-gcc7.spec
index 372ee1f..2d0d247 100644
--- a/cross-rx-gcc7.spec
+++ b/cross-rx-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-s390x-gcc7.changes b/cross-s390x-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-s390x-gcc7.changes
+++ b/cross-s390x-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-s390x-gcc7.spec b/cross-s390x-gcc7.spec
index bb003da..5494524 100644
--- a/cross-s390x-gcc7.spec
+++ b/cross-s390x-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-sparc-gcc7.changes b/cross-sparc-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-sparc-gcc7.changes
+++ b/cross-sparc-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-sparc-gcc7.spec b/cross-sparc-gcc7.spec
index 8b7c620..8ad3a8a 100644
--- a/cross-sparc-gcc7.spec
+++ b/cross-sparc-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-sparc64-gcc7.changes b/cross-sparc64-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-sparc64-gcc7.changes
+++ b/cross-sparc64-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-sparc64-gcc7.spec b/cross-sparc64-gcc7.spec
index ee1892f..c31346b 100644
--- a/cross-sparc64-gcc7.spec
+++ b/cross-sparc64-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/cross-x86_64-gcc7.changes b/cross-x86_64-gcc7.changes
index 311deea..6b514e6 100644
--- a/cross-x86_64-gcc7.changes
+++ b/cross-x86_64-gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/cross-x86_64-gcc7.spec b/cross-x86_64-gcc7.spec
index b401b34..6b3a741 100644
--- a/cross-x86_64-gcc7.spec
+++ b/cross-x86_64-gcc7.spec
@@ -484,6 +484,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/gcc.spec.in b/gcc.spec.in
index 559b79c..bcc6fbf 100644
--- a/gcc.spec.in
+++ b/gcc.spec.in
@@ -1275,6 +1275,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/gcc7-testresults.changes b/gcc7-testresults.changes
index 311deea..6b514e6 100644
--- a/gcc7-testresults.changes
+++ b/gcc7-testresults.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/gcc7-testresults.spec b/gcc7-testresults.spec
index 00fe083..506ba88 100644
--- a/gcc7-testresults.spec
+++ b/gcc7-testresults.spec
@@ -661,6 +661,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"
diff --git a/gcc7.changes b/gcc7.changes
index 311deea..6b514e6 100644
--- a/gcc7.changes
+++ b/gcc7.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Fri Apr  6 06:55:43 UTC 2018 - rguenther@suse.com
+
+- Enable --enable-fix-cortex-a53-835769 for aarch64.
+
 -------------------------------------------------------------------
 Tue Apr  3 12:54:54 UTC 2018 - rguenther@suse.com
 
diff --git a/gcc7.spec b/gcc7.spec
index 3d0b861..8266ef3 100644
--- a/gcc7.spec
+++ b/gcc7.spec
@@ -1965,6 +1965,7 @@ nvptx-none=%{_prefix}/nvptx-none, \
 	--disable-sjlj-exceptions \
 %endif
 %if "%{TARGET_ARCH}" == "aarch64"
+	--enable-fix-cortex-a53-835769 \
 	--enable-fix-cortex-a53-843419 \
 %endif
 %if "%{TARGET_ARCH}" == "powerpc" || "%{TARGET_ARCH}" == "powerpc64" || "%{TARGET_ARCH}" == "powerpc64le"